This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.
The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile. A5 does not support the legacy
memory map.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.
This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.
Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
arm/vexpress also needs these functions to work.
Signed-off-by: Liming Wang <walimisdev@gmail.com>
Acked-by: Matt.Waddel@linaro.org
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used. Punt them all.
MAKEALL didn't report any errors related to this that I could see.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add a header file with the missing function prototype to fix
ca9x4_ct_vxp.c: In function 'cpu_mmc_init':
ca9x4_ct_vxp.c:93: warning: implicit declaration of function 'arm_pl180_mmci_init'
introduced by commit "ARMV7: Vexpress: Add MMC support"
(f0c64526b7)
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Andy Fleming <afleming@freescale.com>
CC: Matt Waddel <matt.waddel@linaro.org>
Fix ca9x4_ct_vxp build error
Configuring for ca9x4_ct_vxp board...
board/armltd/vexpress/libvexpress.o: In function `udelay':
u-boot.git/board/armltd/vexpress/ca9x4_ct_vxp.c:161: multiple
definition of `udelay'
lib/libgeneric.o:u-boot.git/lib/time.c:34: first defined here
lib/libgeneric.o: In function `udelay':
zlib.c:(.text+0x1ee8): undefined reference to `__udelay'
Signed-of-by: Dirk Behme <dirk.behme@googlemail.com>
This patch fixes build errors in the vexpress system:
- Removed sys_proto.h requirement from syslib.c.
- Switched vexpress to the default armv7 linker script.
- Renamed TEXT_BASE to CONFIG_SYS_TEXT_BASE.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils. As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".
This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.
The name of each former library archive is preserved except for
extensions which change from ".a" to ".o". This commit updates
references accordingly where needed, in particular in some linker
scripts.
This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.
Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
