Commit graph

117 commits

Author SHA1 Message Date
Albert ARIBAUD
2fd34f2636 arm: omap: map u_boot_lists section to .sram
Output section .u_boot_list was left unmapped in
u-boot-spl.lds for omap-common, causing the location
counter to roll back to bteween .rodata and .data,
making __image_copy_end and _end symbols wrong.

Mapping output section .u_boot_list to memory .sram
fixes these symbols' mapping.

This modifies the SPL binary but has no functional
impact, as __image_copy_end and _end are never used
in SPLs and u_boot_list is empty for all 29 boards
affected (omap4_sdp4430 eco5pk igep0030 am335x_evm_uart3
omap3_beagle am3517_crane igep0032 mt_ventoux pcm051
am3517_evm omap3_evm_quick_mmc am335x_evm_uart2
am335x_evm_spiboot am335x_evm_uart1 omap3_evm igep0030_nand
omap3_overo igep0020 am335x_evm omap4_panda omap5_evm
am335x_evm_uart4 devkit8000 tricorder mcx twister
omap3_evm_quick_nand am335x_evm_uart5 igep0020_nand).

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-03-12 23:28:26 +01:00
Lokesh Vutla
de62688bb6 arm: dra7xx: Add silicon id support for DRA752 soc
Adding CPU detection support for the DRA752 ES1.0 soc.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:39:57 -04:00
Lokesh Vutla
7831419d7b arm: dra7xx: Add DDR related data for DRA752 ES1.0
DRA752 uses DDR3. Populating the corresponding structures
with DDR3 data.
Writing into MA registers if only MA is present in that soc.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:11 -04:00
Lokesh Vutla
ea8eff1fe0 arm: dra7xx: clock: Add the dplls data
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:11 -04:00
Lokesh Vutla
d4d986ee27 ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup
After power-up SRCOMP cells are by-passed by default in OMAP5.
Software has to enable these SRCOMP sells.
For ES2: All 5 SRCOMP cells needs to be enabled.
For ES1: Only 4 SRCOMP cells in core power domain are enabled.
	 The 1 in wkup domain is not enabled because smart i/os
	 of wkup domain work with default compensation code.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Tom Rini <trini@ti.com>
2013-03-11 11:06:11 -04:00
SRICHARAN R
47abc3df70 ARM: OMAP4/5: clocks: Add the required OPP settings as per the latest addendum
Change OPP settings as per the latest 0.5 version of
addendum for OMAP5430 ES2.0. omap4/hw_data.c is touched
here to add dummy dividers.

While here correcting OPP_NOM mpu, core frequency for
OMAP4430 ES2.x

Note that OMAP5430 ES1.0 support is still kept alive and
would be removed in a cleanup later.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>
2013-03-11 11:06:10 -04:00
Lokesh Vutla
c43c8339fe ARM: OMAP4+: Make control module register structure generic
A seperate omap_sys_ctrl_regs structure is defined for
omap4 & 5. If there is any change in control module for
any of the ES versions, a new structure needs to be created.
In order to remove this dependency, making the register
structure generic for all the omap4+ boards.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
Lokesh Vutla
e05a4f1f54 ARM: OMAP4+: Cleanup emif specific files
Removing the duplicated code in ddr3 initialization.
Also creating structure for lpddr2 mode registers to
avoid unnessecary revision checks.

These change reduces code addition for future Socs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
3fcdd4a5f8 ARM: OMAP4+: Clean up the pmic code
The pmic code is duplicated for OMAP 4 and 5.
Instead move the data to Soc specific place and
share the code.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:10 -04:00
SRICHARAN R
ee9447bfe3 ARM: OMAP4+: Cleanup the clocks layer
Currently there is quite a lot of code which
is duplicated in the clocks code for OMAP 4 and 5
Socs. Avoiding this here by moving the clocks
data to a SOC specific place and the sharing the
common code.

This helps in addition of a new Soc with minimal
changes.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:09 -04:00
SRICHARAN R
01b753ff7b ARM: OMAP4+: Change the PRCM structure prototype common for all Socs
The current PRCM structure prototype directly matches the hardware
register layout. So there is a need to change this for every new silicon
revision which has register space changes.

Avoiding this by making the prototye generic and populating the register
addresses seperately for all Socs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-03-11 11:06:09 -04:00
Lokesh Vutla
9ca8bfea80 ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register
Now SDRAM initialization is done on the basis of omap revision.
Instead this should be done on basis of SDRAM type read from
EMIF_SDRAM_CONFIG register. This will be helpful to avoid
unnessecary cpu checks for new boards

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-11 11:06:09 -04:00
Nikita Kiryanov
e3913f56a2 omap_hsmmc: add driver check for write protection
Add check for write protection in omap mmc driver.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
2013-03-08 16:41:13 -05:00
Nikita Kiryanov
e874d5b001 omap_hsmmc: implement driver check for card detection
Implement driver check for card detection.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-03-08 16:41:13 -05:00
Ilya Yanok
da07c21b77 am33xx: support for booting via usbeth
This patch adds BOOT_DEVICE define for USB booting and fixes
spl_board_init function to call arch_misc_init (this is the place there
musb is initialized).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2013-02-18 13:48:04 -05:00
Simon Glass
582601da2f arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
66ee692347 arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Lokesh Vutla
86021143a3 omap: emif: configure emif only when required
DMM_LISA_MAP registers program whether memory is mapped
on particular EMIF or not. Irrespective of these registers
EMIF is getting configured. Correcting the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-12-10 08:55:25 -07:00
Robert P. J. Day
c7f1cf5f29 OMAP: Tweak omap-common/Makefile since reset.S -> reset.c
Git commit d417d1db5f replaced the
omap-common file reset.S with reset.c, but the Makefile was not
adjusted for that.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2012-12-10 08:55:25 -07:00
Ilya Yanok
1befaffbfb OMAP: include sys_proto.h from boot-common
Include asm/arch/sys_proto.h for gpmc_init prototype.
Without this we get a warning while building for AM335x.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:01 -07:00
Marek Vasut
556751427b common: Add .u_boot_list into all linker files
Add section for the linker-generated lists into all possible linker
files, so that everyone can easily use these lists. This is mostly
a mechanical adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Michal Simek
4e7067f332 arm: Remove additional config flags
These options are just duplicated from arch/arm/cpu/armv7/config.mk

Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-10-04 14:51:50 +02:00
Joel A Fernandes
90207b6268 am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XX
U-boot should not ignore getting the bootmode passed on from the bootrom.
With this, U-boot SPL knows it was loaded from MMC1 and use this info to
read full U-boot from MMC1 as well.

Cc: pprakash@ti.com
Cc: trini@ti.com
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-01 10:02:15 -07:00
Tom Rini
d97b4ce805 SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/spl
We move the spl_nand_load_image function to common/spl.  This will allow
for easier integration of SPL-boots-Linux code on other arches.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:50:00 -07:00
Tom Rini
6507f133f3 SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linux
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer,
clear the BSS and call board_init_r.  We mark this as weak as some
platforms may need to perform additional initalization at this point.
We provide a gd that we know will be in a usable location, once the BSS
has been cleared to help with this as well.  Finally, we no longer call
relocate_code so remove that from the armv7 version.

Next, both board_init_f and jump_to_image_linux are going to be
inherently arch-specific, so move these versions to arch/arm/lib/spl.c

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
47f7bcae8c SPL: Move the omap SPL framework to common/spl
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards.  We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/.  We leave
the NAND one in-place as we plan to replace it later in this series.

We use common/spl to avoid linker problems with respect to merging
constant strings in objects.   Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
d7cb93b28a ARM: SPL: Move gpmc_init() to spl_board_init()
This is an OMAP/related-specific function, move calling it to
spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that
enabled NAND and didn't enable this already.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:59 -07:00
Tom Rini
d4c4e0e117 ARM: SPL: Start hooking in the current SPI SPL support
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:58 -07:00
Tom Rini
026b2fe32c ARM: SPL: Clean up spl.c / spl_nand.c slightly
- Remove includes we don't need
- Switch some printf statements to puts
- Convert some printf statements to debug, introduce new puts statements
  - In most cases saying just "No mkimage signature, assuming
    u-boot.bin" or similar is sufficient.  This also means the non-DEBUG
    case doesn't need printf, in the core of SPL.
  - The other case here is that PLAIN_VERSION provided what we wanted
    already, so just use it.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:58 -07:00
Tom Rini
f0881250f9 ARM: SPL: Make spl_mmc.c more generic
Move the default omap/related-centric board_mmc_init to
arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines
to <asm/spl.h>.  Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:58 -07:00
Tom Rini
55cdbb8d4e ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and
add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:49:57 -07:00
Tom Rini
24dafad5c4 ARM: SPL: Only call mem_malloc_init if configured
We can only attempt to setup a malloc pool if
CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it.
Make the call depend on the define.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:39 -07:00
Tom Rini
8082fda9fc ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.c
This detection code doesn't (and can't) do anything currently, so
remove.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:39 -07:00
Tom Rini
37189a1958 ARM: SPL: Rename omap_boot_mode to spl_boot_mode()
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:39 -07:00
Tom Rini
8e1b836ec5 ARM: SPL: Rename omap_boot_device to spl_boot_device
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Pavel Machek
9f8a6e7ae7 omap-common: SPL: Fix whitespace in omap-common/u-boot-spl.lds.
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Tom Rini
6abbe744d2 omap-common: Fix typo in save_boot_params() in lowlevel_init.S
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Tom Rini
861a86f460 omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing.  Change how this works to
be opt-in and only turned on for omap4/5 now.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:38 -07:00
Tom Rini
0da113e9fd spl_mmc: Make FAT checks / calls guarded with CONFIG_SPL_FAT_SUPPORT
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-27 09:48:37 -07:00
Tom Rini
41aebf8106 omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms.  As part of this we change some of the macros that are used
to be more clear.  Previously (except for am335x evm) we had been
setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are
equivalent to simply referencing NON_SECURE_SRAM_END.  On am335x evm we
should have been doing this initially and do now.

Cc: Sricharan R <r.sricharan@ti.com>
Tested-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:19 +02:00
Marek Vasut
308252adaf dm: Move OMAP GPIO driver to drivers/gpio/
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01 14:58:13 +02:00
Steve Sakoman
3b97152b63 omap: am33xx: enable gpio support
This patch uses the code in omap-common to support gpio modules 1-3
on am33xx based boards.

It adds base address and register definitions, enables clocks to the
modules, and enables building the common gpio code for CONFIG_AM33XX
as well as CONFIG_OMAP

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-09-01 14:58:09 +02:00
SRICHARAN R
254763822e ARM: OMAP4+: Move external phy initialisations to arch specific place.
The external phy is present in the case OMAP5 soc is currently
configured in emif-common.c. This results in having dummy structures
for those Socs which do not have a external phy. So by having a weak
function in emif-common and overriding it in OMAP5, avoids the use
of dummy structures.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:35 +02:00
Steve Sakoman
ad0878a749 omap: emif: fix bug in manufacturer code test
Code currently tests for <= 0xff.  Micron manufacturer code is 0xff, so
Micron memory will not be detected!

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07 14:07:35 +02:00
Steve Sakoman
55c1284942 omap: emif: deal with rams that return duplicate mr data on all byte lanes
Some rams (Micron for example) return duplicate mr data on all byte lanes.

Users of the get_mr function currently don't deal with this duplicated
data gracefully.  This patch detects the duplicated data and returns only
the expected 8 bit mr data.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07 14:07:35 +02:00
Lokesh Vutla
38f25b125e OMAP4+: Force DDR in self-refresh after warm reset
Errata ID:i727

Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0]
REG_REFRESH_RATE parameter taking into account frequency of the device.
When a warm reset is applied on the system, the OMAP processor restarts
with another OPP and so frequency is not the same. Due to this frequency
change, the refresh rate will be too low and could result in an unexpected
behavior on the memory side.

Workaround:
The workaround is to force self-refresh when coming back from the warm reset
with the following sequence:
• Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2
• Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0
• Do a dummy read (loads automatically new value of sr_tim)
This will reduce the risk of memory content corruption, but memory content
can't be guaranteed after a warm reset.

This errata is impacted on
OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3
OMAP4460: 1.0, 1.1
OMAP4470: 1.0
OMAP5430: 1.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07 14:07:35 +02:00
Lokesh Vutla
784229cc25 OMAP4+: Handle sdram init after warm reset
EMIF and DDR device state are preserved in warmreset.  Redoing the full
initialisation would cause unexpected behaviour.  Do only partial
initialisation to account for frequency change.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07 14:07:34 +02:00
Lokesh Vutla
702395073f ARM: OMAP3+: Detect reset type
Certain modules are not affected by means of
a warm reset and need not be configured again.
Adding an API to detect the reset reason warm/cold.

This will be used to skip the module configurations
that are retained across a warm reset.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:34 +02:00
Lokesh Vutla
753bae8c5d OMAP5: DPLL core lock for OMAP5432
No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
784ab7c545 OMAP5: EMIF: Add support for DDR3 device
In OMAP5432 EMIF controlller supports DDR3 device.
This patch adds support for ddr3 device intialization and configuration.
Initialization sequence is done as specified in JEDEC specs.
This also adds support for ddr3 leveling.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00