Commit graph

83031 commits

Author SHA1 Message Date
Alice Guo
ef0ad9b07d watchdog: ulp_wdog: Update watchdog driver for imx93
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Ye Li
a79f2007d0 ulp_wdog: Update ulp wdog driver for 32bits command
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-10-24 11:10:21 +02:00
Stefan Roese
ddc8d36a74 cyclic: Don't disable cylic function upon exceeding CPU time
With the migration of the watchdog infrastructure to cyclic functions
it's been noticed, that at least one watchdog driver is broken now. As
the execution time of it's watchdog reset function is quite long.

In general it's not really necessary (right now) to disable the cyclic
function upon exceeding CPU time usage. So instead of disabling the
cylic function in this case, let's just print a warning once to show
this potential problem to the user.

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pali Rohár <pali@kernel.org>
2022-10-24 11:10:21 +02:00
Rasmus Villemoes
374d5d9971 sandbox.dtsi: add a sandbox,alarm-wdt instance
In order to test that we properly handle watchdog(s) during the "wait
for the user to interrupt autoboot" phase, we need a watchdog device
to be watching us.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24 11:10:21 +02:00
Rasmus Villemoes
10107efedd sandbox: add SIGALRM-based watchdog device
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.

So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.

The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.

Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24 11:10:21 +02:00
Rasmus Villemoes
2783670583 watchdog: introduce a u-boot,autostart property
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.

The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24 11:09:19 +02:00
Jim Liu
0ab55cb6f7 wdt: nuvoton: add expire function for generic reset
Add expire_now function for generic sysreset request

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-24 11:06:24 +02:00
Venkatesh Yadav Abbarapu
337af54a36 mmc: Fix static checker warnings
Correct pointer dereferencing check to be more consistent.

Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:54 +09:00
John Keeping
7ff2f30b63 mmc: dwmmc: only clear handled interrupts
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:

	mask = dwmci_readl(host, DWMCI_RINTSTS);

	// Hardware asserts DWMCI_INTMSK_DTO here

	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);

	if (mask & DWMCI_INTMSK_DTO) {
		// Unreachable as DTO is cleared without being handled!
		return 0;
	}

Only clear interrupts that we have seen and are handling so that DTO is
not missed.

Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:41 +09:00
Yann Gautier
359c176de5 mmc: stm32_sdmmc2: manage vqmmc
The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:15 +09:00
Yann Gautier
27fbce4326 mmc: stm32_sdmmc2: protect against unsupported modes
The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:02:07 +09:00
Yann Gautier
be1872982e mmc: stm32_sdmmc2: add dual data rate support
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:59 +09:00
Kunihiko Hayashi
12fc8efe5a mmc: f_sdh30: Add support for F_SDH30_E51
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2022-10-24 18:01:32 +09:00
Kunihiko Hayashi
2b0dd4174f mmc: sdhci: Add new quirks for SUPPORT_SINGLE
This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:23 +09:00
Sergei Antonov
fc6b5d8260 mmc: ftsdc010: make command timeout 250 ms as in the comment
Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-24 18:01:07 +09:00
Takahiro Kuwano
e28d3ead72 mtd: spi-nor-core: Fix index value for SCCR dwords
Array index for SCCR 22th DWORD should be 21.

Fixes: bebdc23750 ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:52:16 +05:30
Takahiro Kuwano
7a4b6f8cf7 mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.

For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:50:38 +05:30
Takahiro Kuwano
f58e7b24fa mtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytes
Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
nor->addr_mode_nbytes tracks flash's internal address mode so replace
nor->addr_width by that.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:50:26 +05:30
Takahiro Kuwano
4d60001fdf mtd: spi-nor-core: Track flash's internal address mode
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:50:17 +05:30
Takahiro Kuwano
ee1c709cfd mtd: spi-nor-core: Default to addr_width of 3 for configurable widths
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:50:04 +05:30
Takahiro Kuwano
de9e8378a8 mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs
Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt.
These devices have the same functionality as s28hs512t.

In spi-nor-core, use device ID byte to detect S28 family instead of
device name.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:44:43 +05:30
Takahiro Kuwano
f422c4bec7 mtd: spi-nor-core: Rename configuration macro for S28 support
Change configuration macro name to support all other devices in SEMPER S28
family.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:44:28 +05:30
Takahiro Kuwano
4bfeb00cc1 mtd: spi-nor-core: Rename s28hs512t prefix
Change prefix to support all other devices in SEMPER S28 family.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-10-23 10:44:15 +05:30
Tom Rini
1e892ef0b5 Merge branch '2022-10-21-assorted-fixes-and-updates'
- NC-SI handling support and enable on evb-ast2[56]00, gpio driver for
  ADP5585, improve qfw support, print more sysresets info, gw_ventana
  and gcc-12 bugfix, improve BCB support, fix a few typos and remove an
  unused keymile CONFIG symbol.
2022-10-22 11:19:31 -04:00
Holger Brunck
4344c113c4 board/km: drop CONFIG_KM_ROOTFSSIZE
This unused nowadays and can be dropped.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-10-21 21:37:47 -04:00
Mattijs Korpershoek
601d4e1af6 blk: fix a couple of trivial documentation typos
In some cases, the param variable is wrong, and in other cases we have
undocumented arguments.

Fix the docs.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 21:37:47 -04:00
Michal Suchanek
59c585e9c6 test: Fix typo in test name
For other sandbox tests the printed test name corresponds to the
configuration except for this one.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 21:37:47 -04:00
Mattijs Korpershoek
64a11fb8c9 cmd: bcb: select user(0) hwpart in __bcb_load()
For some blk operations, it's possible that a different hw partition
gets selected via blk_dselect_hwpart().
In that case, only the region of the device covered by that partition
is accessible.

This breaks "bcb load" which attempts to read the gpt and assumes it's
on the user(0) hw partition:

=> bcb load 2 misc
GUID Partition Table Header signature is wrong: 0xDE7B17AD07D9E5D6 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid Backup GPT ***
Error: mmc 2:misc read failed (-2)

Add a fail-safe in __bcb_load() to ensure we will always read from the
user(0) hwpartition.

This fixes the following fastboot sequence:

$ fastboot erase mmc2boot1    # switch to hwpart1
$ fastboot reboot bootloader  # switch to hwpart0, then reads GPT

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-10-21 21:37:47 -04:00
Heinrich Schuchardt
65e8b64d23 board: gateworks: gw_ventana: fix building with GCC 12.2
Building with GCC 12.2 results in an error

    board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
    will always evaluate as 'true' for the address of 'pwm_padmux' will
    never be NULL [-Werror=address]
      636 |                 } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
          |                                                                    ^~

Remove the superfluous check.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-21 21:37:47 -04:00
Michal Suchanek
9259bd1735 common: board_f: Print information for all sysresets
Boards can have multiple sysresets, iterate all when printing sysreset
info.

Fixes: 23471aed5c ("board_f: Add reset status printing")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 16:06:14 -04:00
Michal Suchanek
5b2f49c033 sandbox: Initialize sysreset before relocation
Without this the early sysreset code cannot be tested.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 16:06:14 -04:00
Andre Przywara
d6d8720c3f qemu: Try to automatically boot from the QEMU firmware device (qfw)
At the moment the QEMU boot sequence tries various (storage) devices
when trying to find a payload to boot.
To simplify starting a specific kernel and initrd, there is also the qfw
command, which can use the files specified on the QEMU command line, via
the -kernel and -initrd options.
Add this command to the list of boot options to try. Since users
specifying those options on the command line probably explicitly want
to run them, let's place the new command first. Without those options,
the qfw command will just gracefully fail, and we continue with the
existing order.

This allows auto-booting of specific kernels in QEMU, for instance in CI
systems.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:14 -04:00
Andre Przywara
2f6c45eb68 qfw: return failure when no kernel could be loaded
When we try to load a kernel via the QEMU firmware device, we currently
"return -1;" if no kernel was specified on the QEMU command line. This
leads to the usage output, which is confusing (since nothing on the
command line was really wrong), but also somewhat hides the actual error
message.

Return CMD_RET_FAILURE (1), as it's a proper error, and make the message
more clear that this is not only a "warning".

This helps to call this command in boot scripts, and to gracefully
continue if this doesn't work.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:14 -04:00
Andre Przywara
163fb37669 qfw: store loaded file size in environment variable
At the moment the QEMU firmware command just prints the size of the
loaded binaries on the console.
To go with all the other load methods, and many boot scripts'
expectations, also store the size of the file loaded last in the
environment variable "filesize".
We first put the kernel size in there, but overwrite this with the
initrd size, should we have one, because this is probably the more
prominent user of $filesize (in the booti or bootz command).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-21 16:06:13 -04:00
Alice Guo
71858454fe gpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller
Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10
input/output port expander and can be used to increase the number of
I/Os available to a processor.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2022-10-21 16:06:13 -04:00
Joel Stanley
e8f58df178 config/aspeed: Enable NC-SI support
Aspeed BMCs are commonly used with NC-SI. A system indicates the driver
should configure the link over NC-SI using the device tree.

Add it to the defconfig so we get compile coverage of the driver, even
if the EVBs do not normally use it.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-10-21 16:05:37 -04:00
Samuel Mendoza-Jonas
3b400e84ba net/ftgmac100: Add NC-SI mode support
Update the ftgmac100 driver to support NC-SI instead of an mdio phy
where available. This is a common setup for Aspeed AST2x00 platforms.

NC-SI mode is determined from the device-tree if either phy-mode sets it
or the use-ncsi property exists. If set then normal mdio setup is
skipped in favour of the NC-SI phy.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-10-21 16:04:39 -04:00
Samuel Mendoza-Jonas
4b290d4a75 cmd: Add ncsi command
Adds an "ncsi" command to manually start NC-SI configuration.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-10-21 16:04:39 -04:00
Samuel Mendoza-Jonas
09bd3d0b0a net: NC-SI setup and handling
Add the handling of NC-SI ethernet frames, and add a check at the start
of net_loop() to configure NC-SI before starting other network commands.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-10-21 16:04:39 -04:00
Tom Rini
7723828c97 Merge branch '2022-10-21-enforce-some-DM-migrations'
- Enforce CONFIG_DM being enabled (which has been the case for all
  boards for a bit now) and remove non-DM_KEYBOARD options as they're also
  unused for some time now.
2022-10-21 15:32:45 -04:00
Tom Rini
d662e9adae configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-21 14:07:17 -04:00
Tom Rini
f60e6f6767 input: Remove legacy KEYBOARD option
There are no platforms that have not migrated to using DM_KEYBOARD,
remove the legacy option.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 13:47:56 -04:00
Tom Rini
9af4a0c8a6 core: Enable DM by default
There are no longer any platforms which do not enable DM, move this to a
def_bool y and remove the check in the Makefile.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21 13:47:56 -04:00
Tom Rini
f35e37cffd First set of u-boot-at91 fixes for the 2023.01 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmNSPhMcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyDrHCACddHL6pElPVUvNWomJ
 h7RNejIaFrm+V2tVoDqnUBEzxKod7g1cvBiZM+2o5fcLNIrWfH0gV+7a48Uybzt2
 r7VZ9u5Rnl1Fhhjvr8eL3uF/39V249eMPrzR8xC677sCJJkcczoOw8n4y534FaJZ
 1NePmMKhlo7YVEZKzwdg1sM6sUppXniSEXUllWumVaUgSHcZhFK579nCbYpt25bW
 sJ1V3fY2pJnaFHv9H599zSK79Izf5fR4fr3egKZknw8oqNLKNrjkWxxlPXJfjEYr
 ncFJ31dOZXJU09rRoE60nIc0QdRE8dvELjYhPKUS/wmFDg7IotwNj5GcX2RIlRPJ
 mS22
 =D3FL
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-fixes-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2023.01 cycle:

This small fixes set includes an indentation fix for sam9x60 DT and one
name for one pin for sama7g5.
2022-10-21 08:33:48 -04:00
Fabio Estevam
0db6a8110c imx8mn-venice-u-boot: Fix broken boot
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-21 11:54:13 +02:00
Fabio Estevam
8b4f9595ae imx8mn-ddr4-evk-u-boot: Fix broken boot
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9 ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-10-21 11:54:13 +02:00
Tim Harvey
23bde6909e board: gateworks: gw_ventana: fix mmc env dev
Fix the MMC env device for boards with eMMC by adding a
board_mmc_get_env_dev override to return the boot device as the
MMC env device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-10-21 11:54:13 +02:00
Marek Vasut
39236acb0d ARM: imx6: dh-imx6: Use sf update instead of sf erase and write
With sf update fixed to support unaligned start offset, use plain
sf update to update the bootloader in SPI NOR. This also helps
avoid the case where not enough SPI NOR has been erased and the
bootloader has been written to unerased area, and thus corrupted.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-10-21 11:54:13 +02:00
Marek Vasut
07e02b81cf ARM: imx: Enable btrfs support on DHSOM
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-10-21 11:54:13 +02:00
Ye Li
eda25c11b8 crypto/fsl: fsl_rsa: Fix dcache issue in the driver
issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM

Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.

Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-10-21 11:54:13 +02:00