The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Add support for reset_cpu() by asserting RESET_REQ_B.
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>
This assignment conflicts with code that add flags with
gd->flags |= FOO prior to the execution of this function.
Seems like a historical artifact and creates bugs with
early alloc().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Commit d8bafe1310
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.
Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
some pins on the board have been rerouted to other peripherals, so we
change the pinmux to apply with hardware-design.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
The NAND-version has been become a bit orphan.
Now we need to reactivate it, so bring necessary things:
- loading devicetree
- switch control signal to correct pins
- setup pinmux
- default-environment
up to date.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
instead of polling everytime the environment, we take usage of the global
gd->fdt_blob variable and check it only against NULL.
Variable "dtbaddr" from environment is needed only one time on loading the
devicetree within "load_devicetree()"
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
mx6sabresd has four MT41K128M16JT-125 chips. Each memory has 16-bit bus
and 2GiB, so fix the width and density fields accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Move the compilation of file fsl_validate.c in MACRO CONFIG_CMD_ESBC_VALIDATE.
This file should be compiled only when the above MACRO is defined
This caused a break in compilation of iMX platforms when compiling for SECURE_BOOT
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
This commit combines catching missing memory and calibration data into
one if() block. It further prints pertinent information in determining
why the failure occurred.
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add memory configuration for an IMX6SDL + 1GB density DRAM.
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The initial revision of the GW551x does not connect enough signals between
the HDMI receiver and the IMX6 CSI for 16bit capture mode necessary for
yuv422smp capture. Future revisions will, but for the initial rev force it
to yuv422bt656 mode which requires an 8bit video data bus.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The HDMI receiver used on the GW54xx and GW551x has a 16bit video data bus
interconnect between it and the IMX6 CSI. This can be used in two different
modes, each having advantages and disadvantages. Allow the hdmiinfmt env
var to specify which format is desired (yuv422smp or yuv422bt656).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW522x is functionally the same as a GW52xx except for PCIE_RST#
GPIO. Add a DT fixup to change this gpio upon bootup.
Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This adds information about the Gateworks System Controller to the gsc command
such as the firmware version, firmware CRC and status of the GSC watchdog
(if its enabled and if its tripped).
Additionally the 'gsc wd' command can be used to enable or disable the
watchdog with the following usage:
gsc wd enable [30|60]
gsc wd disable
Note that the GSC registers are battery-backed by the GSC coincell so once
eanbled, they remain enabled across power-cycles or until either the GSC
firmware has been updated or FLASH has been re-programmed by the Gateworks
JTAG adapter.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Configure kernel device-tree for display from env var. This is useful
to specify the display present when the device-tree supports multiple
non-detectable display configurations.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Certain older kernels in use by some customers erroneously define a uart3
for GW54xx with a pinmux that conflicts with NAND. This will remove
that node to avoid such conflicts.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Updated 16bit DDR calibration using values obtained from running the
i.MX6 DDR Stress Test tool over a set of boards over full operationg
temperature.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW551x-A revision does not have the CSI0_DATA_EN pin connected, therefore
we need to make sure that signal is not muxed to the CSI_DATA_EN signal
internally and do so by steering it to the unused GPIO5_IO20.
We do this so that the kernel device-tree can properly define the signal for
RevB and beyond boards that do have this hooked up properly and require it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add a new voltage rail added in various -C revision PCB's.
Additionally make VDD_CORE, VDD_SOC, and VDD_IO2 common as all Ventana boards
have those.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Certain OS bootscripts need to know how much memory a board has to adjust
kernel parameters (namely Android). This allows those boards to determine
mem size in MB.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The min/max of each depends not only on board but on CPU. Simplify by removing
this rarely needed and difficult to maintain feature and just display the
rails and their values.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW551x is a small form factor board based on the IMX6 SoC that includes:
* up to 512MB DDR3 memory
* up to 2GB NAND flash
* 1x miniPCIe socket (with USB)
* HDMI out (micro-HDMI)
* HDMI in (micro-HDMI)
* TTL level I/O (supported by GW16111 breakout board):
* I2C
* 2x UART
* CAN
* 2x DIO (GPIO/PWM)
* USB OTG
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
A board level errata causes the IMX6 watchdog to be unstable on the GW51xx
RevA and RevB boards which can cause the watchdog to trip extremely early
(under 5seconds) under certain operating conditions. Disable the watchdog
node in the device-tree to work around this issue.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX6 Datasheets specifies that when the IMX6 LDO is enabled
(internal Anatop LDO's for VDD_ARM, VDD_SOC, and VDD_xPU) you need to
provide 1350mV on VDD_ARM_IN and VDD_SOC_IN for IMX6Q@1GHz (Automotive)
and 1275mV for IMX6DL@800MHz (Industrial). While we are still about 50mV
shy on the IMX6Q operating at 1GHz we set it to the max we can and leave it
up to the kernel to implement a regulator driver for the LTC3676 and put
the LDO's in bypass mode which allows us to drop the voltages by 125mV
respectively.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW52xx has a MUX that can direct front-panel USB OTG to one of the
miniPCIe sockets (for use with a cellular modem for example). Use hwconfig
to steer this.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Gateworks Ventana boards don't all use IMX6 FEC, so lets define default
ethprime based off the first detected device.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add the initial SPL support for HummingBoard-i2eX, which is based on a
MX6 Dual.
For more information about HummingBoard, please check:
http://www.solid-run.com/products/hummingboard/
Based on the work from Jon Nettleton and Rabeeh Khoury.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Freescale's Layerscape Management Complex (MC) provide support various
objects like DPRC, DPNI, DPBP and DPIO.
Where:
DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO
DPBP: Management of buffer pool
DPIO: Used for used to QBMan portal
DPNI: Represents standard network interface
These objects are used for DPAA ethernet drivers.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:
MC DDR region start = Top of DDR - area reserved by Debug Server FW
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Muram will power off during deepsleep, and the microcode of qe
in muram will be lost, it should be reload when resume.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Muram will power off during deepsleep, and the microcode of qe
in muram will be lost, it should be reload when resume.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The patch uses the common function name ft_pci_setup to replace
ft_pcie_setup, then removes unnecessary pcie_layerscape.h because
all the functions have been declared in common.h.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <yorksun@freescale.com>
1. Default environment will be used for secure boot flow
which can't be edited or saved.
2. Command for secure boot is predefined in the default
environment which will run on autoboot (and autoboot is
the only option allowed in case of secure boot) and it
looks like this:
#define CONFIG_SECBOOT \
"setenv bs_hdraddr 0xe8e00000;" \
"esbc_validate $bs_hdraddr;" \
"source $img_addr;" \
"esbc_halt;"
#endif
3. Boot Script can contain esbc_validate commands and bootm command.
Uboot source command used in default secure boot command will
run the bootscript.
4. Command esbc_halt added to ensure either bootm executes
after validation of images or core should just spin.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
On QDS board with DDR4 DIMM, LPUART is used as console
output to verify DCU driver. This patch adds
ls1021aqds_ddr4_nor_lpuart_defconfig for this support.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
