Commit graph

574 commits

Author SHA1 Message Date
Wolfgang Denk
2ab5be7af0 Merge branch 'master' of git://git.denx.de/u-boot-usb
* 'master' of git://git.denx.de/u-boot-usb:
  USB: S5P: Add ehci support
  usb:udc:samsung Add functions for storing private gadget data in UDC driver
  usb:gadget:composite: Support for composite at gadget.h
  usb:gadget:composite USB composite gadget support
  usb:udc:samsung:cleanup Replace DEBUG_* macros with debug_cond() calls
  usb:udc: Remove duplicated USB definitions from include/linux/usb/ch9.h file
  USB: Document the QH and qTD antics in EHCI-HCD
  USB: Drop cache flush bloat in EHCI-HCD
  USB: Drop ehci_alloc/ehci_free in ehci-hcd
  USB: Align buffers at cacheline
  usb: use noinline define
2012-05-20 22:51:41 +02:00
Wolfgang Denk
8bd07c9aaf Merge branch 'master' of git://git.denx.de/u-boot-net
* 'master' of git://git.denx.de/u-boot-net:
  net: move bootfile init into eth_initialize
  net: punt bd->bi_ip_addr
  net: cosmetic: netconsole.c checkpatch compliance
  net: cosmetic: tftp.* checkpatch compliance
  net: cosmetic: sntp.* checkpatch compliance
  net: cosmetic: rarp.* checkpatch compliance
  net: cosmetic: nfs.* checkpatch compliance
  net: cosmetic: net.c checkpatch compliance
  net: cosmetic: eth.c checkpatch compliance
  net: cosmetic: bootp.* checkpatch compliance
  net: cosmetic: net.h checkpatch compliance
  net: Remove volatile from net API
2012-05-20 22:33:44 +02:00
Wolfgang Denk
ee3a55fdf0 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits)
  OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
  ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT
  ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
  arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx
  OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree
  omap4: do not enable auxiliary cores
  omap4: do not enable fs-usb module
  omap4: panda: disable uart2 pads during boot
  igep00x0: change mpurate from 500 to auto
  igep00x0: enable the use of a plain text file
  tegra2: trivially enable 13 mhz crystal frequency
  tegra: Enable keyboard for Seaboard
  tegra: Switch on console mux and use environment for console
  tegra: Add tegra keyboard driver
  tegra: fdt: Add keyboard definitions for Seaboard
  tegra: fdt: Add keyboard controller definition
  tegra: Add keyboard support to funcmux
  input: Add support for keyboard matrix decoding from an fdt
  input: Add generic keyboard input handler
  input: Add linux/input.h for key code support
  fdt: Add fdtdec functions to read byte array
  tegra: Enable LP0 on Seaboard
  tegra: fdt: Add EMC data for Tegra2 Seaboard
  tegra: i2c: Add function to find DVC bus
  fdt: tegra: Add EMC node to device tree
  tegra: Add EMC settings for Seaboard
  tegra: Turn off power detect in board init
  tegra: Set up warmboot code on Nvidia boards
  tegra: Setup PMC scratch info from ap20 setup
  tegra: Add warmboot implementation
  tegra: Set up PMU for Nvidia boards
  tegra: Add PMU to manage power supplies
  tegra: Add EMC support for optimal memory timings
  tegra: Add header file for APB_MISC register
  tegra: Add tegra_get_chip_type() to detect SKU
  tegra: Add flow, gp_padctl, fuse, sdram headers
  tegra: Add crypto library for warmboot code
  tegra: Add functions to access low-level Osc/PLL details
  tegra: Move ap20.h header into arch location
  Add AES crypto library
  i2c: Add TPS6586X driver
  Add abs() macro to return absolute value
  fdt: Add function to return next compatible subnode
  fdt: Add function to locate an array in the device tree
  i.MX28: Avoid redefining serial_put[cs]()
  i.MX28: Check if WP detection is implemented at all
  i.MX28: Add battery boot components to SPL
  i.MX28: Reorder battery status functions in SPL
  i.MX28: Add LRADC init to i.MX28 SPL
  i.MX28: Add LRADC register definitions
  i.MX28: Shut down the LCD controller before reset
  i.MX28: Add LCDIF register definitions
  i.MX28: Implement boot pads sampling and reporting
  i.MX28: Improve passing of data from SPL to U-Boot
  M28EVK: Add SD update command
  M28EVK: Implement support for new board V2.0
  FEC: Abstract out register setup
  MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
  i.MX28: Add delay after CPU bypass is cleared
  spi: mxs: Allow other chip selects to work
  spi: mxs: Introduce spi_cs_is_valid()
  mx53loco: Remove unneeded gpio_set_value()
  mx53loco: Add CONFIG_REVISION_TAG
  mx53loco: Turn on VUSB regulator
  mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
  pmic: dialog: Avoid name conflicts
  imx: Add u-boot.imx as target for ARM9 i.MX SOCs
  i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
  imx: usb: There is no such register
  i.MX25: usb: Set PORTSCx register
  imx: nand: Support flash based BBT
  i.MX25: This architecture has a GPIO4 too
  i.MX25: esdhc: Add mxc_get_clock infrastructure
  i.MX6: mx6q_sabrelite: add SATA bindings
  i.MX6: add enable_sata_clock()
  i.MX6: Add ANATOP regulator init
  mx28evk: add NAND support
  USB: ehci-mx6: Fix broken IO access
  M28: Scan only first 512 MB of DRAM to avoid memory wraparound
  Revert "i.MX28: Enable additional DRAM address bits"
  M28: Enable FDT support
  mx53loco: Add support for 1GHz operation for DA9053-based boards
  mx53loco: Allow to print CPU information at a later stage
  mx5: Add clock config interface
  imx-common: Factor out get_ahb_clk()
  i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
  mx31pdk: Allow booting a zImage kernel
  mx6qarm2: Allow booting a zImage kernel
  mx6qsabrelite: Allow booting a zImage kernel
  mx28evk: Allow booting a zImage kernel
  m28evk: Allow to booting a dt kernel
  mx28evk: Allow to booting a dt kernel
  mx6qsabrelite: No need to set the direction for GPIO3_23 again
  pmic: Add support for the Dialog DA9053 PMIC
  MX53: mx53loco: Add SATA support
  MX53: Add support to ESG ima3 board
  SATA: add driver for MX5 / MX6 SOCs
  MX53: add function to set SATA clock to internal
  SATA: check for return value from sata functions
  MX5: Add definitions for SATA controller
  NET: fec_mxc.c: Add a way to disable auto negotiation
  Define UART4 and UART5 base addresses
  EXYNOS: Change bits per pixel value proper for u-boot.
  EXYNOS: support TRATS board display function
  LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
  EXYNOS: support EXYNOS MIPI DSI interface driver.
  EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
  LCD: add data structure for EXYNOS display driver
  EXYNOS: add LCD and MIPI DSI clock interface.
  EXYNOS: definitions of system resgister and power management registers.
  SMDK5250: fix compiler warning
  misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
  misc:pmic:max8997 MAX8997 support for PMIC driver
  TRATS: modify the trats's configuration
  ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement
  EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
  arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  cm-t35: add I2C multi-bus support
  include/configs: Remove CONFIG_SYS_64BIT_STRTOUL
  include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF
  omap3: Introduce weak misc_init_r
  omap730p2: Remove empty misc_init_r
  omap5912osk: Remove empty misc_init_r
  omap4+: Remove CONFIG_ARCH_CPU_INIT
  omap4: Remove CONFIG_SYS_MMC_SET_DEV
  OMAP3: pandora: drop console kernel argument
  OMAP3: pandora: revise GPIO configuration
  ...
2012-05-20 21:31:26 +02:00
Rajeshwari Shinde
5f0ffea455 USB: S5P: Add ehci support
This patch adds ehci driver support for s5p.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-05-20 08:32:33 +02:00
Mike Frysinger
50a47d0523 net: punt bd->bi_ip_addr
This field gets read in one place (by "bdinfo"), and we can replace
that with getenv("ipaddr").  After all, the bi_ip_addr field is kept
up-to-date implicitly with the value of the ipaddr env var.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-15 17:32:05 -05:00
Simon Glass
e31c1e50ac tegra: i2c: Add function to find DVC bus
Add tegra_i2c_get_dvc_bus_num() to obtain the I2C bus number of DVC bus.
This allows us to talk to the PMU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Yen Lin
6570438a70 tegra: Add warmboot implementation
Add code to set up the warm boot area in the Tegra CPU ready for a
resume after suspend.

Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Jimmy Zhang
6860b4a1cc tegra: Add PMU to manage power supplies
Power supplies must be adjusted in line with clock frequency. This code
provides a simple routine to set the voltage to allow operation at maximum
frequency.

- Split PMU code into separate TPS6586X driver

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Jimmy Zhang
0e35ad053f tegra: Add EMC support for optimal memory timings
Add support for setting up the memory controller parameters. Boards
can set up an appropriate table in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:38 +02:00
Simon Glass
1d5dba604c tegra: Add header file for APB_MISC register
Add a basic header file for this register, to be filled in as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
d515362d4d tegra: Add tegra_get_chip_type() to detect SKU
We want to know which type of chip we are running on - the Tegra
family has several SKUs. This can be determined by reading a
fuse register, so add this function to ap20.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Yen Lin
f6f767a404 tegra: Add flow, gp_padctl, fuse, sdram headers
These headers provide access to additional Tegra features.

flow - start/stop CPUs
sdram - parameters for SDRAM
fuse - access to on-chip fuses / security settings
gp_padctl - pad control and general purpose registers

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
ffc76482c2 tegra: Add functions to access low-level Osc/PLL details
Add clock_ll_read_pll() to read PLL parameters and clock_get_osc_bypass()
to find out if the Oscillator is bypassed. These are needed by warmboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Simon Glass
f9f3e1b8df tegra: Move ap20.h header into arch location
We want to include this from board code, so move the header into
an easily-accessible location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:37 +02:00
Marek Vasut
ec4836be6e i.MX28: Add LRADC register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:36 +02:00
Marek Vasut
cfe96f7820 i.MX28: Add LCDIF register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:36 +02:00
Marek Vasut
f8c4a86b5e i.MX28: Implement boot pads sampling and reporting
This patch implements code that samples i.MX28 boot pads and reports boot mode
accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:35 +02:00
Marek Vasut
0239c2fb4a i.MX28: Improve passing of data from SPL to U-Boot
Pass memory size from SPL via structure located in SRAM instead of SCRATCH
registers. This allows passing more data about boot from SPL to U-Boot, like the
boot mode pads configuration.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-05-15 08:31:35 +02:00
Stefano Babic
c4559daa91 MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:

"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"

The values are currently negated in code - fixed.

Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:35 +02:00
Fabio Estevam
54cd1dee8f mx53loco: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.

The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.

Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Timo Ketola
8f385e958d i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
types.h must be included in imx-regs.h if one wants to include
imx-regs.h in a board configuration file. That for one's part is
necessary, if one wants to use addresses defined in imx-regs.h.

For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and
a proper thing is to define it with IMX_MMC_SDHCx_BASE in board
configuration file. This patch fixes the build in that case.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Timo Ketola
42d25327f5 i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's
implement get_clocks function. This is how it seems to be implemented
elsewhere.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Eric Nelson
64e7cdb5e8 i.MX6: add enable_sata_clock()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Dirk Behme
cac833a98c i.MX6: Add ANATOP regulator init
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.

Note: This should be but can't be done in the DCD. The bootloader
      prevents access to the ANATOP registers.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
2012-05-15 08:31:33 +02:00
Fabio Estevam
1fc56f1cb0 mx53loco: Allow to print CPU information at a later stage
Print CPU information within board_late_init().

This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Fabio Estevam
70cc86a630 mx5: Add clock config interface
mx5: Add clock config interface

Add clock config interface support, so that we
can configure CPU or DDR clock in the later init

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Fabio Estevam
6a376046ef imx-common: Factor out get_ahb_clk()
get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Stefano Babic
8c38b5d03d MX53: add function to set SATA clock to internal
The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.

As stated by Freescale's support:

Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
	SATA_ALT_REF_CLK[1:0] (offset 0x180C)

'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
d87c85ce43 MX5: Add definitions for SATA controller
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
4a9677e53f Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:30 +02:00
Donghwa Lee
2c7396cb1a EXYNOS: support EXYNOS MIPI DSI interface driver.
EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.

LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
board file and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:30 +02:00
Donghwa Lee
6d4339f622 EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
This patch support EXYNOS FB and FIMD display drivers.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
2012-05-15 08:31:29 +02:00
Donghwa Lee
37835d4ba8 EXYNOS: add LCD and MIPI DSI clock interface.
To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:29 +02:00
Donghwa Lee
283591f171 EXYNOS: definitions of system resgister and power management registers.
This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:29 +02:00
Chander Kashyap
90005092fc EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.

Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-05-15 08:31:28 +02:00
Grazvydas Ignotas
10cd73bf87 OMAP3: pandora: pin mux updates for DM3730 board variant
DM3730 needs some additional pin mux configuration for GPIOs
126-129 to work, add it.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2012-05-15 08:31:27 +02:00
Aneesh V
03f69dc6fd omap4+: Avoid using __attribute__ ((__packed__))
Avoid using __attribute__ ((__packed__)) unless it's
absolutely necessary. "packed" will remove alignment
requirements for the respective objects and may cause
alignment issues unless alignment is also enforced
using a pragma.

Here, these packed attributes were causing alignment
faults in Thumb build.

Signed-off-by: Aneesh V <aneesh@ti.com>
2012-05-15 08:31:26 +02:00
Aneesh V
7245536d19 arm: adapt asm/linkage.h from Linux
This will add ARM specific over-rides for the defines
from linux/linkage.h

Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2012-05-15 08:31:26 +02:00
SRICHARAN R
d417d1db5f OMAP3+: reset: Create a common reset layer.
The reset.S has the function to do a warm reset on OMAP
based socs. Moving this to a reset.c file so that this
acts a common layer to add any reset related functionality
for the future.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:25 +02:00
Balaji T K
dd23e59d59 omap5: pbias ldo9 turn on
Add omap5 pbias configuration for mmc1/sd lines
and set voltage for sd data i/o lines

Signed-off-by: Balaji T K <balajitk@ti.com>
2012-05-15 08:31:25 +02:00
Balaji T K
f75231b79a arm: omap5: correct boot device mode7 for eMMC
In OMAP5 Boot device mode of 6 and 7 should be mapped to mmc2/eMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2012-05-15 08:31:25 +02:00
SRICHARAN R
aaec44874f OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.
PD_TIM bit field which specifies the power down timing is defined
to occupy bits 8-11, where as it is actually from 12-15 bits.
So correcting this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:25 +02:00
SRICHARAN R
c1fa3c37af OMAP4/5: device: Add support to get the device type.
Add support to identify the device as GP/EMU/HS.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
002a2c0c66 OMAP4/5: Make the sysctrl structure common
Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
47c50143aa OMAP5: SRAM: Change the SRAM base address.
The full internal SRAM of size 128kb is public in the case of OMAP5 soc.
So change the base address accordingly.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
087189fb54 OMAP4/5: Make the silicon revision variable common.
The different silicon revision variable names was defined for OMAP4 and
OMAP5 socs. Making the variable common so that some code can be
made generic.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:24 +02:00
SRICHARAN R
8de17f4617 OMAP5: palmas: Configure nominal opp vdd values
The nominal opp vdd values as recommended for
ES1.0 silicon is set for mpu, core, mm domains using palmas.

Also used the right sequence to enable the vcores as per
a previous patch from Nishant Menon, which can be dropped now.
	http://lists.denx.de/pipermail/u-boot/2012-March/119151.html

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
f40107345c OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
6ad8d67de8 OMAP5: io: Configure the io settings for omap5430 sevm board.
The control module provides options to set various signal
integrity parameters like the output impedance, slew rate,
load capacitance for different pad groups. Configure these
as required for the omap5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00
SRICHARAN R
84b16af29f OMAP5: board: Add pinmux data for omap5_evm board.
Adding the full pinmux data for OMAP5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-05-15 08:31:23 +02:00