Commit graph

62036 commits

Author SHA1 Message Date
Marek Vasut
edaec53212 ARM: imx: vining2000: Repair PCIe support
Ever since the conversion to DM PCI, the board was missing the PCIe DT
nodes, hence the PCI did not really work. Fill in the DT nodes and add
missing PCIe device reset.

Moreover, bring the PCIe power domain up before booting Linux. This is
mandatory to keep old broken vendor kernels working, as they do not do
so and depend on the bootloader to bring the power domain up.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
b6b6c1d7bd ARM: imx: vining2000: Enable fitImage support
The fitImage support was enabled in the downstream U-Boot port and the
kernel images on the device are fitImage, yet this functionality is not
enabled in mainline U-Boot. Enable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
26822fd23c ARM: imx: vining2000: Convert to ethernet DM
Convert the board to ethernet DM support. Adjust board file accordingly,
as the board_eth_init() contains custom clock configuration required for
this board to work. Furthermore, enable FEC1 clock to make FEC1 work as
well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
5b97abab55 ARM: imx: vining2000: Enable DDR DRAM calibration
Enable DRAM calibration in SPL to improve behavior of the board
in edge conditions of the thermal envelope of the board and make
it even more stable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
7d84f4469f ARM: imx: vining2000: Convert to SPL framework
In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
df1b721f60 ARM: mx6: pmu: Expose PMU LDO configuration interface
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06 13:57:42 +01:00
Igor Opaniuk
c671d8af0b board: colibri_imx7: reserve DDR memory for Cortex-M4
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.

Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06 12:09:30 +01:00
Igor Opaniuk
949b5a969d common: fdt_support: add support for setting usable memory
Add support for setting linux,usable-memory property in the memory
node of device tree for the kernel [1].

This property holds a base address and size, describing a
limited region in which memory may be considered available for use by
the kernel. Memory outside of this range is not available for use.

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/chosen.txt

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06 12:09:25 +01:00
Fabio Estevam
1fae23899c warp7: Fix U-Boot corruption after saving the environment
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.

Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.

Fix this problem by increasing the CONFIG_ENV_OFFSET size.

Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.

CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Acked-by: Joris Offouga <offougajoris@gmail.com>
Tested-by: Joris Offouga <offougajoris@gmail.com>
2019-12-06 12:09:25 +01:00
Fabio Estevam
d396f1384c mx6: Allow configuring the NoC registers on i.MX6QP
The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.

Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06 12:09:25 +01:00
Fabio Estevam
87970cda6f mx6cuboxi: Add Baruch as maintainer
Add Baruch Siach as a mx6cuboxi maintainer.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
2019-12-06 12:05:08 +01:00
Fabio Estevam
2d4b87f867 mx7ulp: Sync the device tree related files
Sync the mx7ulp device tree related files with the one from
NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0).

The mainline support for i.MX7ULP is very premature at this stage.

We should probably re-sync with mainline Linux dts when it gets
in better shape, but for now sync with the U-Boot vendor code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
d136eb9bfe mx7ulp: scg: Remove unnused scg_a7_apll_init()
scg_a7_apll_init() is not called anywhere, so remove such dead code

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
0619af0942 mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitions
The LDOVL definitions is common to all the modes, not only RUN mode,
so in order to avoid confusion, remove the _RUN notation from the PMC1
LDOVL definitions.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
b8cabb0e3d mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE option
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards
designed to operate with LDO enabled mode can work with 0.95V at LDO
output in RUN mode as per the datasheet.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
72a093a8ac mx7ulp: Print the LDO mode status
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode
or LDO bypass mode.

Print the LDO mode status in the U-Boot log for convenience.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Patrice Chotard
ca2c6945b9 video: bmp: Fix video_display_rle8_bitmap()
In case the BMP size is bigger than the frame buffer, don't use
the BMP's width and height in video_display_rle8_bitmap, but the
one's checked in video_bmp_display() as parameters to
video_display_rle8_bitmap().

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
2019-12-06 09:07:45 +01:00
Patrice Chotard
1ebf2855b4 video: bmp: Fix video_splash_align_axis()
Convert panel_picture_delta and axis_alignment from unsigned long
to long to insure to store correctly the difference between
panel_size and picture_size in case the panel_size is smaller
than picture_size.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
[agust: change axis_alignment to long]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-12-06 09:07:45 +01:00
Tom Rini
28a4516cf1 Merge branch '2019-12-05-master-imports'
- Assorted omapl138_lcdk / da850-evm fixes
- FAT fix, add another pytest as well for FAT.
- Assorted general fixes
2019-12-05 16:37:36 -05:00
Ben Wolsieffer
b2e373d16b rockchip: allow loading larger kernels
Recent versions of the Linux kernel with many options enabled have
grown large enough to overwrite the beginning of the initrd. For
example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB,
while only 31.5 MiB are available between kernel_addr_r and
ramdisk_addr_r.

This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399,
allowing for much larger kernels.

Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
Ben Wolsieffer
893b4d0df4 rockchip: rk3328: rock64: enable CONFIG_MISC_INIT_R
This enables reading of the cpuid and a static MAC address.

Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
41eee945ce pinctrl: rockchip: Add pinctrl support for rk3308
An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.

For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.

So add a type IOMUX_8WIDTH_2BIT to calculate offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
e0e6c96a67 arm: rockchip: rk3308: Initialize the iomux configuration
When we want to use plus pinctrl feature, we need to enable
them at spl.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
4ee6d51c5a pwm: rk_pwm: Make PWM driver to support all Rockchip Socs
This PWM driver can be used to support pwm functions
for on all Rockchip Socs.

The previous chips than RK3288 did not support polarity,
and register layout was different from the RK3288 PWM.

The RK3288 keep the current functions.

RK3328 and the chips after it, which can support hardware lock,
configure duty, period and polarity at next same period, to
prevent the intermediate temporary state.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
aebd9eddb3 dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CC
The Firefly ROC_RK3308_CC use ref_clock of input mode,
and rmii pins of m1 group.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
982fab393d arm: dts: Add mac node for rk3308 at dtsi level
The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
0ed8f1e5f4 net: gmac_rockchip: Add support for rk3308
Add the glue code to allow the rk3308 variant of the Rockchip gmac
to provide network functionality.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
Kever Yang
502573686f rockchip: config: add support for firefly-px30 board
This is a core board named Core-PX30-JD4 with a mainboard from Firefly,
name it as firefly-px30 for now.
This board can re-use the dts of PX30, the only difference is the UART IO,
the firefly use UART2 M1 while evb use UART2 M0.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
Heiko Stuebner
fd3a7ae8e6 rockchip: misc: protect serial# from getting overwritten
serial# is one of the vendor properties and thus protected from being
overwritten if already set. If env_set is called anyway this result in
some nasty warnings, so check for presence before trying that.

In the same direction check for the presence of cpuid# and compare it
to the actual hardware and emit a warning if they don't match.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Heiko Stuebner
d490fadc70 rockchip: misc: don't fail if eth_addr already set
rockchip_setup_macaddr() runs from an initcall, so returning an error
code will make that initcall fail thus breaking the boot process.

And if an ethernet address is already set this is definitly not a
cause for that, so just return success in that case.

Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid");
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
c541bfda2f rockchip: px30: Add support for using UART3 as debug UART
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.

Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).

Future users should also note that the pinmux default in the dts is to use
the M1 pins while the Kconfig option takes M0 as a default.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
ec4fafdf1f rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL
UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
b0c5e37d0e rockchip: px30: Fixup PMUGRF registers layout order
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05 23:53:07 +08:00
Andy Yan
1b8114ac1e rockchip: evb-px5: disable NET
PX5 evb has no ETH port, so disable it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Andy Yan
afe18f205e rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Andy Yan
081a51c937 rockchip: rk3308: enable spl-fifo-mode for emmc
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

And show my best respect to Heiko's work for this solution.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Andy Yan
bbc8457ae0 doc: rockchip: Update build instruction for rk3308
After commit d8765e2422 ("Enable building of u-boot.itb
on Rockchip platform"), u-boot.itb will automatically
generated by "make all" command, manually command
"make u-boot.itb" is no longer needed.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Adam Ford
8cc738b9fc ARM: omapl138_lcdk: Shrink code size by building with Thumb
SPL has limited available resources, and the performance between
ARM and Thumb isn't that significant.

This patch builds using Thumb instruction set to reduce the code
size by nearly 6K.

Original:
   text	   data	    bss	    dec	    hex	filename
  26526	   4004	   1376	  31906	   7ca2	spl/u-boot-spl

Thumb:

   text	   data	    bss	    dec	    hex	filename
  20232	   4004	   1376	  25612	   640c	spl/u-boot-spl

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-05 10:28:39 -05:00
Thomas Hebb
9f67b56772 Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-05 10:28:39 -05:00
Adam Ford
81b564353d ARM: da850-evm: Disable SYS_MMCSD_RAW_MODE_USE_SECTOR
The da850-evm doesn't have the boot pins configured in a way
to make MMC/SD booting an option, and MMC/SD support is not
enabled in SPL.  Therefore, there is no need to support raw mode
mmc/sd support in SPL.

This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-12-05 10:28:39 -05:00
Giulio Benetti
d3e97b53c1 spl: fix entry_point equal to load_addr
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-05 10:28:39 -05:00
AKASHI Takahiro
995237b049 test/py: test_fs: add tests for creating/deleting many files
# This is actually a resent patch of
# [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html

Two test cases are added under test_fs_ext:
    test case 10: for root directory
    test case 11: for non-root directory

Those will verify a behavior fixed by the commits related to
root directory
("fs: fat: allocate a new cluster for root directory of fat32" and
"fs: fat: flush a directory cluster properly"), and focus on
handling long-file-name directory entries under a directory.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-05 10:28:38 -05:00
AKASHI Takahiro
39606d462c fs: fat: handle deleted directory entries correctly
Unlink test for FAT file system seems to fail at test_unlink2.
(When I added this test, I haven't seen any errors though.)
for example,
===8<===
fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img']

    def test_unlink2(self, u_boot_console, fs_obj_unlink):
        """
        Test Case 2 - delete many files
        """
        fs_type,fs_img = fs_obj_unlink
        with u_boot_console.log.section('Test Case 2 - unlink (many)'):
            output = u_boot_console.run_command('host bind 0 %s' % fs_img)

            for i in range(0, 20):
                output = u_boot_console.run_command_list([
                    '%srm host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i),
                    '%sls host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i)])
                assert('' == ''.join(output))

            output = u_boot_console.run_command(
                '%sls host 0:0 dir2' % fs_type)
>           assert('0 file(s), 2 dir(s)' in output)
E           AssertionError: assert '0 file(s), 2 dir(s)' in '            ./\r\r\n            ../\r\r\n        0   0123456789abcdef11\r\r\n\r\r\n1 file(s), 2 dir(s)'

test/py/tests/test_fs/test_unlink.py:52: AssertionError
===>8===

This can happen when fat_itr_next() wrongly detects an already-
deleted directory entry.

File deletion, which was added in the commit f8240ce95d ("fs: fat:
support unlink"), is implemented by marking its entry for a short name
with DELETED_FLAG, but related entry slots for a long file name are kept
unmodified. (So entries will never be actually deleted from media.)

To handle this case correctly, an additional check for a directory slot
will be needed in fat_itr_next().

In addition, I added extra comments about long file name and short file
name format in FAT file system. Although they are not directly related
to the issue, I hope it will be helpful for better understandings
in general.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-05 10:28:38 -05:00
Jorge Ramirez-Ortiz
2464b229b5 drivers: optee: rpmb: fix returning CID to TEE
The mmc CID value is one of the input parameters used to provision the
RPMB key. The trusted execution environment expects this value to be
specified in big endian format.

Before this fix, on little endian systems, the value returned by the
linux kernel mmc driver differed from the one returned by u-boot.
This meant that if linux provisioned the RPMB key, u-boot would not
have access to the partition (and the other way around).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2019-12-05 10:28:38 -05:00
Philippe Reynes
787f10a9d2 cmd: cp: add missing map_sysmem
The command cp fails on sandbox because the address is used
directly. To fix this issue, we call the function map_sysmem
to translate the address.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-12-05 10:28:38 -05:00
Philippe Reynes
ae0d12f8df iminfo: add missing map_sysmem
The command iminfo fails on sandbox because the address
is used directly. To fix this issue, we call the function
map_sysmem to translate the address.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-12-05 10:28:38 -05:00
Lukasz Majewski
d4d65e1125 spl: Introduce SPL_DM_GPIO Kconfig define
This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-12-05 10:28:38 -05:00
Michael Walle
a6cd597a78 drivers: pci: ignore disabled devices
PCI devices may be disabled in the device tree. Devices which are probed
by the device tree handle the "status" property and are skipped if
disabled. Devices which are probed by the PCI enumeration don't check
that property. Fix it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-05 10:28:38 -05:00
Tom Rini
7e5ee346fc Merge git://git.denx.de/u-boot-sh
- Convert some R-Car Gen3 platforms to DM_SPI{,_FLASH}
2019-12-04 18:10:04 -05:00
Tom Rini
0cfccb5401 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-04 17:18:38 -05:00