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17312 commits

Author SHA1 Message Date
Stephen Warren
29159057a1 mmc: detect boot sectors using EXT_CSD_BOOT_MULT too
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.

Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.

eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Thierry Reding
0bc069b2e4 tegra: Enable NAND on TEC
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Thierry Reding
62fd66f3d3 cmd_nand: dump: Align data and OOB buffers
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Stephen Warren
9614a1e963 tegra: enable NAND on Harmony
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
0dd84084de tegra: Enable NAND on Seaboard
This enables NAND support for the Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Jim Lin
312693c3dd tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
7cedd1811a tegra: fdt: Add NAND definitions to fdt
Add a flash node to handle the NAND, including memory timings and
page / block size information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Simon Glass
c6af2e7d87 tegra: fdt: Add NAND controller binding and definitions
Add a NAND controller along with a bindings file for review.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Simon Glass
35e1132c88 tegra: Add NAND support to funcmux
Add selection of NAND flash pins to the funcmux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Simon Glass
b572595ee9 nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-07 13:54:30 -07:00
Albert ARIBAUD
057df193b4 Merge remote-tracking branch 'u-boot-ti/master' into m 2012-09-05 20:20:04 +02:00
Tom Rini
14dace7058 am33xx: Remove redundant timer config
We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that
has been configuring and enabling the timer, so remove our code that
does the same thing by different methods.

Tested on EVM GP, SK-EVM and Beaglebone.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-04 17:05:39 -07:00
Stefano Babic
6298687557 OMAP3: mt_ventoux: added video support
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
fb380bfa8c OMAP3: video: add macros to set display parameters
Add a common macros to set the registers for horizontal
and vertical timing.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
baee780013 video: drop duplicate set of DISPC_CONFIG register
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
ff530fc7f0 OMAP3: mt_ventoux: disable the buzzer at start-up
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
9d5fc239cf OMAP3: mt_ventoux: read MAC address from EEPROM
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:39 -07:00
Stefano Babic
d0e9fb1cf9 OMAP3: mt_ventoux: activate GPIO4
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:38 -07:00
Stefano Babic
e40f6c4a1c OMAP3: mt_ventoux: Correct board pinmux
Fix some issues (some pins were not set as GPIOs)

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:38 -07:00
Stefano Babic
0b26b8751a OMAP3: twister : get MAC address from EEPROM
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:38 -07:00
Stefano Babic
8103c6f0fa OMAP3: tam3517: add function to read MAC from EEPROM
The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04 17:05:38 -07:00
Arnout Vandecappelle (Essensium/Mind)
4aaf06415f OMAP3: add definition of CTRL_WKUP_CTRL register
AM/DM37x SoCs add the CTRL_WKUP_CTRL register.  It contains the
GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads
of gpio_126, gpio_127 and gpio_129.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Cc: Tom Rini <trini@ti.com>
2012-09-04 17:05:38 -07:00
Albert ARIBAUD
6342fa00b2 Merge remote-tracking branch 'u-boot-atmel/master' into m 2012-09-04 23:21:12 +02:00
Markus Hubig
7d899c14cc Fixes the crippled console output on PortuxG20.
In order to use the serial interface on the PortuxG20 we need to enable the
level converter first by setting the PC9 pin to high. The level converter needs
some time to settle so we have to use the mdelay() function to wait for some
time. Unfortunately we have no timers available at board_early_init_f() so we
enable the serial output early within board_postclk_init().

Now the U-Boot output looks fine:

| U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32)
|
| CPU: AT91SAM9G20
| Crystal frequency:   18.432 MHz
| CPU clock        :  396.288 MHz
| Master clock     :  132.096 MHz
| DRAM:  64 MiB
| WARNING: Caches not enabled
| NAND:  128 MiB
| In:    serial
| Out:   serial
| Err:   serial
| Net:   macb0
| Hit any key to stop autoboot:  0

Signed-off-by: Markus Hubig <mhubig@imko.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04 22:06:19 +02:00
Markus Hubig
e23e5eeeb8 arm: Adds board_postclk_init to the init_sequence.
The board_postclk_init() function can be used to perform operations
that requires a working timer early within the U-Boot init_sequence.

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04 22:05:55 +02:00
Jens Scharsig
503e159b3e atmel: eb_cpux9k2: add ram target configuration
* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config)

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04 18:36:51 +02:00
Linus Walleij
e62b008fe3 integrator: break out common config
The configuration that is common for all Integrator boards may
just as well be stored in a common include file as per pattern
from other boards. This eases maintenance quite a bit.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-04 08:51:13 -07:00
Jens Scharsig
3bb183be71 eb_cpux9k2: fix chip select
* fix chip select initialization for frame buffer, this will be
  increase frame buffer access speed

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-03 22:11:49 +02:00
Michael Walle
a9f1a48933 lsxl: support power switch
This patch restores the Linkstation's original behaviour when powering off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the switch
is in the off position, before continuing the boot process again.

Additionally, this patch fixes the board function set_led(LED_OFF).

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:48:51 +05:30
Karl O. Pinc
1ff1f89c57 cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.
Hi,

This adds to the documenation to explain how to use the
kwbimage.cfg file necessary to generate an image with
prefixed board setup values necessary for the kirkwood
boards.

Signed-off-by: Karl O. Pinc <kop@meme.com>
2012-09-03 17:44:37 +05:30
Karl O. Pinc
32324b7f9d Cosmetic doc typo fixes to the kwbimage feature docs
Signed-off-by: Karl O. Pinc <kop@meme.com>
2012-09-03 17:41:36 +05:30
Holger Brunck
fcca7e7acc arm/km: remove unused code
For some reasons we had an own implementaion of dram_init and
dram_init_banksize. This is not needed anymore, use the standard
kirkwood functions instead.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:38:54 +05:30
Valentin Longchamp
05c8e81fd3 arm/km: fix frequency of the SPI NOR Flash
According to our last HW measures, this could be raised while still
compatible with the potential delays on the lines.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:36:31 +05:30
Valentin Longchamp
62c9b9603e km/ivm: fix string len check to support 7 char board names
The fanless boards now have a 7-digit (XXXXX-F) board name. This
triggers a border condition when reading this string in the IVM although
this string is smaller than the currenly read string size, but only by 1
character.

This patch corrects this by changing the size check condition for string
length. It is the same change that was done in the platform for this
same bug.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Bigler <stefan.bigler@keymile.com>
2012-09-03 17:32:58 +05:30
Valentin Longchamp
8203b201ea kw_spi: fix clock prescaler computation
The computation was not correct with low clock values: setting a 1MHz
clock would result in an overlap that would then configure a 25Mhz
clock.

This patch implements a correct computation method according to the
kirkwood functionnal spec. table 600 (Serial Memory Interface
Configuration Register).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:28:51 +05:30
Valentin Longchamp
f46b4a1aad km/arm: set SPI NOR Flash default parameters
These parameters are used by the the sf probe command that are used by
our update script and they therefore need to be set for all of our
boards.

The timing is the same as for the ENV SPI NOR Flash (since it's the
same physical device) and takes the boco2 delay on the bus into account.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2012-09-03 17:13:03 +05:30
Albert ARIBAUD
491f6c2f29 edminiv2: orion5x: fix GPIO inits and values
Orion5x did not actually write GPIO output values
or input polarities, and ED Mini V2 had bad or
missing values for GPIO settings.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03 17:04:29 +05:30
Wolfgang Denk
6e2fbdea1b Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
  tx25: Use generic gpio_* calls
  config: Always use GNU ld
  tools: add kwboot binary to .gitignore file
  fdt: Include arch specific gpio.h instead of asm-generic/gpio.h
  serial: CONSOLE macro is not used

Conflicts:
	board/karo/tx25/tx25.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-09-02 00:44:09 +02:00
Wu, Josh
df95321ca1 at91: 9x5: Enable PMECC for 5series ek board.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:15 +02:00
Wu, Josh
2ab4c74604 at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Tested-by: voice.shen@atmel.com
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
bdfd59aa0f at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
ae79794e54 at91: atmel_nand: remove unused variables.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
fe2185ea80 at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Bo Shen
1d7442e653 atmel: at91sam9x5: add spi flash boot support
Add at91sam9x5 series spi flash boot support

Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash

SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Bo Shen
3083efe212 arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INIT
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Andreas Bießmann
bfc325ed38 arm:at91-boards: remove console_init_f where unnecessary
A lot of at91 boards have the console_init_f in board_init. This is useless
cause it was called before by generic code in lib/board.c.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Jens Scharsig <esw@bus-elektronik.de>
cc: Stelian Pop <stelian@popies.net>
cc: Sedji Gaouaou<sedji.gaouaou@atmel.com>
cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
cc: Eric Benard <eric@eukrea.com>
Tested-by: voice.shen@atmel.com
Tested-by: voice.shen@atmel.com
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
2012-09-01 17:06:14 +02:00
Andreas Bießmann
82c4c64526 at91sam9263ek: remove unnecessary console_init_f
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>
2012-09-01 17:06:14 +02:00
Bo Shen
65c575506d spi: atmel: add WDRBT bit to avoid receive overrun
The atmel at91sam9x5 series spi has feature to avoid receive overren

Using the patch to enable it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Bo Shen
9bfc236872 atmel: at91sam9x5: fix name error for spi
Fix the name error

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Bo Shen
24699e86c8 Take over the maintainer for sam9g10 and sam9m10g45
As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach
any more.

So I wish to take over the maintainer for sam9g10 and sam9m10g45

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00