New hardware version cannot recognize the SD-Card
because the SYS_NRESWARM, set as GPIO, does not
guarantee the required reset time.
Change the pin function back to enable the
SYS_NRESWARM signal driven by the SOC.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Patch contains the same fixes as commit
4b9b2c300a
(missing CONFIG_OMAP3_GPIO_2) and commit
f9095aac793aa8917ab9b915c5d449e6dc8d3d30 (missing CONFIG_SPL_NAND_SOFTECC).
Same issues are relevant for the mcx board, too.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on tao3530. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: trini@ti.com
Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.
[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini <trini@ti.com>
There are some entries which produce the same binaries:
- ep8248E is equivalent to ep8248
- MPC8360ERDK_66 is equivalent to MPC8360ERDK
- Adder87x/AdderUSB is equivalent to Adder
- EVB64260_750CX is equivalent to EVB64260
I also notice
- Lite5200 is equivalent to icecube_5200
- Lite5200_LOWBOOT is equivalent to icecube_5200_LOWBOOT
- Lite5200_LOWBOOT08 is equivalent to icecube_5200_LOWBOOT08
But I am keeping them.
(Wolfgang suggested to do so because Lite5200* are referenced
in misc documents.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The 8th field of boards.cfg takes the form:
<board config name>[:comma separated config options]
We should describe explicitely the 8th field only when it is necessary
to do so.
Specify "-" in the 8th field if it is the same as 7th field.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
In an ext4 filesystem, the inode corresponding to a file has a 60-byte
area which contains an extent header structure and up to 4 extent
structures (5 x 12 bytes).
For files that need more than 4 extents to be represented (either files
larger than 4 x 128MB = 512MB or smaller files but very fragmented),
ext4 creates extent index structures. Each extent index points to a 4KB
physical block where one extent header and additional 340 extents could
be stored.
The current u-boot ext4 code is very inefficient when it tries to load a
file which has extent indexes. For each logical file block the code will
read over and over again the same blocks of 4096 bytes from the disk.
Since the extent tree in a file is always the same, we can cache the
extent structures in memory before actually starting to read the file.
This patch creates a simple linked list of structures holding information
about all the extents used to represent a file. The list is sorted by
the logical block number (ee_block) so that we can easily find the
proper extent information for any file block.
Without this patch, a 69MB file which had just one extent index pointing
to a block with another 6 extents was read in approximately 3 minutes.
With this patch applied the same file can be read in almost 20 seconds.
Signed-off-by: Ionut Nicu <ioan.nicu.ext@nsn.com>
This patch fixes the following warning messages coming out of
'drivers/net/smc91111.h' when compiled for 'vexpress_aemv8a':
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Currently this issue seems to surface when SMSC is compiled for 64-bit
ARMv8 platforms, so the change is protected under CONFIG_ARM64, so that
it doesn't break other existing platforms.
In addition this patch tries to fix some checkpatch errors and warnings
(others related to camel-casing and volatile usage will be addressed
by a later patch).
This fix has been tested on both ARMv8 foundation model v1 and v2.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
U-Boot supports various boot images for various SoCs.
It is annoying to modify .gitignore file every time
we add/delete boot images.
Fortunately, there is a simple rule:
Those with file name prefix "u-boot" at the top directory
are all generated files.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
For aarch64, unsigned long is 64-bit data. Memory commands should be fixed
with u32 for 32-bit address access. To be clear, ushort is replace with
u16, u_char is replaced with u8.
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
The directory name from an fdtdir directive in a PXE config file should
always be pre-pended to the DTB filename; it shouldn't matter whether
the DTB filename came from the $fdtfile environment variable, or whether
it was constructed dynamically from ${soc}-${board}.dtb. Fix the code to
always prepend the directory name.
Reported-by: Dennis Gilmore <dennis@ausil.us>
Fixes: c61d94d860 ("pxe: implement fdtdir extlinux.conf tag")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dennis Gilmore <dennis@ausil.us>
Tested-by: Dennis Gilmore <dennis@ausil.us>
This patch deal with error message of mtest command.
When test failed, the mtest command will output error information
that include memory address and value. But the address field is
not correct or misleading.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.
Signed-off-by: York Sun <yorksun@freescale.com>
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.
Signed-off-by: York Sun <yorksun@freescale.com>
Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.
Signed-off-by: York Sun <yorksun@freescale.com>
do_bootm_standanlone() calls ntohl(images->ep) which is wrong because
endianess conversion has already been done:
do_bootm()
\-do_bootm_states()
+-bootm_find_os()
| \-images.ep = image_get_ep();
| \-uimage_to_cpu(hdr->ih_ep);
\-boot_selected_os()
\-do_bootm_standanlone()
Without this conversion the code works correctly at least on AT91SAM9G45.
On big endian systems there should be no difference after applying this
patch because uimage_to_cpu(x) and ntohl(x) both expand to 'x'.
Signed-off-by: Christian Eggers <ceggers@gmx.de>
The Pi has no flash to store an environment in the usual fashion. However,
the user may wish to customize the environment. We know that the SD card
must be present, since that's where the boot ROM has loaded U-Boot from.
So, load uEnv.txt from there early during boot. This allows the user to
e.g. customize boot_targets, in order to automatically select network
boot.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Modify the rpi_b board to include the "distro defaults" header, so that
all the config options distros expect are enabled. Remove any #defines
that enable the same options from the rpi_b.h.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
pxe.c provides both the "pxe" command which relies on a network, and the
"sysboot" command which doesn't. Fix the file to compile when network
support isn't enabled. This is useful e.g. on the Raspberry Pi which has
no network support yet, but will soon support the sysboot command.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
In case of little-endian ARC700 instructions (which may include target
address) are encoded as middle-endian. That's why it's required to swap
bytes after read and ten right before write back.
But in case of big-endian ARC700 instructions are encoded as a plain
big-endian. Thus no need for byte swapping.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Noam Camus <noamc@ezchip.com>
Proper spelling of the boad marketing name is with upper case.
So changing it from lower case to upper case here.
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With accepted change to DW GMAC driver -
92a190aaab (net/designware - switch driver
to phylib usage) we need to update this board because
"designware_initialize" now accepts only 2 parameters instead of 4.
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This is required for proper functionality on big-endian targets.
Memory-mapped registres of ARC UART are not 32-bit words but 8-bit bytes
so on little-endian target either acessor (_l or _b) works fine.
On big-endian only _b accessors works as expected.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Tom Rini <trini@ti.com>
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
The commit:
"EXT4: Fix number base handling of "ext4write" command"
SHA1: f7740f7712
Cleaned up the ext4write command format.
This commit shall be regarded as a follow up, since the DFU subsystem is
using those commands for its normal operation.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.
(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Conflicts:
Makefile
drivers/net/npe/Makefile
These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
This file was only required for compilation of designware_i2c driver.
Since explicit inclusion of "hardware.h" is now removed from the driver
we may safely remove this empty header as well.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>
As soon as all boards have their CONFIG_SYS_I2C_BASE defined in
configuration files instead of "asm/arch/hardware.h" it's safe to remove
the inclusion in question and make driver platform-independent.
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Having CONFIG_SYS_I2C_BASE requires DW I2C driver to explicitly include
<arch/hardware.h> which other platforms may not have at all.
It's always good to have a driver platform-independent.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>
Adds support for set-speed on the OMAP24xx I2C Adapter.
Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).
Minor cosmetical changes.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Heiko Schocher <hs@denx.de>
Make sure the I2C write queue is empty before leaving the mxs_i2c_write().
If we start and I2C write and only wait for ACK, the MXS I2C IP block may
enter next operation while still processing the write aftermath internally.
This will in turn disrupt one or more subsequent transfer(s).
A testcase for this issue is as such. This testcase is also interesting because
the first I2C_WRITE which becomes disruptive happens in the 'i2c read' command.
The 'i2c read' command first uses I2C_WRITE to send I2C address of the chip and
then uses I2C_READ to read data from the chip. After this command completes, the
'i2c probe' will use sequence of I2C_WRITE commands to probe the I2C bus. The
problem is that the first I2C_WRITE disrupted the I2C IP block operation and
this sideeffect propagates all the way to this next I2C_WRITE used by the 'i2c
probe' call. The result is the 'i2c probe' receives an ACK on I2C address 0x00,
even if this ACK was owned by the previous I2C_WRITE operation. Note that the
'i2c read' command must read from a valid I2C chip address.
Wrong:
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 00 50 51
With this patch
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 50 51
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Enhance the DesignWare I2C driver to support address length more
than 1 byte. This enhancement is required as some I2C slave
device such as EEPROM chip might have 16 bit address byte.
Signed-off-by: Chin Liang See <clsee@altera.com>
Acked-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
The ADI twi peripheral is not binding to Blackfin processor only.
Access i2c registers by standard io functions.
Fix coding style.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
