Commit graph

7 commits

Author SHA1 Message Date
Andy Shevchenko
b95bc64b06 x86: Prevent from missing the FADT chaining
Recent approach with FADT writer shows that there is
a room for subtle errors. Prevent this from happening
again by introducing acpi_add_fadt() helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
2e977b2ce8 Reland "x86: Move FACP table into separate functions""
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.

Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22 06:03:46 +08:00
Andy Shevchenko
ce1cbf1ae0 Revert "x86: Move FACP table into separate functions"
Before the culprit patch (see BugLink for the details):

  => acpi list
  Name      Base   Size  Detail
  ----  --------  -----  ------
  RSDP  000e4500     24  v02 U-BOOT
  RSDT  000e4530     38  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  XSDT  000e45e0     4c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  CSRT  000e5490     58  v00 U-BOOT U-BOOTBL 20220401 INTL 0
  FACP  000e54f0    114  v06 U-BOOT U-BOOTBL 20220401 INTL 0
  DSDT  000e4780    c06  v02 U-BOOT U-BOOTBL 10000 INTL 20200925
  FACS  000e4740     40
  MCFG  000e5610     3c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  SPCR  000e5650     50  v02 U-BOOT U-BOOTBL 20220401 INTL 0
  APIC  000e56a0     48  v02 U-BOOT U-BOOTBL 20220401 INTL 0

After the culprit patch:

  => acpi list
  Name      Base   Size  Detail
  ----  --------  -----  ------
  RSDP  000e4500     24  v02 U-BOOT
  RSDT  000e4530     34  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  XSDT  000e45e0     44  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  CSRT  000e53a0     58  v00 U-BOOT U-BOOTBL 20220401 INTL 0
  MCFG  000e5520     3c  v01 U-BOOT U-BOOTBL 20220401 INTL 0
  SPCR  000e5560     50  v02 U-BOOT U-BOOTBL 20220401 INTL 0
  APIC  000e55b0     48  v02 U-BOOT U-BOOTBL 20220401 INTL 0

As a result Linux kernel can't find mandatory tables and fails
to boot.

Hence, revert it for good.

This reverts commit 379d3c1fd6.

BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-03-31 08:27:52 -04:00
Simon Glass
379d3c1fd6 x86: Move FACP table into separate functions
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-25 11:44:36 -07:00
Simon Glass
9910fc183a x86: Set up Chrome OS to boot into developer mode
Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
96d0aa9143 x86: Use CONFIG_CHROMEOS_VBOOT for verified boot
At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.

However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.

To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
da2c1b8fd9 x86: apl: Generate required ACPI tables
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00