Commit graph

15184 commits

Author SHA1 Message Date
Michal Simek
274ccb5b11 arm64: zynqmp: Move SoC sources to mach-zynqmp
Similar changes was done for Zynq in past and this patch just follow
this pattern to separate cpu code from SoC code.

Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/*
And also fix references to these files.

Based on
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:44 +01:00
Michal Simek
088f83ee3a arm64: zynqmp: Setup proper SPI dependency
Select DM_SPI/DM_SPI_FLASH for the whole SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Michal Simek
6f96fb508d ARM: zynqmp_r5: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Michal Simek
fb69310850 arm64: zynqmp: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Michal Simek
fa7971574c arm64: versal: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Siva Durga Prasad Paladugu
e7c9de6617 arm64: zynqmp: Fix mmc node names to be in sync with kernel
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Michal Simek
f11d4ab0b3 arm64: zynqmp: Do not protect zynqmp_pmufw_version()
There is hard dependency for CLK_ZYNQMP to have zynqmp_pmufw_version()
but also FPGA code is calling this function which is possible to use
without actual CLK_ZYNQMP firmware driver to be enabled.
This patch enables the case where only fixed-clock CLK setup is used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Horatiu Vultur
a834cb817f MSCC: Add board support for Serval SoC family.
Add board support and configuration for Jaguar2 SoC family.
The detection of the board type is based on the phy ids.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23 18:28:09 +01:00
Horatiu Vultur
6621288838 MSCC: Add device tree for Serval pcb106 board
Add device tree based on evaluation board pcb106.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23 18:28:09 +01:00
Horatiu Vultur
dda17e39c1 MSCC: add device tree for Serval pcb105 board
Add device tree based on evaluation board pcb105.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23 18:28:09 +01:00
Horatiu Vultur
1895b87e84 MSCC: Add support for Serval SoC family.
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are
found in Microsemi Switches solution.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-23 18:28:09 +01:00
Horatiu Vultur
036d95958b MSCC: Add board support for Servalt SoC family
Add board support, configuration and DTS for Servalt SoC
family. Currently there is one board in this family.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23 18:27:26 +01:00
Horatiu Vultur
055125171a MSCC: Add support for Servalt SoC family.
As Ocelot, Luton and Jaguar2, this family of SoCs are found
in Microsemi Switches solution.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-23 18:27:26 +01:00
Gregory CLEMENT
55037902b8 MIPS: mscc: ocelot: Add ethernet nodes for Ocelot
Import Ethernet related nodes from Linux

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-01-23 18:25:43 +01:00
Rick Chen
866ab879c9 nds32: dts: Fix mmc node compatible string
In the two commits:
cf3922dddc
mmc: ftsdc010_mci: Sync compatible with DT mmc node

c14e90e844
riscv: dts: Sync DT with Linux Kernel

ftsdc010_mci's compatible has been modified as
"andestech,atfsdc010" for RISC-V synchronization.
But ae3xx.dts and ag101p.dts which are used for
nds32 adp-ae3xx and adp-ag101p platforms did not
be modified correctly at that time. It will cause
mmc detection failure. Fix it here.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2019-01-22 17:36:20 +08:00
Rick Chen
e690148223 nds32: Fix boot fail issue when build with elf-mculib.
Add -mcmodel=large can let elf-mculib have
the same default behavior just like linux-glibc.
And it help to pass U-Boot booting sequence.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2019-01-22 17:36:04 +08:00
Rick Chen
9135858fb8 nds32: Generate SW fpu instruction.
Force it to generate SW fup instruction.
It help to avoid bugs when running on no-HW-fpu board, but
compile with v3f which support HW fpu instruction.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2019-01-22 17:35:57 +08:00
Rick Chen
28c107f05e nds32: Remove gcc unused option
-G0 is an old option, not support now,
So remove it.
It can help to fix compile error when
build with nds32 pre-build toolchain.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2019-01-22 17:35:53 +08:00
Tom Rini
e8ddbefccd Merge git://git.denx.de/u-boot-marvell
- Sync Armada-38x dts with Linux 4.20 from Chris
- Misc changes and enhancements to Turris Mox (v4) from Marek
- Reserve PSCI area for Armada 8k from Heinrich
- New Allied Telesis x530 board (Armada-385) from Chris
- Misc minor changes (defconfig etc)
2019-01-21 11:59:21 -05:00
Chris Packham
0e31666dfa ARM: mvebu: add support for Allied Telesis x530
This is a range of stackable network switches. The SoC is Armada-385 and
there are a number of variants with differing network port
configurations. The DP variants are intended for a harsher operating
environment so they use a different i2c mux and fit industrial-temp
parts.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:50 +01:00
Heinrich Schuchardt
cf63dad014 arm64: dts: marvell: armada-ap806: reserve PSCI area
The memory area [0x4000000-0x4200000[ is occupied by the PSCI firmware. Any
attempt to access it from U-Boot leads to an immediate crash.

So let's make the same memory reservation as the vendor device tree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:50 +01:00
Marek Behún
3b281aca41 arm: mvebu: turris_mox: Support 1 GB version of Turris Mox
Use get_ram_size to determine if the RAM size on Turris Mox is 512 MiB
or 1 GiB.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:50 +01:00
Marek Behún
3dc2f4549c arm: mvebu: dts: Fix Turris Mox device tree
DTC issues a warning because #address-cells and #size-cells properties
are not set in the mdio node.
Also add ethernet1 alias.
Also add RTC node.
Also fix USB3 regulator startup delay time.
Also fix PCI Express SERDES speed to 5 GHz (this is only cosmetic, the
speed value is not used byt the comphy driver for PCI Express, but
should be 5 GHz nonetheless).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:49 +01:00
Marek Behún
7dd7c2e796 arm: mvebu: turris_mox: Check and configure modules
Check if Mox modules are connected in supported mode, then configure
the MDIO addresses of switch modules.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:49 +01:00
Chris Packham
30c4383da3 ARM: mvebu: sync Armada-38x dts with Linux 4.20
Sync the Armada-38x device tree files with Linux 4.20-rc5. The changes
not taken are new compatible strings for the uart and nand flash
controller. The nand binding is best updated if/when the mtd/nand
infrastructure is updated.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-01-21 11:39:49 +01:00
Joakim Tjernlund
64d68dcdd7 mpc83xx: Add support for -msingle-pic-base
-msingle-pic-base is a new gcc(from 4.6) option for ppc and
it reduces the size of my u-boot with about 4 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc> (on MPC8308)
2019-01-21 08:33:42 +01:00
Philipp Tomsich
2acc24fc28 Kconfig: Migrate BOUNCE_BUFFER
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.

This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).

This commit includes a full migration using moveconfig.py to ensure
that each commit compiles.  To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.

[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
2019-01-19 09:49:26 -05:00
Tom Rini
77c07e7ed3 Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
 Add dts fixup for PCIe endpoint and root complex.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEorkTmaQ1QAtDiYw67UVZlNoLnbQFAlxCFVMACgkQ7UVZlNoL
 nbQJaA/9GQ+FpUj8AzsWmLd1JYMdjQeoltlYSicqV1oPkzjX3BsPncAYsr6cW2rm
 SMkriCw+xrlTgC8ge1dyzKxWqMovGzUFEGxpDJqIKCc16s8A/Ro+R0y8saNq1Y89
 MI2axPoaPDT4ZRCSWMzzFVv3lfdvFgGyygZljNlmiKqWp1//fE0OJD4ggE8SqgVo
 +5cMmufuhQhuFuFulQw6YwAOdrJ0eN8wb1SB9wJ8zwdwKn6Oy4CgkRGjJEjKRNoK
 Posw8FUPxQybXmsXW2vie9oomQqmI2A1ILzl1KvdRHSbW0N6P7MbAgsGH1vDPW0u
 dDAsutmkjYR7Ihq/4/5jcTdjkPd7LRJU/SSJzRSnZSD1uLDt5Z4jerQBq0BN9nMR
 peUS/nQ5LTT+rGBRevFT1I0hGNVHhArKGpumV8VRxlq7a30lUPSKhd3jOsadqVLU
 TchCZPjFIVaTrlz9NoX0Wa8bz+m5v1MygRiPkxERc8ft3cudn3rI83neeK1WVKSy
 uwSttQ+Q2uPXBvPq80fIKNToxkEBihPCbEHXZUUs3iE3r+jnRLAZ8CelAn1qK7n6
 fw1oduqOqupPVtYaLHZa6fAWj7lX0FCSge7z4oYu4ezCtoCutzUb6rgwHCpSLEA0
 OF/3fzb+Gn68GpcP23P0pPx+0UplEcmOT+f2/fUXgarUyxd5H/Y=
 =vNy2
 -----END PGP SIGNATURE-----

Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for more boards

Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
2019-01-18 23:11:51 -05:00
Felix Brack
2c3ec20fcc arm: dts: am335x-pdu001: Sync with Linux 5.0-rc2
This patch synchronizes the PDU001 board DTS file with the one used by
Linux 5.0-rc2.
Signed-off-by: Felix Brack <fb@ltec.ch>
2019-01-18 13:40:35 -05:00
Chris Packham
9259c92386 x86: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-01-18 09:16:15 -05:00
Chris Packham
d7cf868f88 arm: Kconfig: spelling fixes
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2019-01-18 09:16:15 -05:00
Ramon Fried
8d24a4776a mach-snapdragon: db410: pinctrl: fix pin count
Pin count in APQ8016 was wrong, fix that.

Fixes: ad97051b7f ("mach-snapdragon: Introduce pinctrl driver")
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-18 09:16:15 -05:00
Ramon Fried
b12e6945e9 dts: db410: fix indentation
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2019-01-18 09:16:15 -05:00
Tom Rini
f83ef0dac8 - MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
 - MIPS: optimised SPL linker script
 - MIPS: bcm6368: fix restart flow issues
 - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
 - MIPS: mt7688: small fixes and enhancements
 - mmc: compile-out write support if disabled
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAlw/LR0ACgkQKPlOlyTy
 XBg46xAAv3/7/aZuBhTYLmPuApcjJ/STGwHKtJTZUQtij6pxqbYDQB2AVzmjEbwk
 JR9KfXgvqcJK/XU3qVmrIs4kiHIKpC+y2diBgiCY26UVRFrmeKxP6T/AqLH6wCCG
 PEv0cE3U+XX2RX8VN0cItdhOuwnkbg09ToxAqfBrfPDTvI4xEO1EB28IVYozD16B
 ucBdUFkG4hB5JFqc+Sx8pJ2iSq4SmOp+mHD4sHM2XpbuMB4UnRNkjzQPk7gLHZUo
 i8wQ6tJoDKY07u9//QE75BkND/5dm1PflCNIrvH1/aJlv32lbHHf8Mm/ZEKCcth0
 dFAhalFnhl8TF8l8MgmDmjtlE52u9GUVGBJpRfc7EX1EzLm2dVu62dxBl9r4qyXM
 jj5BZBoXFeaeuA3Zm8Oui+jbkKExiuJOAgbvb5vMzyaQYN0mQjFyMBCOQQzBqBoe
 sRh/itYb0Ie0F0B2Y96mx1UgTQ4LGWtBaWrnuCQhrIB9iwt1vHA6DWNfA5PMelDK
 6iHLVBKYsV6sU+f7Ua9krczwP1p6y9u5XzW9teM7BLO5ab2vsI5/wz78OutAKmul
 NylqF3vtZDSGKz/duvEE54e4ltux0/xv5CFV/xO/bEiScNxGu8OPVIvtaAmgRomG
 vE7m63ZoI5DaxOpuBX4Qh8xOomshu3fM+1LnZ6sjulMXpoAE1vc=
 =Mxqj
 -----END PGP SIGNATURE-----

Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips

- MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
- MIPS: optimised SPL linker script
- MIPS: bcm6368: fix restart flow issues
- MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
- MIPS: mt7688: small fixes and enhancements
- mmc: compile-out write support if disabled
2019-01-17 19:12:55 -05:00
Rajesh Bhagat
220ce489a4 armv7: dts: ls1021a: Remove aliases property name warning
Remove aliases property name warning while compilation:
Warning (alias_paths): /aliases: aliases property name must
include only lowercase and '-'

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:45 -08:00
Laurentiu Tudor
a954f6fe70 armv8: fsl-layerscape: properly configure qdma ICID
The ICIDs for the qdma device are not configured through SCFG but
through some registers found in the actual device register block.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:15 -08:00
Hou Zhiqiang
5b994e85a5 armv8: ls1043a: correct the PCIe INTx fixup
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on
rev1.1 there is only 1 for INTx, so the current fixup is inverse
of the fact.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:16:44 -08:00
Hou Zhiqiang
ec88ff80ff armv8: ls1043a: add SVR definitions for 23x23 package silicon
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:16:40 -08:00
Rajesh Bhagat
9570df03ee armv8: ls2088ardb: Add TFABOOT support
TFABOOT support includes:
  - ls2088ardb_tfa_defconfig to be loaded by trusted firmware
  - environment address and size changes for TFABOOT
  - define BOOTCOMMAND for TFABOOT
  - remove EL3 specific erratas for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:16:22 -08:00
Pankit Garg
143af3c6d5 armv8: ls1088ardb: Add TFABOOT support
TFABOOT support includes:
- ls1088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- MC address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- ifc chip select changes for TFABOOT

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:16:04 -08:00
Rajesh Bhagat
d23da2ae21 armv8: fsl-layerscape: fixes for TFABOOT framework
Fixes for TFABOOT framework
- update eMMC bootsrc to SD_MMC
- Increase buffer size for mcinitcmd from 256 to 512
- Fix mcinitcmd and bootcmd for Secure Boot

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:15:25 -08:00
Simon Goldschmidt
f8878da557 arm: bootm: fix sp detection at end of address range
This fixes  'arch_lmb_reserve()' for ARM that tries to detect in which
DRAM bank 'sp' is in.

This code failed if a bank was at the end of physical address range
(i.e. size + length overflowed to 0).

To fix this, calculate 'bank_end' as 'size + length - 1' so that such
banks end at 0xffffffff, not 0.

Fixes: 15751403b6 ("ARM: bootm: don't assume sp is in DRAM bank 0")
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2019-01-16 23:16:25 -05:00
Stefan Roese
49f0b6bab9 mips: mt7688: gardena-smart-gateway: Enable green power LED on startup
Set the correct power-up state (default-state) of the green power LED.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 14:00:26 +01:00
Horatiu Vultur
c75c908316 MSCC: Add board support for Jaguar2 SOC family
Add board support and configuration for Jaguar2 SOC family.
The detection of the board type in this family is based on the phy ids.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Horatiu Vultur
393b77d8f9 MSCC: add device tree for Serval2 board
Add device tree based on evaluation board pcb112.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Horatiu Vultur
297edaec12 MSCC: Add device tree for Jaguar2-48 board
Add device tree based on evaluation board pcb111.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Horatiu Vultur
d1182056d3 MSCC: Add device tree for Jaguar2 board
Add device tree based on evaluation board pcb110.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Horatiu Vultur
e7a0de2c31 MSCC: Add support for Jaguar2 SOC family
As the Ocelot and Luton SoCs, this family of SoCs are found
in Microsemi Switches solution.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
6492c9168a mips: mscc: DT: Update luton device tree to use fast SPI driver
Thes patch change the luton base device tree to use the newly added
SPI bitbang driver.

It also updates the "mscc_luton_defconfig" to use the new driver.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Lars Povlsen
fd6e0b0525 mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.

Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00