Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.
Update the size of the test blob to allow these larger records.
Signed-off-by: Simon Glass <sjg@chromium.org>
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.
Update the code to correct this and add a little more documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.
Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.
Also make bloblist_first/next_blob() static as they are not used outside
this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient for bloblist to zero out the contents of a records when
it is added. This saves the callers having to do it.
Update the API accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
A common check is to see if a blob is present, create it if not and make
sure that the size is large enough. Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop inclusion of crc.h in common.h and use the correct header directly
instead.
With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.
Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.
Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
