Commit graph

35163 commits

Author SHA1 Message Date
Simon Glass
4f14d135f9 rockchip: jerry: Fix the SDRAM timing
There is a minor error in the SDRAM timing. It does not seem to affect
anything so far. Fix it just in case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
f23cf909ee rockchip: spl: Drop MMC support code when not needed
When the board does not use MMC SPL this code is a waste of space. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
affd4a9fa0 rockchip: Tidy up the register-access macros
These work reasonable well, but there are a few errors:

- Brackets should be used to avoid unexpected side-effects
- When setting bits, the corresponding upper 16 bits should be set also

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
2460d18c33 rockchip: sdram: Use syscon_get_first_range() where possible
This is a shortcut to obtaining a register address. Use it where possible, to
simplify the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
9368104d2f rockchip: sdram: Tidy up a few comments
Fix spaces in two comments in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
30fc0fdded rockchip: config: Enable the 'gpio' command
Now that we have a pretty good GPIO driver, enable the 'gpio' command on all
rockchip boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
002c634c1f rockchip: Add a script to parse datasheets
This script has proved useful for parsing datasheets and creating register
shift/mask values for use in header files. Include it in case it is useful
for others.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:37 -07:00
Simon Glass
74e53e0e9b rockchip: Add a simple 'clock' command
Add a command that displays the PLLs and their current rate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
ad443b7290 rockchip: Don't skip low-level init
At present the low-level init is skipped on rockchip. Among other things
this means that the instruction cache is left disabled. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
7b7ad5c31c rockchip: video: Add a video-output driver
Some rockchip SoCs include video output (VOP). Add a driver to support this.
It can output via a display driver (UCLASS_DISPLAY) and currently HDMI and
eDP are supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
5852d539ea rockchip: video: Add a display driver for rockchip eDP
Some Rockchip SoCs support embedded DisplayPort output. Add a display driver
for this so that these displays can be used on supported boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
c253948341 rockchip: video: Add a display driver for rockchip HDMI
Some Rockchip SoCs support HDMI output. Add a display driver for this so
that these displays can be used on supported boards.

Unfortunately this driver is not fully functional. It cannot reliably read
EDID information over HDMI. This seems to be due to the clocks being
incorrect - the I2C bus speed appears to be up to 100x slower than the
clock settings indicate. The root cause may be in the clock logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
830a608170 rockchip: clk: Add support for clocks needed by the displays
The displays need to use NPLL and also select some new peripheral clocks.
Add support for these to the clock driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
009741fbae rockchip: Rename the CRU_MODE_CON fields
These should match the datasheet naming. Adjust them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
2dcf143398 dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides
are shared with other types of output devices, such as HDMI and LVDS LCD
displays.

Generalise the uclass so that it can be used with these devices as well.
Adjust the uclass to handle the EDID reading and conversion to
display_timing internally.

Also update nyan-big which is affected by this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
cd9c2070ea video: panel: Add a simple panel driver
Most panels are very simple - they just have a power supply and a backlight.
Add a driver which supports this and implements the enable_backlight()
method.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
f563dc1d19 dm: panel: Add a panel uclass
LCD panels can usefully be modelled as their own uclass. They can be probed
(which powers them up ready for use). If they have a backlight, this can be
enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
65fba5927c dm: backlight: Add a driver for a PWM backlight
Many backlights need to use a PWM to control the brightness. Add a driver
for this. It understands the standard device tree binding.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
363bf77acc dm: backlight: Add a backlight uclass
LCD panels normally have a backlight which can be controlled to illuminate
the LCD contents. Add a uclass to support this. Initially it only has a
method to enable the backlight.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
0e23fd81a5 pwm: rockchip: Add a PWM driver for Rockchip SoCs
Add a simple driver which implements the standard PWM uclass interface.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
fc760cb8c4 dm: pwm: Add a PWM uclass
Add a uclass that supports Pulse Width Modulation (PWM) devices. It
provides methods to enable/disable and configure the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
d4bf91ada1 video: bridge: Allow GPIOs to be optional
Some video bridges will not have GPIOs to control reset, etc. Allow these
to be optional.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
68dcdc99c5 video: Add a function to control cache flushing
Allow the cache-flushing function of a video device to be controlled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
f1a1247d89 video: Name consoles by their number
We must use the console name in the 'stdout' variable to select the one
we want. At present the name is formed from the driver name with a suffix
indicating the rotation value.

It seems better to name them sequentially since this can be controlled by
driver order. So adjust the code to use 'vidconsole' for the first,
'vidconsole1' for the second, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
66280e82f7 gpio: Warn about invalid GPIOs used with the 'gpio' command
At present there is no indication that an invalid GPIO is used except that
the GPIO status is not displayed. Make the error more explicit to avoid
confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
35a1f0dfa1 stdio: Correct a build error with driver model
When driver model is used for video but not for the keyboard, a compiler
warnings is produced. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
27a1961d0b rockchip: jerry: Enable the Chrome OS EC
Turn on the EC and enable the keyboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
90a28470fc rockchip: spi: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver. The exception is when we want to use a different chip select
(other than 0). But this isn't used at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
e15af8e2cd rockchip: spi: Correct chip-enable code
At present there is an incorrect call to rkspi_enable_chip(). It should
be disabling the chip, not enabling it. Correct this and ensure that the
chip is disabled when releasing the bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
183a3a0f67 rockchip: spi: Implement the delays
Some devices need delays before and after activiation. Implement these
features in the SPI driver so that we will be able to enable the Chrome
OS EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
486478282e rockchip: gpio: Implement the get_function() method
Provide this method so that 'gpio status' works fully. It now shows
whether a pin is used for input, output or some other function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7d0c2c3feb rockchip: gpio: Read the GPIO value correctly
This function should return 0 or 1, not a mask. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
78a10b6656 rockchip: pinctrl: Implement the get_gpio_mux() method
Implement this so that the GPIO command will be able to report whether a
GPIO is used for input or output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
63c52648e4 rockchip: pinctrl: Reduce the size for SPL
This file has many features that are not needed by SPL. Use #ifdef to
remove the unused features and reduce the code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
5ddf5d7705 rockchip: clk: Make rkclk_get_clk() SoC-specific
The current method assumes that clocks are numbered from 0 and we can
determine a clock by its number. It is safer to use an ID in the clock's
platform data to avoid the situation where another clock is bound before
the one we expect.

Move the existing code into rk3036 since it still works there. Add a new
implementation for rk3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
2b9fe111ec rockchip: spi: Correct the bus init code
Two of the init values are created locally so cannot be out of range.
The masking is unnecessary and in one case is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
28a943c110 rockchip: spi: Remember the last speed to avoid re-setting it
Rather than changing the clock to the same value on every transaction,
remember the last value and don't adjust the clock unless it is necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
a49dc0a914 rockchip: reset: Use the rk_clr/setreg() interface
Use this function in preference to the macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
0906995bf3 rockchip: sdram: Use the rk_clr/setreg() interface
Use this function in preference to the macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
a4b10c088c dm: clk: Add a simple version of clk_get_by_index()
This function adds quite a bit of code to SPL and we probably don't need
all the features in SPL. Add a simple version (for SPL only) to save space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
364809de31 dm: power: Allow regulators to not implement all operations
Some regulators will not implement any operations (e.g. fixed regulators).
This is not an error, so allow the autoset process to continue when one
of these regulators is found.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7d5779993d dm: power: Tidy up debugging output and return values
The currect PMIC debugging is a little confusing. Adjust it so that it is
clear whether the operation succeeded or failed. Also, avoid creating a new
error return value when a perfectly good one is already available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1b30d61d78 dm: core: Export uclass_find_device_by_of_offset()
It is sometimes useful to be able to find a device before probing it,
perhaps to set up some platform data for it. Allow finding by of_offset
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
77eaa19e73 dm: pinctrl: Add a way for a GPIO driver to obtain a pin function
GPIO drivers want to be able to show if a pin is enabled for input, output,
or is being used by another function. Some drivers can easily find this
and the code is included in the driver. For some SoCs this is more complex.
Conceptually this should be handled by pinctrl rather than GPIO. Most
pinctrl drivers will have this feature anyway.

Add a method by which a GPIO driver can obtain the pin mux value given a
GPIO reference. This avoids repeating the code in two places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1f2b4b06ae dm: power: Allow regulators to be omitted from SPL
For some boards the pmic interface is useful but the regulator interface
(which comes with it) is too large. Allow them to be separated such that
SPL can decide which it needs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d178a1c5b2 spi: Correct device tree usage in spi_flash_decode_fdt()
This function currently searches the entire device tree for a node that
it thinks is relevant. But the node is known and is passed in. Correct the
code and enable it only with driver model, since only driver-model boards
will use it.

This avoids bringing in a large number of strings from fdtdec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
4082fce924 dm: i2c: Allow muxes to be enabled for SPL separately
Since I2C muxes are seldom needed in SPL, and the code for this increases
the size somewhat, add a separate option to enable I2C muxes for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d7248c42f1 cros_ec: Disable the Chrome OS EC in SPL
This is not used in SPL so don't allow it to be built there, even if I2C
is enabled in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
0ffe6ab521 gpio: Allow 's' as an abbreviation for 'status'
The 'gpio' command allows abbreviations for most subcommands. Allow them
for 'status' also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
69a050483e rockchip: jerry: Drop unused options
To reduce the SPL image size, drop the LED features. Jerry does not have
an LED and we can leave out GPIO support also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00