Commit graph

17 commits

Author SHA1 Message Date
Oleksandr Suvorov
fb2b88567d fpga: add option for loading FPGA secure bitstreams
It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:42:16 +02:00
Alexander Dahl
8c09cb6f4d fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig
This converts the following to Kconfig: SYS_FPGA_PROG_FEEDBACK

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-3-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:39:43 +02:00
Alexander Dahl
e8ffc1dfcb fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
After commit 8cca60a2cb ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:39:43 +02:00
Tom Rini
6e52cb259b Convert CONFIG_FPGA_STRATIX_V to Kconfig
This converts the following to Kconfig:
   CONFIG_FPGA_STRATIX_V

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-28 17:11:48 -04:00
Siew Chin Lim
9a5bbdfd1a arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Chee Hong Ang
bd99fa59d5 arm: socfpga: agilex: Enable FPGA Full Reconfiguration support
Enable FPGA full reconfiguration support with Intel FPGA SDM
Mailbox driver for Agilex.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:12 +08:00
Chee Hong Ang
d2170168dd fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:12 +08:00
Siva Durga Prasad Paladugu
26e054c943 arm64: versal: fpga: Add PL bit stream load support
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Robert Hancock
25d63a3677 fpga: virtex2: added Kconfig option
Add an option to allow this driver to be selected with Kconfig. As noted
in the description, this driver should also work with many newer Xilinx
FPGA families as the programming methods are essentially the same.

Also added a missing FPGA_XILINX dependency to the similar Spartan 3
driver.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-30 10:20:06 +02:00
Ang, Chee Hong
c41e660b6b arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
Enable FPGA reconfiguration support for Stratix 10 SoC.

Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20 17:12:25 +01:00
Michal Simek
a225f8100c fpga: Kconfig: Replace spaces with tabs
Trivial Kconfig cleanup. Use tabs instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-11 10:58:41 +02:00
Vipul Kumar
3990c9d627 arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:25 -05:00
Vipul Kumar
f415834608 fpga: Added Kconfig support for FPGA_SPARTAN3
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:04 -05:00
Tien Fong Chee
fa23ba1aa5 kconfig: Convert FPGA_SOCFPGA configuration to Kconfig
This converts the following to Kconfig:
   CONFIG_FPGA_SOCFPGA

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-07-26 10:31:44 +02:00
Patrick Bruenn
98d62e618b arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC
Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.

The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2016-12-16 12:57:12 +01:00
Siva Durga Prasad Paladugu
6b24501438 fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:21 +02:00
Michal Simek
6ded73aa97 fpga: Add Kconfig to fpga subsystem
Add missing Kconfig to fpga subsystem to be able
to add new options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:14 +02:00