Commit graph

9 commits

Author SHA1 Message Date
Kim Phillips
1a2e203b31 mpc83xx: turn on icache in core initialization to improve u-boot boot time
before, MPC8349ITX boots u-boot in 4.3sec:

        column1 is elapsed time since first message
        column2 is elapsed time since previous message
        column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA:  Configured for compact flash
0.032 0.000: I2C:   ready
0.061 0.028: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI:   Bus Dev VenId DevId Class Int
2.652 0.011:         00  10  1095  3114  0180  00
2.652 0.000: PCI:   Bus Dev VenId DevId Class Int
2.652 0.000: In:    serial
2.652 0.000: Out:   serial
2.652 0.000: Err:   serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE:   Bus 0: .** Timeout **

after, MPC8349ITX boots u-boot in 3.0sec:

0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU:   e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA:  Configured for compact flash
0.038 0.000: I2C:   ready
0.038 0.000: DRAM:  256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI:   Bus Dev VenId DevId Class Int
1.390 0.000:         00  10  1095  3114  0180  00
1.390 0.000: PCI:   Bus Dev VenId DevId Class Int
1.400 0.010: In:    serial
1.400 0.000: Out:   serial
1.400 0.000: Err:   serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net:   TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE:   Bus 0: .** Timeout **

also tested on these boards (albeit with a less accurate
boottime measurement method):

seconds: before  after
8349MDS  ~2.6    ~2.2
8360MDS  ~2.8    ~2.6
8313RDB  ~2.5    ~2.3 #nand boot
837xRDB  ~3.1    ~2.3

also tested on an 8323ERDB.

v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:44:56 -05:00
Kim Phillips
a059e90e16 mpc83xx: enable command line autocompletion
because it's convenient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22 18:34:49 -05:00
Kim Phillips
4e7e12dfa1 mpc83xx: vme8349: fix incorrect BR0_PRELIM port size comment
commit 98d92d8c9f "sbc8349: fix incorrect
comment" missed this one.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-03-02 11:24:35 -06:00
Reinhard Arlt
1dee9be683 mpc83xx: Add support for MPC8349 esd caddy2
The caddy2 is a variant of the already supported vme8349. So we just
add the differences to this board port. To better support those two
boards we switched from fixed SDRAM configuration to usage of
spd_sdram(). This is done by providing a board specific SPD EEPROM
routine with different values for both boards.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

changed to use mkconfig -t option instead, plus misc codingstyle fixes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:31 -06:00
Paul Gortmaker
efaf6f1bf6 mpc83xx: cosmetic comment update relating to SPD EEPROM
commit 6d0f6bcf33 did the big
rename of CFG_ macros to CONFIG_SYS macros.  But it missed
a couple of instances within comments.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-10-09 14:09:15 -05:00
Kim Phillips
c7190f028f mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_<registername>_<bitfield> assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-09-26 21:19:38 -05:00
Kim Phillips
79f516bccc mpc83xx: accommodate larger kernel sizes by default
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:11:44 -05:00
Paul Gortmaker
193b4cb3f6 mpc83xx: mpc8349 - delete unused SYS_MID_FLASH_JUMP
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.

  u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
  include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
  include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  u-boot$

It currently isn't used, so delete it before it spreads further.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:10:04 -05:00
Reinhard Arlt
c2e49f706b mpc83xx: Add esd VME8349 board support
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 18:36:36 -05:00