Commit graph

3 commits

Author SHA1 Message Date
Michal Simek
64fc7fc887 soc: xilinx: versal-net: Add soc_xilinx_versal_net driver
Add soc_xilinx_versal_net driver to identify the family & revision of
versal-net SoC. Add Kconfig option CONFIG_SOC_XILINX_VERSAL_NET to
enable/disable this driver. To enable this driver by default, add this
config to xilinx_versal_net_virt_defconfig file. This driver will be
probed using platdata U_BOOT_DEVICE structure which is specified in
mach-versal-net/cpu.c.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/613d6bcffd9070f62cf348079ed16c120f8fc56f.1668612993.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Michal Simek
1e681448a3 spi: cadence_qspi: Add support for Versal NET platform
Trivial changes to support cadence ospi driver for Versal NET platform.
Also avoid ospi flash reset for now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
f6aebdf676 arm64: versal-net: Add support for Versal NET platform
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00