Commit graph

10 commits

Author SHA1 Message Date
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Simon Glass
f1683aa73c board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-13 09:40:57 -04:00
Simon Glass
088454cde2 board_f: Drop return value from initdram()
At present we cannot use this function as an init sequence call without a
wrapper, since it returns the RAM size. Adjust it to set the RAM size in
global_data instead, and return 0 on success.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:59:20 -04:00
Simon Glass
52c411805c board_f: Drop board_type parameter from initdram()
It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:58:44 -04:00
Shengzhou Liu
90101386f1 fsl/board/ddr: optimize board-specific cpo for erratum A-009942
Optimize board-specific cpo for erratum A-009942 on b4860qds,
ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb,
t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb,
t4qds, t4rdb boards.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-15 11:56:39 -08:00
Tom Rini
cc749523ae Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2016-06-04 12:12:26 -04:00
Shengzhou Liu
5349928277 board/freescale: Use unified setup_ddr_tlbs for spl boot and non-spl boot
We should use unified setup_ddr_tlbs() for spl boot and non-spl boot
to make sure 'M' bit is set for DDR TLB to maintain cache coherence.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 22:12:54 -07:00
Shengzhou Liu
e04f9d0c2f board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 14:06:57 -07:00
tang yuantian
2c537642e9 mpc85xx/t102xqds: convert deep sleep to generic board interface
A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-01-16 09:31:26 -08:00
Shengzhou Liu
aba8004818 powerpc/t1024qds: Add T1024 QDS board support
T1024QDS is a high-performance computing evaluation, development and
test platform for T1024 QorIQ Power Architecture processor.

T1024QDS board Overview
-----------------------
- T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
  prioritization and bandwidth allocation
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
  - Two 10M/100M/1G RGMII ports on-board
  - Three 1G/2.5Gbps SGMII ports
  - Four 1Gbps QSGMII ports
  - one 10Gbps XFI or 10Base-KR interface
- SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora
- PCIe: Three PCI Express controllers with five PCIe slots.
- IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- Video: DIU supports video up to 1280x1024x32 bpp.
  - Chrontel CH7201 for HDMI connection.
  - TI DS90C387R for direct LCD connection.
  - Raw (not encoded) video connector for testing or other encoders.
- QUICC Engine block
  - 32-bit RISC controller for flexible support of the communications peripherals
  - Serial DMA channel for receive and transmit on all serial channels
  - Two universal communication controllers, supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- eSPI: Three SPI flash devices.
- SATA: one SATA 2.O.
- USB: Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- eSDHC: Support SD, SDHC, SDXC and MMC/eMMC.
- I2C: Four I2C controllers.
- UART: Two UART on board.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT
	   Fix Kconfig by adding SUPPORT_SPL]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-05 08:06:15 -08:00