This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
i.e, to those parts that have PHY_CLK_VALID bits in their USB
CONTROL registers:
mpc8308 WU_INT, PHY_CLK_SEL, USB_EN, WU_INT_EN, ULPI_INT_EN
mpc831x PHY_CLK_VALID, WU_INT, CLKIN_SEL, PHY_CLK_SEL, UTMI_PHY_EN,
PLL_RESET, REFSEL, OTG_PORT, KEEP_OTG_ON, LSF_EN, USB_EN,
ULPI_INT_EN
mpc834x USB_EN, ULPI_INT1_EN (MPH only), ULPI_INT0_EN
mpc837x USB_EN, ULPI_INT_EN
(mpc832x, mpc8360 don't have a USB_EHCI_FSL compatible controller)
this prevents non-831x parts from never completing cpu_init_f(),
because the (non-existent) PHY_CLK_VALID bit never gets set.
Reported-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Commit 29c6fbe "MPC5121: Add USB EHCI support" renamed
CONFIG_SYS_MPC8xxx_USB_ADDR into CONFIG_SYS_FSL_USB_ADDR but missed
to update arch/powerpc/cpu/mpc83xx/cpu_init.c, resulting in:
cpu_init.c: In function 'cpu_init_f':
cpu_init.c:332: error: 'CONFIG_SYS_MPC8xxx_USB_ADDR' undeclared (first use in this function)
cpu_init.c:332: error: (Each undeclared identifier is reported only once
cpu_init.c:332: error: for each function it appears in.)
make[1]: *** [/work/wd/tmp-ppc/arch/powerpc/cpu/mpc83xx/cpu_init.o] Error 1
Fix this.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for setting PCIE clocks in cpu_init.c by
providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit c7190f028f "mpc83xx:
retain POR values of non-configured ACR, SPCR, SCCR, and LCRR
bitfields" incorrectly shifted <register>_<bitfield> (e.g.
ACR_PIPE_DEP) values that were preshifted by their
definition in mpc83xx.h.
this patch removes the unnecessary shifting for the newly
utilized mask values in cpu_init.c, and prevents seemingly
unrelated symptoms such as an mpc8379erdb board from
locking up whilst performing a networking operation,
e.g. a tftp.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.
Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Renamed from arch/ppc/cpu/mpc83xx/cpu_init.c (Browse further)
