Commit graph

73 commits

Author SHA1 Message Date
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
York Sun
316f0d0f8f powerpc: mpc85xx: Fix static TLB table for SDRAM
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-12-06 14:54:12 -08:00
York Sun
cdab5e909a powerpc: mpc8568mds: Update board config
Enable DHCP command by default. Move environmental variable location
to before U-Boot image. Enlarge reserved mem for malloc. Update
maintainer.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12 12:18:37 -07:00
Tom Rini
5b8031ccb4 Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously.  Convert all of these to the correct SPDX-License-Identifier
tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-19 08:31:21 -05:00
Simon Glass
e895a4b06f fdt: Allow ft_board_setup() to report failure
This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.

Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.

Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2014-11-21 04:43:15 +01:00
Masahiro Yamada
535aad29f2 MAINTAINERS: comment out blank M: field
Since commit ddaf5c8f30
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.

Anyway, "M:    -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer.  Let's comment out.

This commit can be reproduced by the following command:

find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-24 18:30:28 -04:00
Masahiro Yamada
461be2f96e kconfig: remove redundant "string" type in arch and board Kconfigs
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.

We can delete the ones in arch and board Kconfig files.

This commit can be easily reproduced by the following command:

find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
    N
    s/\n[[:space:]]*string//
}
'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-13 16:43:55 -04:00
Masahiro Yamada
93d4334f7f Add board MAINTAINERS files
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.

The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.

After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.

TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:06 -04:00
Masahiro Yamada
dd84058d24 kconfig: add board Kconfig and defconfig files
This commit adds:
 - arch/${ARCH}/Kconfig
    provide a menu to select target boards
 - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
 - configs/${TARGET_BOARD}_defconfig
    default setting of each board

(This commit was automatically generated by a conversion script
based on boards.cfg)

In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.

But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:01 -04:00
York Sun
5614e71b49 Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25 11:43:43 -08:00
Masahiro Yamada
377e1048d3 board: powerpc: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Stefan Roese <sr@denx.de>
2013-11-01 11:42:12 -04:00
Wolfgang Denk
3765b3e7bd Coding Style cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-14 16:06:53 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Kim Phillips
e56143e54f powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Kumar Gala
502dd36b78 board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning
Fix:

mpc8568mds.c: In function 'local_bus_init':
mpc8568mds.c:150:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8568mds.c: In function 'pib_init':
mpc8568mds.c:271:11: warning: variable 'orig_i2c_bus' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:49:00 -06:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Zhao Chenhui
b092072e47 powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:10 -05:00
Kumar Gala
c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board
Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
5df4b0ad0d powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq()
and every 86xx board uses get_bus_freq().  If implement get_ddr_freq()
as a static inline to call get_bus_freq() we can remove
fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq()
directly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:40 -05:00
Kumar Gala
5f7bbd13a8 powerpc/85xx: Convert MPC8568MDS to use common SRIO init code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:21 -06:00
Kumar Gala
3f6f9d7641 powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8568MDS board and utilize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:20 -06:00
Becky Bruce
7ea3871e06 MPC8xxx DDR: align informational prints
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c.  Output now looks like
this:

....
DRAM:  Detected 4096 MB of memory
       This U-Boot only supports < 4G of DDR
       You could rebuild it with CONFIG_PHYS_64BIT
       DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....

The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
70961ba414 mpc85xx: rename sdram_init() lbc_sdram_init()
sdram_init() is used to initialize sdram on the lbc.  Rename it
accordingly.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Becky Bruce
38dba0c2ff mpc85xx boards: initdram() cleanup/bugfix
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts.  Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others.  I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document.  It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled.  This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Kumar Gala
5d27e02c04 powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured
Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14 01:32:19 -06:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Peter Tyser
8ca78f2c89 fsl: Clean up printing of PCI boot info
Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup.  This
patch unifies the style to look like:

...
NAND:  1024 MiB
PCIE1: connected as Root Complex
           Scanning PCI bus 01
        04  01  8086  1010  0200  00
        04  01  8086  1010  0200  00
        03  00  10b5  8112  0604  00
        02  01  10b5  8518  0604  00
        02  02  10b5  8518  0604  00
        08  00  1957  0040  0b20  00
        07  00  10b5  8518  0604  00
        09  00  10b5  8112  0604  00
        07  01  10b5  8518  0604  00
        07  02  10b5  8518  0604  00
        06  00  10b5  8518  0604  00
        02  03  10b5  8518  0604  00
        01  00  10b5  8518  0604  00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
           Scanning PCI bus 0d
        0d  00  1957  0040  0b20  00
PCIE2: Bus 0c - 0d
In:    serial
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
2010-11-14 23:46:42 +01:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Kumar Gala
6525d51fa5 powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete.  Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Peter Tyser
64917ca389 PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-01-17 23:06:44 +01:00
Kumar Gala
4681457e2a ppc/85xx: Clean up MPC8568 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
3e7b6c1f2d ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-08 09:10:07 -05:00
Kumar Gala
ec79d33b2c 85xx: Move to a common linker script
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one.  Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:39 -05:00
Kumar Gala
53efa1f1ac 85xx: Remove redudant PLATFORM_CPPFLAGS
For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:

PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

However these are all captured in the config.h and thus redudant.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:37 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
32049b4048 fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:30 -05:00
Kumar Gala
c8514622e2 fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:29 -05:00
Kumar Gala
b0fe93eda6 85xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-30 13:33:49 -05:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Kumar Gala
5af0fdd81c 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
a6e04c344a 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards
Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs.  This is what we should have always been using from the start.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Kumar Gala
5f91ef6acd 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-23 17:03:13 -06:00
Kumar Gala
10795f42cb 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:13 -06:00
Trent Piepho
a5d212a263 mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-12-19 18:20:25 -06:00
Dave Liu
9b0ad1b1c7 85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:44:48 -06:00
Wolfgang Denk
3cbd823116 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-02 16:14:22 +01:00