Commit graph

296 commits

Author SHA1 Message Date
Dirk Behme
12201a1354 OMAP3: Add NAND support
Add NAND support.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Syed Mohammed Khasim <khasim@ti.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-01-24 17:51:21 +01:00
Mike Frysinger
d4bade8d77 nand: fixup printf modifiers to match types used
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:52 -06:00
Wolfgang Grandegger
6c869637fe NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:51 -06:00
Nishanth Menon
50657c2732 NAND: Enable nand lock, unlock feature
Enable nand lock, unlock and status of lock feature.
Not every device and platform requires this, hence,
it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK

Nand unlock and status operate on block boundary instead
of page boundary. Details in:
http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT

Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
Includes preliminary suggestions from Scott Wood

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:49 -06:00
Mike Frysinger
69fb8be4fc NAND: move board_nand_init to nand.h
Rather than putting the function prototype for board_nand_init() in the one
place where it gets called, put it into nand.h so that every place that also
defines it gets the prototype.  Otherwise, errors can go silently unnoticed
such as using the wrong return value (void rather than int) when defining
the function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23 10:32:49 -06:00
Wolfgang Denk
f85cd46918 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-12-30 23:30:47 +01:00
Kumar Gala
9d94aff699 NAND FSL elbc: Use virt_to_phys to determine which bank is in use
The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping.  This breaks in 36-bit physical configs.

The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2008-12-19 18:20:08 -06:00
Scott Wood
ff49ea8977 NAND: Mark the BBT as scanned prior to calling scan_bbt.
Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-12-16 14:40:34 -06:00
Scott Wood
2077e348c2 NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.

Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-11-25 10:47:02 -06:00
Scott Wood
bd78bc6b2a NAND: Properly create JFFS2 cleanmarkers.
As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.

This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 14:20:26 -05:00
Scott Wood
f7fe57c098 NAND fsl elbc: Set FMR[ECCM] based on page size.
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 13:42:41 -05:00
Haiying Wang
4e190b03aa Make Freescale local bus registers available for both 83xx and 85xx.
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 11:12:53 -05:00
Karl Beldan
33efde5eca NAND: Reset chip on power-up
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.

Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 10:42:17 -05:00
Scott Wood
c45912d8ab NAND: sync with 2.6.27
This brings the core NAND code up to date with the Linux kernel.

Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.

I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 10:42:16 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jason Jin
fecb5ade3b Fix the NAND size overflow issue.
When the total size of all NAND devices exceeds 4 GiB, the size  will
overflow. This patch tries to fix this.

Note that we still have a problem when a single NAND device is bigger
than 4 GiB: then the overflow would actually happen earlier, i. e.
when storing the size in nand_info[].size, as nand_info[].size is an
"u_int32_t".

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-14 13:27:16 +02:00
Anton Vorontsov
0008b6d968 fsl_elbc_nand: ecclayout cleanups
This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:58:33 -05:00
Anton Vorontsov
8f42bf1c39 fsl_elbc_nand: implement support for flash-based BBT
This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:57:20 -05:00
Anton Vorontsov
97ae023648 fsl_elbc_nand: fix OOB workability for large page NAND chips
For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-12 14:56:03 -05:00
Guennadi Liakhovetski
e0056b3410 NAND: add NAND driver for S3C64XX
Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-08-31 00:39:47 +02:00
Wolfgang Denk
4b0708093e Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-14 14:41:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
cc4a0ceeac drivers/mtd/nand: Move conditional compilation to Makefile
rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:43 +02:00
Marcel Ziswiler
eafcabd15f NAND: chip->state does not always get set.
Fixes an issue with chip->state not always being set causing troubles.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:29 -05:00
Ilya Yanok
13f0fd94e3 NAND: Scan bad blocks lazily.
Rather than scanning on boot, scan upon the first attempt to check the
badness of a block.  This speeds up boot when not using NAND, and reduces
the likelihood of needing to reflash via JTAG if NAND becomes
nonfunctional.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:28 -05:00
Scott Wood
dfbf617ff0 NAND read/write fix
Implement block-skipping read/write, based on a patch from
Morten Ebbell Hestens <morten.hestnes@tandberg.com>.

Signed-off-by: Morten Ebbell Hestnes <morten.hestnes@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:28 -05:00
Anton Vorontsov
e1c3dbada3 nand: fsl_upm: convert to updated MTD NAND infrastructure
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:27 -05:00
Scott Wood
300253306a fsl_elbc_nand: Hard-code the FBAR/FPAR split.
The hardware has separate registers for block and page-within-block,
but the division between the two has no apparent relation to the
actual erase block size of the NAND chip.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:26 -05:00
Anton Vorontsov
9c814b0a71 fsl_elbc_nand: workaround for hangs during nand write
Using current driver elbc sometimes hangs during nand write. Reading back
last byte helps though (thanks to Scott Wood for the idea).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:26 -05:00
Scott Wood
9fd020d6b4 Freescale eLBC FCM NAND driver
This is a driver for the Flash Control Machine of the enhanched Local Bus
Controller found on some Freescale chips (such as the mpc8313 and the
mpc8379).

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:25 -05:00
Scott Wood
41ef8c716e Don't panic if a controller driver does ecc its own way.
Some hardware, such as the enhanced local bus controller used on some
mpc83xx chips, does ecc transparently when reading and writing data, rather
than providing a generic calculate/correct mechanism that can be exported to
the nand subsystem.

The subsystem should not BUG() when calculate, correct, or hwctl are
missing, if the methods that call them have been overridden.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:25 -05:00
Stefan Roese
e52b34d40a NAND: Make NAND driver less verbose per default
This patch turns off printing of bad blocks per default upon bootup.
This can always be shown via the "nand bad" command later.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-12 11:31:24 -05:00
Stefan Roese
1207226452 NAND: Change nand_wait_ready() to not call nand_wait()
This patch changes nand_wait_ready() to not just call nand_wait(),
since this will send a new command to the NAND chip. We just want to
wait for the chip to become ready here.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-12 11:31:22 -05:00
William Juul
5e1dae5c3d Fixing coding style issues
- Fixing leading white spaces
 - Fixing indentation where 4 spaces are used instead of tab
 - Removing C++ comments (//), wherever I introduced them

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:17 -05:00
William Juul
4cbb651b29 Remove white space at end.
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:16 -05:00
William Juul
cfa460adfd Update MTD to that of Linux 2.6.22.1
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:15 -05:00
Stefan Roese
e870690bdc MTD/NAND: Fix printf format warning in nand code
This patch fixes NAND related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:46:13 +02:00
Scott Wood
3167c5386e NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<smcnutt@psyent.com>.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:24:47 -05:00
Sergei Poselenov
248ae5cfc8 NAND: Added support for 128-bit OOB, adapted
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-06-11 00:30:22 -05:00
Wolfgang Grandegger
a75a57ef6e NAND FSL UPM: driver re-write using the hwcontrol callback
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:

- For the time being, the UPM setup writing the UPM array has been
  removed from the driver and must now be done by the board specific
  code.

- The bus width definition in "struct fsl_upm_nand" is now in bits to
  comply with the corresponding Linux driver and 8, 16 and 32 bit
  accesses are supported.

- chip->dev_read is only set if fun->dev_ready != NULL, which is
  required for boards not connecting the R/B pin.

- A few issue have been fixed with MxMR bit manipulation like in the
  corresponding Linux driver.

Note: I think the "io_addr" field of "struct fsl_upm" could be removed
      as well, because the address is already determined by
      "nand->IO_ADDR_[RW]", but I'm not 100% sure.

This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.

This patch is based on the following patches posted to this list a few
minutes ago:

  PPC: add accessor macros to clear and set bits in one shot
  83xx/85xx/86xx: add more MxMR local bus definitions

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-10 18:22:26 -05:00
Dirk Behme
9723bbb46a nand: Correct NAND erase percentage output
For NAND erase sizes smaller than one NAND erase block, erase
percentage output becomes grater than 100% e.g.

-- cut --
  > nand info
Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Erasing at 0x100000 -- 200% complete.
OK
  >
-- cut --

Correct this and give user a warning that more is erased than specified:

-- cut --
  > nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
           Erasing 0x00004000 instead
Erasing at 0x100000 -- 100% complete.
OK
  >
-- cut --

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2008-05-28 11:06:27 -05:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Troy Kisky
84c01d3a05 PATCH - Fix oob data copied into supplied buffer
This patch correctly sets the oobavail variable
and fixes a bug where the oob data was not valid when
there where multiple groups in oobfree.

First segment fixes a typo
Second segment fixes a bug where oob data may be copied incorrectly.
Third segment adds an error message when exiting due to write protect.
Forth segment fixes a bug where oobavail may be set incorrectly.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2008-04-21 08:43:46 +02:00
Mike Frysinger
e25cb8d3f4 Remove conflicting NAND ID
There are two NAND entries with ID 0xDC and this obviously causes problems.
In the kernel, they punted the first entry, so we should do the same.

See this upstream e-mail for more info:
http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-04-17 14:56:56 -07:00
Anton Vorontsov
cd9d23053d nand: FSL UPM NAND driver
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-01-16 14:14:40 +01:00
Marcel Ziswiler
7817cb2083 fix comments with new drivers organization
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-01-09 21:48:49 +01:00
Jean-Christophe PLAGNIOL-VILLARD
59829cc189 drivers/mtd : move mtd drivers to drivers/mtd
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-25 23:28:52 +01:00