When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable
never gets initialized which causes random behavior at runtime and a
gcc warning. So set it by default to the stored phy address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Fix commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The ctrl variable is only used when autoneg support is disabled, so only
declare it under those conditions to avoid an unused variable warning.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Rather than having a bunch of random commands handle autostart behavior,
unify the logic in a single place. This also fixes building of these
different commands when bootm is disabled.
Acked-by: Matthew McClintock <msm@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We need a TLB entry to call get_ram_size(); the common code doesn't create
one until *after* fixed_sdram() has determined the size. So we set up tlbs
for the max possible size and tear them down once we're done with
get_ram_size(); the common 85xx code will then set up a final set of tlb
entries for the *actual* detected size of ddr.
This prevents us from having TLB entries that are larger than DDR sitting
around for very long, which is not a recommended scenario.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is useful when we just want to wipe out the TLBs. There's currently
a function that resets the ddr tlbs to a different value; it is changed to
utilize this function. The new function can be used in conjunction with
setup_ddr_tlbs() for a board to temporarily map/unmap the DDR address
range as needed.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Fman device tree node binding allows for the entire Fman firmware binary
data to be embedded in the device tree. This eliminates the need to have
NOR flash mapped to Linux just so that the Fman driver can see the firmware.
The location of the Fman firmware is taken from the 'fman_ucode' environment
variable.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle". To facilitate the migration from
"linux,phandle" to "phandle", we update fdt_qportal() to use the new
function, fdt_create_phandle(). This function abstracts the creation of
phandle properties.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 'master' of git://git.denx.de/u-boot-mmc:
mmc: rescan fails on empty slot
AT91:mmc:fix multiple read/write error
mmc: Access mode validation for eMMC cards > 2 GiB
mmc: sh_mmcif: add support for Renesas MMCIF
mmc: fix the condition for MMC version 4
MMC: add marvell sdhci driver
MMC: add sdhci generic framework
MMC: add erase function to both mmc and sd
MMC: unify mmc read and write operation
mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
* 'master' of git://git.denx.de/u-boot-arm:
ARM: MX5: Fix broken leftover TO-2 errata workaround
MX31: Cleanup clock function
scb9328: Add ARM relocation support
am3517evm: change console device from ttyS2 to ttyO2
Remove volatile qualifier in get_ram_size() calls
TI: TNETV107X Fix Build Error
ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
arm: add CONFIG_MACH_TYPE setting and documentation
arm: add __ilog2 function
Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
EfikaMX: Enable EXT2 booting
EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
EfikaMX: Use correct imximage.cfg
MX27: Update to autogenerated asm-offsets.h
MX5: Update to autogenerated asm-offsets.h
imx: Add support for zmx25 board
imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
imx: Add auto generation of asm-offsets.h for imx25
imx: Add support for USB EHCI on imx25
imx: Use correct imx25 reset.c
imx: Add get_tbclk() function for imx25
ARM: Update maintainer of board scb9328
mx27: Make the UART port number explicit
build: Add targets for auto gen of asm-offsets.h and use it in imx35
mx31pdk: cosmetic: Fix line over 80 characters
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.
Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch fixes compiler errors due to missing definitions of
CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR.
It also does some cleanup: CONFIG_SYS_TEXT_BASE was moved to scb9328.h,
obsolete config.mk was removed. The scb9328 board has 1 DRAM bank, so don't
ask for more banks. CONFIG_NR_DRAM_BANKS will ever be 1.
Signed-off-by: Torsten Koschorrek <koschorrek@synertronixx.de>
the serial device names have been changed from ttySx to ttyOx, so the
console device name should be also changed to support the latest kernel
versions.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Acked-by: Vaibhav Hiremath<hvaibhav@ti.com>
P2041RDB Specification:
-----------------------
Memory subsystem:
* 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 256 Kbit M24256 I2C EEPROM
* 16 Mbyte SPI memory
* SD connector to interface with the SD memory card
Ethernet:
* dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
* dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
PCIe:
* Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
* Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
I2C:
* I2C1: Real time clock, Temperature sensor, Memory module
* I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Add a new "fdt_high" enviroment variable. This can be used to control (or prevent) the
relocation of the flattened device tree on boot. It can be used to prevent relocation
of the fdt into highmem. The variable behaves similarly to the existing "initrd_high"
variable.
Signed-off-by: David A. Long <dave.long@linaro.org>
Fail in 'mmc rescan' if mmc_init() returns error
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
According to datasheet,set block count before multiple read/write.
Signed-off-by: elen.song <elen.song@atmel.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch provides handling of the two way handshake when SEND_OP_COND
(CMD1) is send to mmc card. It is necessary to inform eMMC card if the
host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3).
The extra flag MMC_MODE_HC (high capacity) is added to indicate if the
host is capable of handling the high capacity eMMC cards.
Since this change is added to the generic mmc framework, then it requires
other boards to indicate if their mmc controllers can handle high capacity
cards. As it is now - the old behaviour of the framework is preserved.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Some Renesas SuperH have MMCIF module. This driver supports it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Fix the problem that if we use the chip of MMC version 4 and
the capacity is smaller than 2GB or equal, the mmc->capacity is
invalid. According to the JEDEC Standard, the value of ext_csd's
capacity is valid if the value is more than 2GB.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This could support both armada100 and pantheon serial in the mainline,
while this driver also be tested to support upcoming mg, mmp2 and mmp3
hardware.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Nowdays, there are plenty of mmc driver in uboot adopt the sd standard
host design, aka as sdhci. It is better to centralize the common logic
together to better maintenance.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Erase is a very basic function since the begin of sd specification is
announced. Although we could write a bulk of full 0xff memory to the
range to take place of erase, it is more convenient and safe to
implement the erase function itself.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
mmc read and write command has so many in common, unfiy those two to
force consistency across the those two.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Andy Fleming <afleming@freescale.com>
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle". To facilitate the migration from
"linux,phandle" to "phandle", introduce function fdt_create_phandle(),
which creates a phandle in a given node. For now, we create both the
"phandle" and "linux,phandle" properties. A later version of this
function will remove support for "linux,phandle".
Signed-off-by: Timur Tabi <timur@freescale.com>
Introduce two functions, fdt_verify_alias_address() and
fdt_get_base_address(), which can be used to verify the physical address
of a device in a device tree.
fdt_get_base_address() returns the base address of an SOC or PCI node.
fdt_verify_alias_address() prints a message if the address of a node
specified by an alias does not match the given physical address.
Signed-off-by: Timur Tabi <timur@freescale.com>
For ages, we've been talking about adding functions to libfdt to allow
iteration through properties. So, finally, here are some.
I got bogged down on this for a long time because I didn't want to
expose offsets directly to properties to the callers. But without
that, attempting to make reasonable iteration functions just became
horrible. So eventually, I settled on an interface which does now
expose property offsets. fdt_first_property_offset() and
fdt_next_property_offset() are used to step through the offsets of the
properties starting from a particularly node offset. The details of
the property at each offset can then be retrieved with either
fdt_get_property_by_offset() or fdt_getprop_by_offset() which have
interfaces similar to fdt_get_property() and fdt_getprop()
respectively.
No explicit testcases are included, but we do use the new functions to
reimplement the existing fdt_get_property() function.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit:
73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Currently, the Linux kernel, libfdt and dtc, when using flattened
device trees encode a node's phandle into a property named
"linux,phandle". The ePAPR specification, however - aiming as it is
to not be a Linux specific spec - requires that phandles be encoded in
a property named simply "phandle".
This patch adds support for this newer approach to dtc and libfdt.
Specifically:
- fdt_get_phandle() will now return the correct phandle if it
is supplied in either of these properties
- fdt_node_offset_by_phandle() will correctly find a node with
the given phandle encoded in either property.
- By default, when auto-generating phandles, dtc will encode
it into both properties for maximum compatibility. A new -H
option allows either only old-style or only new-style
properties to be generated.
- If phandle properties are explicitly supplied in the dts
file, dtc will not auto-generate ones in the alternate format.
- If both properties are supplied, dtc will check that they
have the same value.
- Some existing testcases are updated to use a mix of old and
new-style phandles, partially testing the changes.
- A new phandle_format test further tests the libfdt support,
and the -H option.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit:
d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
On i.MX27, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
On i.MX5, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
