Adjust the configuration for the am33xx boards, including beaglebone black
to use driver model.
This can be extended to other OMAP boards once platform data is provided
for them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Tom Rini <trini@ti.com>
It is inconvenient to have to use casts when specifying platform data. Also
it is not strictly correct, since we should use map_sysmem() to convert an
address to a pointer.
Adjust the platform data to use an address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.
Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).
This commit moves the definition and the document in README to
Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The maxBCM board is equipped with the Marvell Armada-XP MV78460 SoC. It
integrates an SPI NOR flash and an Marvell 88E6185 switch.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic support for the Marvell DB-MV784MP-GP evaulation
board. This is the first board that uses the recently created
Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the "standard" 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
This patch adds support for the NETA ethernet controller which is integrated
in the Marvell Armada XP SoC's. This port is based on the Linux driver which
has been stripped of the in U-Boot unused portions.
Tested on the Marvell MV78460 eval board db-78460-bp.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Tested-by: Luka Perkov <luka@openwrt.org>
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well (Kirkwood, Orion).
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.
Signed-off-by: Simon Glass <sjg@chromium.org>
To get a display in U-Boot on link you must either build a coreboot that
always sets it up, or use Esc-Refresh-Power to reset the machine.
When we do have a display, it is nice to display the model at the top, so
enable this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since "boot>" doesn't seem any more useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
The fdt_for_each_subnode() iterator macro provided by this patch can be
used to iterate over a device tree node's subnodes. At each iteration a
loop variable will be set to the next subnode.
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The fdtdec_pci_get_bdf() function returns the bus, device, function
triplet of a PCI device by parsing the "reg" property according to the
PCI device tree binding.
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the fdt_get_resource() and fdt_get_named_resource() functions which
can be used to parse resources (memory regions) from an FDT. A helper to
compute the size of a region is also provided.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Given a device tree node, a property name and an index, the new function
fdt_get_string_index() will return in an output argument a pointer to
the index'th string in the property's value.
The fdt_get_string() is a shortcut for the above with the index being 0.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Given a device tree node and a property name, the new fdt_find_string()
function will look up a given string in the string list contained in the
property's value and return its index.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Given a device tree node and a property name, the fdt_count_strings()
function counts the number of strings found in the property value.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.
This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.
The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Now that serial and GPIO are available for iMX.6, move cm_fx6 over as an
example.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Add driver model support with this driver. Boards which use this driver
should define platform data in their board files.
Signed-off-by: Simon Glass <sjg@chromium.org>
The U_BOOT_DEVICE macro allows the declaration of a single U-Boot device.
Add an equivalent macro to declare an array of devices, for convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing ll_entry_declare() permits a single element of the list to
be added to a linker list. Sometimes we want to add several objects at
once. To avoid lots of messy declarations, add a macro to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust this driver to use driver model and move smdk5420 boards over to
use it.
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This converts the Tegra SPI drivers to use driver model. This is tested
on:
- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Use driver model for exynos5 board SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Convert sandbox's spi flash emulation driver to use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.
CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Adjust this board to use the driver model soft_spi implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.
A few device tree additions are needed to make the SPI flash available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.
This feature is not used by any active boards, so let's remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.
Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Add a uclass which provides access to SPI buses and includes operations
required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.
Boards must define CONFIG_DM_SPI to use driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)
The sequence number is unique within the uclass, so state this clearly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.
Add a new function to permit the parent data to be supplied to the child.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
