Commit graph

11692 commits

Author SHA1 Message Date
Peng Fan
e25dc290aa i.MX7ULP: Add CPU revision check for B0
Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eae4e0f3c1 i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
to workaround the problem. The correct fix should let GPU handle the
clock rate in kernel.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eb6d2e5920 i.MX7ULP: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
61bf6173cd i.MX7ULP: Fix wrong i2c configuration name
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
911d7d356a i.MX7ULP: Add CONFIG_MX7ULP to kconfig
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. Add this entry to cpu's kconfig.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
a0f4f7ee60 i.MX7ULP: Fix PCC register bits mask and offset issue
The offset for FRAC and the mask for PCD are not correct.
If we set FRAC, we can't get the right frequency. Fix them
to correct value.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
3ed6734e69 i.MX7ULP: Correct the clock index
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
7777406a8a i.MX7ULP: Fix system reset after a7 rtc alarm expired.
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
e92fca66a3 imx: i.MX7ULP: add get_boot_device
Add get_boot_device for i.MX7ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:35:16 +02:00
Troy Kisky
f8f9f79a63 nitrogen6x: migrate to using device tree
Migrate to using device tree required for further driver model
integration.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2019-10-08 16:35:16 +02:00
Robert Hancock
06f5b5a5fc ARM: imx: Support larger SPL size on IMX6DQ
Previously the SPL size on all iMX6 platforms was restricted to 68KB
because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
other iMX6 variants have 256KB of OCRAM. Add an option
CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
don't need to support the SL/DL variants. This allows for an SPL size of
196KB, which makes it much easier to use configurations such as SPL with
driver model and FDT control.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08 16:35:16 +02:00
Ricardo Salveti
01fc7e7b87 spl: imx: only use HAB if spl fit signature is not enabled
There is no need to use HAB for FIT signature validation when
SPL_FIT_SIGNATURE is also enabled, as that will be validated via the
normal U-Boot signed FIT image flow.

This allows having SPL validated by HAB and the payloads to follow
being validated with FIT signatures only.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ricardo Salveti
a3f5c79507 imx: apalis_imx6: select MX6Q via Kconfig
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q
variants, which are quite similar and already managed via only one
dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in
order to automatically enable the HAS_CAAM and MX6_SMP features.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08 16:35:16 +02:00
Peng Fan
ab1c482440 arm: dts: imx: fsl-imx8qm.dtsi: add gpio aliases to fix gpio command
The gpio command currently uses equal bank names "GPIO0_"
for all existing gpio banks, i. e.:

U-Boot# gpio status -a
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
...

Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
    ...

So the command is broken, it is not possible to address
a desired bank. Add gpio aliases to fix this.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08 16:35:16 +02:00
Peng Fan
cda789a5b1 spl: pass args to board_return_to_bootrom
Pass spl_image and bootdev to board_return_bootrom.
i.MX8MN needs the args to let ROM to load images

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-08 16:35:16 +02:00
Peng Fan
ae0760584b imx: mx6ul_14x14_evk: convert to DM_VIDEO
To support DM_VIDEO,
 Add display node for lcdif
 Drop board iomuxc settings.
 Enable DM_VIDEO

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08 16:33:45 +02:00
Peng Fan
1d293e6804 imx: add i.MX6ULZ board
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
81ae46c2e6 imx: add i.MX6ULZ cpu type
Add i.MX6ULZ cpu type and helper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
939a9644f0 arm: dts: import dts for i.MX6ULZ
Import kernel dts for i.MX6ULZ from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
c158381288 arm: dts: sync dts for i.MX6ULL
Sync kernel dts for i.MX6ULL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Peng Fan
281256c064 arm: dts: sync dts for i.MX6UL
Sync kernel dts for i.MX6UL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Ibai Erkiaga
fec657bebd arm64: versal: Move common board dtb search
Move the exisiting function of getting board dtb from versal to a common
Xilinx folder.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 13:14:54 +02:00
Michal Simek
a3e552b53f arm64: zynqmp: Use mailbox driver for PMUFW config loading
With new mailbox driver PMUFW configuration object can be loaded via the
same interface and there is no need to have pmu_ipc.c completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
325a22dc19 arm64: zynqmp: probe firmware driver
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
283d81acba arm64: zynqmp: remove old fw version function
Removes the old function to get the firmware version.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
009ab7b93a firmware: zynqmp: create firmware header
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
17eb88e4e5 arm64: zynqmp: Cleanup PM SMC macro composition
Cleanup PM ID handling by using enum values.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
95497afada arm64: zynqmp: add firmware and mailbox node to DT
The following patch adds a mailbox node and firmware node to following the
mainline DT.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
1327d1678b firmware: zynqmp: Add zynqmp-power support
zynqmp-power driver for ZynqMP to handle the communication with the PMU
firmware. Firmware driver just probes subnodes and power driver handles
communication with PMU using the IPI mailbox driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Ibai Erkiaga
660b0c77d8 mailbox: zynqmp: ipi mailbox driver
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
64eb13bfd7 arm64: zynqmp: Add a2197 memory board revA
Similar to processor board but i2c structure is completely different.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
917c57845a arm64: zynqmp: Add System Controller for a2197-g/p
Similar SCs but different wiring.

- dc_i2c is connected to X-PRC cards that's why label is required to have
  an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
  In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
  Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
  warning dump when called from context that can sleep.
  No support for phys property (zynqmp phy driver) with SGMII.
  Add is-internal-pcspma property required by uboot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
be972b2bd1 arm64: zynqmp: Add generic a2197 system controller config
Add generic configuration for a2197-p/-m/-g boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:55:11 +02:00
Michal Simek
b96b695f2c arm64: zynqmp: Switch spi-flash to jedec, spi-nor compatible
Change has been done across the whole tree only zynqmp-mini-qspi hasn't
been fixed.
Origin changed done by commit ffd4c7c2ec
("dts: switch spi-flash to jedec, spi-nor compatible")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Vipul Kumar
69b67ec8c9 ARM: zynq: dts: Added alias for usb node
This patch added alias for usb node in dts file.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Michal Simek
a6af30908b ARM: zynq: Align model name with DT
Use model property to distinguish different configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
95105089af clk: versal: Add clock driver support
This patch adds clock driver support for Versal platform. The clock driver
queries and performs clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:24 +02:00
Michal Simek
3899ebdd88 arm64: zynqmp: Provide a Kconfig option to disable OCM and TCM MMU mapping
This patch provides an option to enable/disable OCM and TCM memory into MMU
table with corresponding memory attributes.

The same change was done for ZynqMP by commit 189bec47ab
("arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Michal Simek
aef149e9dd arm64: versal: Enable memory mapping via DT
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
T Karthik Reddy
a69814c815 arm64: zynqmp: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
085201c246 arm64: versal: Set initrd_high to as high as possible
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Siva Durga Prasad Paladugu
bfd092f9ca arm64: versal: Define board_late_init for versal
Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.

Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Michal Simek
dd3c7b6ea1 arm64: zynqmp: Add u-boot,dm-pre-reloc to clk300 node
This node is used by qspi driver for supporting qspi boot mode in SPL.

Similar changes have beeen done by commit a9022b017a
("ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:11:14 +02:00
Eugen Hristev
c69ce8029a ARM: dts: at91: sam9x60ek: add onewire support
Add support for onewire memory.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
223cab5efb ARM: dts: at91: sam9x60: add onewire node
Add onewire node for w1 support.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Tudor Ambarus
228f9e0244 ARM: dts: at91: sam9x60ek: Enable qspi node
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.

Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Tudor Ambarus
cd0fcf1965 ARM: at91: Add SFR definitions
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Tudor Ambarus
b96b175cbb ARM: at91: Rename sama5_sfr.h to at91_sfr.h
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Sandeep Sheriker Mallikarjun
51422665de board: atmel: Add sam9x60ek board
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
  One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Nicolas Ferre
885554360d ARM: dts: at91: sam9x60: Add macb0 Ethernet controller
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08 09:16:11 +03:00
Sandeep Sheriker Mallikarjun
f99e0ad25a ARM: dts: Add dts files for sam9x60ek
add device tree files for sam9x60ek board with below changes.

- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
  are used by the board_init_f stage.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[prasanthi.chellakumar@microchip.com: fix style/whitespace issues]
Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
[nicolas.ferre@microchip.com:
- fix gclk,
- fix pio/pinctrl controller definition and allow to have more
  than only PIOA for this SoC,
- removing pinctrl address]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com:
- use SAM9X60's compatible for pinctrl
- add drive strength and slew rate options for SDMMC0 pins.]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[tudor.ambarus@microchip.com:
- u-boot,dm-pre-reloc property in dedicated file,
- fix pit len, starts from 0xFFFFFE40 and it is of len 0x10]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Sandeep Sheriker Mallikarjun
9cf7f46307 ARM: at91: Add sam9x60 soc
Add new Microchip sam9x60 SoC based on an ARM926.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
4a500e4337 ARM: dts: at91: sama5d27_wlsom1: add hlcdc node
Add node for hlcld for u-boot logo display at boot.
This is compatible with the Precision Design Associates (PDA) TM5000 screen.
Timings are compatible with simple panel from Linux, panel name is
pda_91_00156_a0

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
06e0da70ca ARM: dts: at91: sama5d27_wlsom1_ek: add support for qspi
Add node for qspi1 memory connected on the wlsom

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
58581058f9 ARM: dts: at91: sama5d2: add seq for qspi1
qspi1 does not have an alias/seq number. This is required for
SPL default SF bus booting for the boards that have this SoC

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
c721c22a03 board: atmel: sama5d2_wlsom1_ek: add SPL support
Add support for SPL for this board: DRAM initialization, PMC initialization,
MMC boot.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
a34ae7cb46 ARM: at91: mpddrc: add lpddr2 initialization procedure
Implement the lpddr2 initialization procedure for at91 mpddrc multi-port
ddram controller.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
f64ec16f42 board: laird: wb50n: use configure_ddrcfg_input_buffers
Replace code with new function configure_ddrcfg_input_buffers from SFR
mach driver.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
b1c7b33be2 ARM: at91: sfr: implement DDR input buffers open function
Add a function in SFR implementation that will open the DDR input
buffers.
This can be called at DRAM initialization time.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
d231e37a20 ARM: at91: sfr: convert to Kconfig
This converts the at91 sfr to Kconfig

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Nicolas Ferre
44b5c40be3 board: atmel: add sama5d27_wlsom1_ek board
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Nicolas Ferre
00561e7d24 ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiP
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC
identification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08 09:16:11 +03:00
Simon Glass
b51882d007 spl: Convert CONFIG_SPL_SIZE_LIMIT to hex
This is currently a decimal value which is not as convenient or
meaningful. Also U-Boot tends to use hex everywhere.

Convert this option to hex and add a comment for the size_check macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the typo in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
27084c03d3 spl: Allow tiny printf() to be controlled in SPL and TPL
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.

Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
535e07846a arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT option
At present this is defined in Kconfig but there is a separate one in the
CONFIG whitelist. It looks like these are duplicates.

Rename the non-Kconfig one and remove it from the whitelist.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
e5f7390458 dm: core: Add device_foreach_child()
We have a 'safe' version of this function but sometimes it is not needed.
Add a normal version too and update a few places that can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Heiko Schocher
ca51ef7c0c watchdog: move WATCHDOG_TIMEOUT_MSECS to Kconfig
move WATCHDOG_TIMEOUT_MSECS to Kconfig and fix
all board defconfigs.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Martyn Welch <martyn.welch@collabora.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-10-08 07:46:38 +02:00
Mian Yousaf Kaukab
e5d8971bfd Revert "ARM: tegra: reserve unmapped RAM so EFI doesn't use it"
This reverts commit 0797f7f0b7.

Tegra specific solution is not required any more as efi core has been
made aware of ram_top with the following commit:
7b78d6438a efi_loader: Reserve unaccessible memory

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
2019-10-06 16:02:37 +02:00
Tom Rini
dac51e9aaf Merge branch 'master' of git://git.denx.de/u-boot-sh
- ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
2019-10-05 20:06:58 -04:00
Adam Ford
5ff1963da3 ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2.  This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.

Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
29c9db4d98 board: ti: am654: Disable TRNG node for HS devices
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04 12:21:23 -04:00
Andrew F. Davis
c9e6c13deb arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-10-04 12:21:23 -04:00
Marek Vasut
49d5fba81c ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
This patch restores commit c49d0ac38a ("ARM: dts: rmobile: Increase off-on
delay on the SD Vcc regulator"), which was accidentally dropped during DT
resync in commit 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with
Linux 5.0").

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fixes: 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0")
2019-09-30 02:07:02 +02:00
Heiko Stuebner
d46b548290 rockchip: make_fit_atf.py: fix .its generation for a single atf image
The commit 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property
set error") fixed the double-loading of the primary atf-image, but didn't
take into account that there may be rare atf images with only that main
section present.

Right now this will result in a broken its due to the loadables section not
getting closed correctly, so fix that by adapting the guards around the loop.

The guards now protect against 0 segments when the bl31 binary doesn't
contain any section and 1 segment when only a core atf section is present.

Fixes: 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property set error")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Heiko Stuebner
03f98b75e4 rockchip: misc: read the correct number of bytes from the efuse
Originally the cpuid var the value gets read into was defined as
    u8 cpuid[RK3399_CPUID_LEN];
hence the sizeof(cpuid) would return the correct the correct number
of array elements.

With the move to a separate function cpuid becomes a pointer and
sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case.

We do have the actual id length available as function param so use
it for actual amount of bytes to read.

Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28 22:26:32 +08:00
Michael Trimarchi
f810ea6acb rockchip: rk3288-tinker: Attach missing peripherals at SPL
Tinker board needs to mux all the sdmmc gpio and
activate the regulator connected to bank 7. Remove
all the bank that are not in use and mark them as dm,spl
so-that it would initialize at SPL.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
891d4d1fca rockchip: spi-boot-order: Trival fix to newline missing
newline \n was missed in fdt_path_offset, error loop.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Jagan Teki
bacad567ac rockchip: rk3288: vyasa: Drop ROCKCHIP_BROM_HELPER selection
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM
has been defined, so drop the explicit enablement for vyasa board.

This change is supposed to missed during config move to
other locations, and missed to drop the same.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19 09:35:31 +08:00
Tom Rini
a9fa70b7b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-16 13:13:45 -04:00
Faiz Abbas
16f14b930d ARM: dts: dra74x: Fix iodelay configuration for mmc3
According to the latest am572x[1] and dra74x[2] data manuals, mmc3
default, hs, sdr12 and sdr25 modes use iodelay values given in
MMC3_MANUAL1. Set the MODE_SELECT bit for these so that manual mode is
selected and correct iodelay values are configured.

[1] http://www.ti.com/lit/ds/symlink/am5728.pdf
[2] http://www.ti.com/lit/ds/symlink/dra746.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
78e512129b arm: k3: Use get_ti_sci_handle() where ever possible
Instead of calling uclass apis everywhere, use get_ti_sci_handle()
when ever ti_sci is needed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Lokesh Vutla
e8d3a18639 arm: k3: Fix getting ti_sci handle
API get_ti_sci_handle() is relying on the device-tree node name
to be "dmsc" for probing the ti_sci device. But with the introduction
of debug messages for dmsc, the node name changed to dmsc@44083000.
Because of this ti_sci is never probed cause a boot failure. Instead
of relying on device-tree node name, use the first available firmware
node for probing ti_sci.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13 11:56:30 -04:00
Adam Ford
ca62f2ba15 ARM: omapl138_lcdk: Enable DM_GPIO and DM and GPIO Commands
The da8xx GPIO driver is available with DM_GPIO support.  This
patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-09-13 11:56:08 -04:00
Suniel Mahesh
d60eb8e49e arm: am437x: cm-t43: Add device tree, enable OF_CONTROL
Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==================================================
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument
===================================================
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-09-13 11:56:08 -04:00
Hou Zhiqiang
116f75c7b3 armv8: ls1028a: Updated serdes configuration for 0x13BB
In SerDes protocol 0x13BB, lane C was erroneously assigned
to PCIE1, this is now updated to PCIE2

Fixes: 36f50b7523 ("armv8: ls1028a: Add other serdes
		     protocal support")

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Hou Zhiqiang
c9ba88bafc armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entry
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.

Also enable the fixup when Layerscape Gen4 controller driver
is enabled.

Fixes: 4da0e52c9d (armv8: fsl-layerscape: fix config dependency
		     for layerscape pci code)

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Chuanhua Han
2f2a19757b armv8: fsl-layerscape: Update I2C clock divider
By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Thomas Schaefer
0490cab584 armv8: ls1028a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:42 +05:30
Alex Marginean
a3ce94b602 arm: dts: ls1028a-qds: define the MDIO MUX
Add the device-tree structure describing the MUX in board dts.

QDS board has an on-board RGMII PHY and 4 slots for extension cards.
All these can be accessed over MDIO through a MDIO MUX controlled
over I2C.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 16:15:31 +05:30
Yinbo Zhu
23da111d5f dts: armv8: add emmc hs200 support for ls1028ardb
Add emmc hs200 support for ls1028ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:43 +05:30
Yinbo Zhu
0f021c8bde dts: armv8: add emmc hs200 support for lx2160ardb
Add emmc hs200 support for lx2160ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:04:09 +05:30
Yinbo Zhu
be852314dc dts: armv8: add emmc hs200 support for ls1012ardb
Add emmc hs200 support for ls1012ardb

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:03:10 +05:30
Yinbo Zhu
24cb6f2295 fsl-layerscape: Add fsl_esdhc peripheral clock support
Add esdhc peripheral clock support
for NXP layerscape platforms: LS1046ARDB, LS1043ARDB,
LS1012ARDB, LS1028ARDB, LS1088ARDB, LX2160ARDB

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:00:35 +05:30
Kever Yang
c9ec5fe018 rockchip: clean makefile for misc.c
Use obj-$(config) instead of #ifdef $config to make the code looks
clean, and move the misc_init for U-Boot proper only.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
45f8b55eca rockchip: not depends on TPL_BUILD for rk3188 makefile including
The rk3188/Makefile already depends on !TPL_BUILD, so no need to add
this again in parent Makefile, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Kever Yang
86b4a6db68 rockchip: rk3399: dts: add boot order for rockpro64
The rk3399 rockpro64 board can boot from emmc and sdcard.
TODO: add spiflash as boot device.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-11 16:16:12 +08:00
Tom Rini
40e362a9ab Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Bug fixes to mmc_spi
Add Aspeed SD driver
Fix dw_mmc timeout calculation
Fix timeout values passed to mmc_wait_dat0
sdhci dt caps/mask update

[trini: Fix evb-ast2500_defconfig CONFIG_MMC line]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-08 21:15:13 -04:00
Tom Rini
ba83753289 - fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
 - increase kernel image size from 8 MB to 64 MB on arm64
 - add support for RPi4
 - add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06 19:49:51 -04:00
Andrei Gherzan
76bce8c2ad ARM: bcm283x: Include definition for additional emmc clock
This clock has a different mbox ID so have this included in the relevant
header file.

Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Andrei Gherzan
c6bcf05fcd ARM: bcm283x: Define configs for RaspberryPi 4
Define two target configs for Raspberry Pi 4 (32 and 64bit) and the
corresponding BCM2838* configs.

Be aware of the current limitation in firmware which requires an
explicit configuration to force the arm in 64bit mode when the
respective target is used.

Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: rename BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Matthias Brugger
1cfac5204c ARM: bcm283x: Add BCM283x_BASE define
Devices of bcm283x have different base address, depending if they are on
bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to
build and only add the offset in the header files.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06 18:16:59 +02:00
Fabian Vogt
49822442ed ARM: bcm283x mbox: Fix send status register
Before we can send a message to the mailbox we have to check that there
is space to do so. Therefore we poll the status register. But up to now
the wrong status register, the one of mailbox 0, was checked. Fix this
by polling the status regiser of mailbox 1.

Signed-off-by: Fabian Vogt <fvogt@suse.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[mb: rename registers and update commit message]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
Eddie James
30231e0ddb ARM: dts: ast2500: Add SDHCI nodes
Add nodes for the Aspeed SD controllers with their necessary properties.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05 15:27:31 +08:00
Eddie James
7764ee2e83 mmc: Add Aspeed SD controller driver
Add support for the Aspeed SD host controller engine.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05 15:27:31 +08:00
Eddie James
38c9f08b41 clk: aspeed: Add support for SD clock
Add code to enable the SD clock on the ast2500 SoC.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
2019-09-05 15:27:31 +08:00
Alex Marginean
7660d5c120 arm: dts: Set custom names for cp110 master/slave MDIO buses
Implicitly Marvell MDIO driver uses DT node names for devices, but in this
case that is not unique.  Set MDIO device names for master/slave to
cpm/cps.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Florinel Iordache
1bad991205 drivers/fsl-mc: Create Kconfig file to manage driver specific configs better
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs
from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Tom Rini
f65fb411ed Merge tag 'for-v2019.10-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for 2019.10 take 2
- i2c: mxc: add CONFIG_CLK support
  If CONFIG_CLK is enabled use clk framework for clock settings.
2019-09-03 07:16:05 -04:00
Peng Fan
6dba0864ec i2c: mxc: add CONFIG_CLK support
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>

hs: removed hunk in mxc_i2c_probe() as not longer in code
2019-09-02 06:35:08 +02:00
Tom Rini
d22c8be964 Merge branch 'master' of git://git.denx.de/u-boot-sh
- r8a66597 usb changes
2019-09-01 13:33:12 -04:00
Ryan Harkin
296439e0b1 Revert "vexpress64: fvp dram: add DRAM configuration"
This reverts commit fc04b92354 where the
FVP DRAM configuration was added.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
2019-08-31 09:27:19 -04:00
Stephen Warren
5e0404ff85 board_f: fix noncached reservation calculation
The current code in reserve_noncached() has two issues:

1) The first update of gd->start_addr_sp always rounds down to a section
start. However, the equivalent calculation in cache.c:noncached_init()
always first rounds up to a section start, then subtracts a section size.
These two calculations differ if the initial value is already rounded to
section alignment.

2) The second update of gd->start_addr_sp subtracts exactly
CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in
cache.c:noncached_init() rounds the noncached size up to section
alignment before subtracting it. The two calculations differ if the
noncached region size is not a multiple of the MMU section size.

In practice, one/both of those issues causes a practical problem on
Jetson TX1; U-Boot triggers a synchronous abort during initialization,
likely due to overlapping use of some memory region.

This change fixes both these issues by duplicating the exact calculations
from noncached_init() into reserve_noncached().

However, this fix assumes that gd->start_addr_sp on entry to
reserve_noncached() exactly matches mem_malloc_start on entry to
noncached_init(). I haven't traced the code to see whether it absolutely
guarantees this in all (or indeed any!) cases. Consequently, I added some
comments in the hope that this condition will continue to be true.

Fixes: 5f7adb5b1c ("board_f: reserve noncached space below malloc area")
Cc: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2019-08-30 14:17:11 -04:00
Patrick Delaunay
5d2901a4b6 stm32mp1: Add remoteproc support for m4 coprocessor
Alignment with kernel patch proposal for binding:

[PATCH v4 0/8] stm32 m4 remoteproc on STM32MP157c
https://lkml.org/lkml/2019/5/14/159

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
0c8620d2ff bsec: update after MISC u-class update
Since the commit 8729b1ae2c ("misc: Update read() and
write() methods to return bytes xfered"); The misc bsec driver
need to be adapted to reflect the number of transferred bytes.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
4d401e96cf stm32mp1: Makefile cleanup
Don't compile psci for SPL build.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
5e959ab85e stm32mp1: board: Update the way vdd-supply is retrieved from DT
Due to kernel DT alignment, pwr-supply is renamed to vdd-supply
and is a subnode of pwr-regulators.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
dd2810851e stm32mp1: board: support of error led on ed1/ev1 board
Create a function led_error_blink and add node in device
tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
d573e46168 stm32mp1: board: enable v1v2_hdmi and v3v3_hdmi regulator on dk2 boot
As for Audio codec IC, HDMI IC is not "IO safe".
HDMI regulators (v3v3 and v1v2) must be enabled to allow
I2C1 bus usage. HDMI IC must be under reset during power up
and keep HDMI and AUDIO devices in reset while they are not
used in U-Boot to keep them in low power mode
(each device can be kept in reset independently keeping their
power supplies ON until kernel).

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
49ef8e134e stm32mp1: configs: add spi load support in spl
Add the boot for NOR, SPL load U-Boot.img at offset
CONFIG_SYS_SPI_U_BOOT_OFFS = 0x80000.
It is the start address of mtd partition ssbl in nor.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrick Delaunay
9cd8b9f0c5 stm32mp1: configs: add condition to activate WATCHDOG in SPL
Only activate WATCHDOG in SPL when CONFIG_WATCHDOG is activated in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
f219361de1 stm32mp1: configs: imply CONFIG_OF_LIBFDT_OVERLAY
Add imply for FDT overlay that can be usefuill for kernel device tree
management but it is not mandatory (can be removed to gain space)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
a67d958177 stm32mp1: configs: Activate DISABLE_CONSOLE
Activate DISABLE_CONSOLE needed for stm32prog support on uart.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
16a0722320 stm32mp1: configs: select CONFIG_STM32_SERIAL
Select the serial driver mandatory for the console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
6755198001 stm32mp1: configs: activate PRE_CONSOLE_BUFFER
Correctly handle silent=1 in the default environment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
c50c928064 stm32mp1: configs: activate CONFIG_SILENT_CONSOLE
Allow to disable console with environment variable 'silent':
> env set silent 1; env save

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
178a415534 stpmic1: program pmic to keep only the debug unit on
Depending on backup register value, we maintain the debug unit
powered-on for debugging purpose.
Only BUCK1 is required for powering the debug unit, so revert
the setting for all the other power lanes, except BUCK3 that
has to be always on.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
7acda7eae5 ARM: dts: stm32mp1: add pull-up on serial rx of console connected to STLINK
Avoid U-Boot auto-boot interruption for line break detection
on console when the RX line connected to STLINK is floating
(-IO error in getc cause by framing error and testc return 1)
Same workaround is applied on all the STMicroelectonics board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
9c2214b489 ARM: dts: stm32mp1: add key support on DK1/DK2
Allow to use PA13 and PA14 to force fastboot mode or STM32CubeProgrammer
mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
2c2580984a ARM: dts: stm32mp1: add ldtc pre-reloc proper in SOC file
The pre-relocation probe is needed to reserve video frame buffer
in video_reserve() for all the board;
LDTC must be tagged prereloc in SOC U-Boot dtsi file.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
67b7684f8c ARM: dts: stm32mp1: Add PSCI node access before relocation
Add node in DT and avoid error to search UCLASS_SYSRESET in
board_f.c::print_resetinfo() and lost 1.6s in U-Boot
for the trusted boot chain.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
6d923007d6 ARM: dts: stm32mp1: Add iwdg2 support for SPL
This patch adds independent watchdog support for stm32mp157c
in SPL.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
be16c41f85 ARM: dts: stm32mp1: DDR config v1.45
Update DDR configuration with the latest update:
- Change DQSGE to 1 for DDR3, to cure missing DQS preamble.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrick Delaunay
fe91533644 ARM: dts: stm32mp1: sync device tree with v5.3-rc2
Synchronize device tree with v5.3-rc2 label and
update the associated u-boot dtsi.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 09:36:56 +02:00
Patrice Chotard
0203050e57 ARM: dts: stih410-b2260: Sync DT with kernel v5.2
Synchronize U-boot DT with kernel v5.2 for stih410-b2260.
Update stih410-b2260-u-boot.dtsi accordingly.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-08-27 09:36:56 +02:00
Adam Ford
5adbc0e5ca ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux
When the pinmux configuration was added, it was accidentally placed into
the omap3_pmx_wkup node  when it should have been placed into the
omap3_pmx_core.  This error was accidentally propagated to U-Boot by
me when I blindly copied the device tree from Linux.

This patch moves the i2c2_pins and i2c3_pins to the correct node
which should eliminate i2c bus errors and timeouts due to the fact
the bootloader uses the save device tree that no longer properly
assigns these pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-26 11:46:20 -04:00
Adam Ford
1bf330150c Convert CONFIG_ARCH_CPU_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_CPU_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Felix Brack <fb@ltec.ch>
2019-08-25 19:32:55 -04:00
Tom Rini
50b4b80f59 Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
2019-08-24 08:33:27 -04:00
Adam Ford
057055660f Kconfigs: Various: Fix some SPL, TPL and ARM64 dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-23 13:59:06 -04:00
Rohan Garg
0482538499 rockchip: rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

This is based off of Klaus Goger's work in 8adc9d

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 18:15:31 +08:00
Kever Yang
cb8c492f20 rockchip: rk3288: remove fennec board support
Since there is no one using this board, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
08bbe44424 rockchip: dts: rk3328-rock64: fix usb power supply
According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
2e91e2025c rockchip: rk3328: migrate u-boot node to -u-boot.dtsi
Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Kever Yang
8e5c8571fe rockchip: dts: rk3328-rock64: enable usb3 xhci controller
Rock64 has a USB3.0 port, enable the controller so that we can use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-23 15:27:40 +08:00
Marek Vasut
be1e9dc080 ARM: renesas: Enable R8A66597 USB host on GR Peach
Enable USB host support on GR Peach board.

To use USB host on GR Peach, it might be necessary to solder JP3 header
onto the board first and then short it. Shorting JP3 is mandatory to let
the U5 regulator to supply VBUS to the CN3 USB port.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:37 +02:00
Laurentiu Tudor
b249fcba00 armv8: ls1028a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, edma, qdma, gpu, display and sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
5c6dc6c9a9 armv8: ls1088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
aef654a2ed armv8: fsl-layerscape: make icid setup endianness aware
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
08f9bc9f43 armv8: fsl-layerscape: add base addresses for several devices
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Laurentiu Tudor
ef3f364a75 armv8: fsl-layerscape: add missing sec jr base address defines
Add defines for all the SEC job rings base addresses.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
71a2da3fa9 armv8: kconfig: Fix some platforms incorrect I2C clock divider
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Pankaj Bansal
a02a9421f4 armv8: ls1028aqds: define ARCH_MISC_INIT to handle mux
Define ARCH_MISC_INIT for LS1028AQDS platform to handle board
related mux.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
67d3a815cb configs: ls1088a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
f3b6a711a4 armv8: dts: ls1088aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
96d3fb4146 armv8: dts: ls1088ardb: Add slave nodes under the i2c0 controller
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
c2eda95a5b armv8: dts: ls1088a: add I2C node support
One ls1088a, there are four I2C controllers. So add all I2C node
for ls1088a in device tree.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
bd9eab46c8 gpio: do not include <asm/arch/gpio.h> on ARCH_LS1088A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1088a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
292370df1c configs: ls2088a: Enable DM support for ds3231 rtc
Enable related configs on all ls2088aqds boards to support ds3231
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
1703aaff8b armv8: dts: ls2088aqds : Add ds3232 node
Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds
boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
6672ab1628 armv8: dts: ls2088ardb: Add slave nodes under the i2c0
Add some slave nodes to support the i2c dm on the device side under the i2c0.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
chuanhua han
407916f5d7 armv8: dts: fsl-ls2088a: add i2c node support
One ls2088a, there are four I2C controllers. So add I2C nodes in dts
for ls2088a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
b547dd9584 gpio: do not include <asm/arch/gpio.h> on ARCH_LS2080A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2080a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:36 +05:30
Chuanhua Han
bd9b0745f7 armv8: dts: ls1028aqds: Add pcf2127 node under i2c1
Add the pcf2127-rtc node under the i2c1 in dts for ls1028aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
25d9467c16 armv8: dts: ls1028aqds: Add pca9547 node under the i2c0 controller
Add pca9547 node to support i2c multiplexer under the i2c0 controller
in dts for ls1028aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
21d5e964da configs: ls1028a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1028aqds boards to support pcf2127
rtc DM function.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Tested-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
e120d1277d armv8: dts: ls1028ardb: Add slave nodes under the i2c0 controller
Add some slave nodes to support the i2c dm on the device side under the i2c0.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
dcfb8f516d gpio: do not include <asm/arch/gpio.h> on ARCH_LS1028A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1028a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
7abf9c16aa configs: lx2160: enable DM support for pcf2127 rtc
Enable related configs on all lx2160ardb boards to support pcf2127
rtc DM feature.

Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from
Kconfig.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
07cb35fb71 armv8: dts: lx2160aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 in dts for
lx2160aqds boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
29b9e66683 armv8: dts: lx2160ardb : Add the "u-boot, dm-pre-reloc" for i2c0
Lx2160ardb need to use i2c0 before relocation, so we also need to set
u-boot, dm-pre-reloc to initialize node before relocation.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
16c22fb39d armv8: dts: Add pcf2127 node for lx2160ardb
Adds the pcf2127-rtc node under the i2c4 node dts of lx2160ardb boards.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
d1edea248a armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
db717629ff gpio: do not include <asm/arch/gpio.h> on ARCH_LX2160A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2160a.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Chuanhua Han
068cabe8f6 drivers: i2c: mxc: Fix compiler error when using i2c dm mode
I2C dm mode enablemenet causes below compilation errors:

In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~
In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~

board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
  i2c_early_init_f();
  ^~~~~~~~~~~~~~~~
  arch_early_init_r

 drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
  drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
  did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
  ret = enable_i2c_clk(1, bus->seq);
        ^~~~~~~~~~~~~~
        enable_irq_wake

So fix these compilation errors.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Yuantian Tang
acf40f50b8 armv8: ls1028a: select BOARD_LATE_INIT config
Select BOARD_LATE_INIT for ls1028ardb and ls1028aqds targets
so that late init work can be done.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Suniel Mahesh
c8e8de138e arm: dts: Makefile: clean *dtb_HS
TI HS platforms generate *dtb_HS binary blobs and there is no
rule for cleanup. Added entry for cleanup in clean-files target.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-08-20 11:46:38 -04:00
Suman Anna
a517c1f62f ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernels
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") updates the kernel device-tree blob to adjust
the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected
in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks
DT node.

The hierarchy of this clocks DT node has changed in newer Linux kernels
starting from v5.0, and this results in a failure in ft_fixup_clocks()
function to update the clock rates on these newer kernels. Fix this by
updating the lookup logic to look through both the newer and older
DT hierarchy paths for the cm_core_aon clocks node.

Signed-off-by: Suman Anna <s-anna@ti.com>
2019-08-20 11:46:38 -04:00
Urja Rannikko
b8050511c6 sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass
This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.

The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-19 12:43:26 +08:00
Urja Rannikko
857f39d7b0 sysreset: switch to using SYSRESET_POWER_OFF for poweroff
It seems that SYSRESET_POWER_OFF was added recently, and all previous code
used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a
PMIC-level power cycle, not a poweroff.

(Comment by Simon Glass)
SYSRESET_POWER means to do a power reset (removing and reinstating all power)
SYSRESET_POWER_OFF means to turn the device off and leave it off

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
(Update comment to help understand the patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-19 12:43:26 +08:00
Levin Du
8a681f4c5a rockchip: rk3399: Add ROC-RK3399-PC support
Add initial support for ROC-RK3399-PC board.

Specification
- Rockchip RK3399
- LPDDR4 4GiB
- eMMC slot
- SD card slot
- RTL8211E 1Gbps
- HDMI Out, DP, MIPI DSI/CSI, EDP
- PCIe M.2
- USB 2.0, USB-3.0
- USB C Type

Commit details of rk3399-roc-pc.dts sync from Linux v5.2:
"arm64: dts: rockchip: add support for ROC-RK3399-PC board"
(sha1: 8bb878cf20ae10809c36db96993bfce7026d062b)

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-19 12:43:26 +08:00
Simon Goldschmidt
a89441a74f arm: socfpga: gen5: don't zero bss in board_init_f()
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the
DDR driver does not use bss any more, bss is not used before board_init_r()
and we can remove this hack.

bss is normally zeroed by crt0.S, but after board_init_f(), before
board_init_r(). socfpga just had this double-zeroing because it invalidly
used bss in board_init_f() already (during DDR initialization).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-08-15 08:50:02 +02:00
Ley Foon Tan
63b312d882 arm: socfpga: Fix SYSRESET_SOCFPGA_S10 config name
The CONFIG name should be SYSRESET_SOCFPGA_S10 instead of
SYSRESET_SOCFPGA_STRATIX10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-08-15 08:50:00 +02:00
Tom Rini
88c7a0a8c2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Various improvements to Keymile boards - mostly DT conversation
  (Pascal & Holger)
- Removal of now unsupported Keymile boards (Pascal & Holger)
- Small MVEBU PCI fix (Marek)
- Turris Omnia defconfig update (Marek)
- Misc Allied Telesis defconfig updates (Chris)
2019-08-12 23:03:44 -04:00
Tom Rini
60f38d82c4 - amlogic: add support for the SEI Robotic SEI510
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Merge tag 'u-boot-amlogic-20190812' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- amlogic: add support for the SEI Robotic SEI510
2019-08-12 23:03:35 -04:00
Tom Rini
9c6115822e Merge branch '2019-08-11-ti-imports'
- More DaVinci updates and fixes
- PCIe support on am65x
- Watchdog converted to DM
- Assorted other bugfixes
2019-08-12 18:47:53 -04:00
Andreas Dannenberg
0805fe151d arm: K3: sysfw-loader: Do not require full printf() for version info
A previous commit...

commit 2a51e16bd5 ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")

...causes the System Firmware version string during SPL boot to no longer
getting printed to the console as expected. To fix this issue rework the
handling of that string to only use basic printf() syntax rather than
for example disabling CONFIG_USE_TINY_PRINTF on affected devices, this
way maintaining most of the memory size benefit the initial patch brings
when it comes to SPL.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-12 13:33:43 -04:00
Sekhar Nori
476e991452 arm: dts: k3-am65: add support for PCIe and SERDES
Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:40 -04:00
Hannes Schmelzer
60df809f62 board/BuR/brsmarc1: initial commit
This commit adds support for the B&R brsmarc1 SoM.

The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-12 13:33:37 -04:00
Suniel Mahesh
6912f2a8ae watchdog: omap_wdt: Disable DM watchdog support in SPL
This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.

The following build error is reported if DM watchdog support was
enabled in SPL:

  CC      spl/drivers/usb/gadget/rndis.o
  LD      spl/drivers/usb/gadget/built-in.o
  LD      spl/drivers/usb/musb-new/built-in.o
  LD      spl/drivers/built-in.o
  LD      spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.

Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
[trini: Fix watchdog.h logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-12 13:27:55 -04:00
Suniel Mahesh
7659ea32a6 watchdog: omap_wdt: Convert watchdog driver to use DT and DM
This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:

===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.

DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-08-12 07:25:22 -04:00
Neil Armstrong
9a34dedfae ARM: meson: Add support for fastboot_set_reboot_flag()
Add support for fastboot_set_reboot_flag() by storing the reboot
flag in the common code to be used by the custom PSCI reboot handler.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-08-12 10:05:10 +02:00
Neil Armstrong
b1dd7debea arm: meson: add sm command to retrieve the reboot reason
The Secure Monitor offers multiple services, like returning the
SoC unique serial number, and can provide the "reboot reason" as
set by the previous booted system.

This extends the Amlogic specific "sm" cmd with a "reboot_reason" subcommand
to print or set a specified environment variable with the reboot reason in
human readable format.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-08-12 10:02:30 +02:00
Neil Armstrong
559e6256f8 arm: meson: add sm cmd to retrieve SoC serial
The Secure Monitor offers multiple services, like returning the
SoC unique serial number, already used to generate an unique MAC
address.

This adds a new, Amlogic specific, "sm" cmd with a "serial" subcommand
to write the SoC unique serial to memory.

This "cm" command will be extended in further patches.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-08-12 10:02:30 +02:00
Neil Armstrong
cddca4b4ca ARM: dts: Import Amlogic G12A SEI510 DT from Linux 5.3-rc1
Import Linux 5.2-rc1 sei510 DT from 5f9e832c1370 ("Linus 5.3-rc1") for the
meson-g12a-sei510 board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-08-12 10:02:30 +02:00
Pascal Linder
b75e9e3fce km/uart: port UART interface of KM Kirkwood boards to driver model
Activate the driver model for the serial interface in the KM Kirkwood
Kconfig file. The associated preprocessor definitions could be removed
from the header file. However, the clock of 200 MHz needs to be declared
in the device tree.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-08-12 09:12:38 +02:00
Simon Glass
f3998fdc4d env: Rename environment.h to env_internal.h
This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.

Rename this file and add a comment at the top to indicate its internal
nature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-11 19:27:31 -04:00
Simon Glass
e7dcf5645f env: Drop environment.h header file where not needed
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
0ac7d722ed env: Move get/set_default_env() to env.h
Move these functions to the new header file and rename set_default_env()
to env_set_default() so that it has a consistent env_ prefix.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
168068fb3d env: Move env_set_ulong() to env.h
Move env_set_ulong() over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00