Commit graph

67 commits

Author SHA1 Message Date
Simon Glass
27a1961d0b rockchip: jerry: Enable the Chrome OS EC
Turn on the EC and enable the keyboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
69a050483e rockchip: jerry: Drop unused options
To reduce the SPL image size, drop the LED features. Jerry does not have
an LED and we can leave out GPIO support also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7991809c98 rockchip: Disable simple-bus in SPL for firefly-rk3288, jerry
This is not needed for booting, so drop it from SPL to save about 300 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
156ac85e1d rockchip: jerry: Enable the RK808 PMIC and regulator
Enable this PMIC and regulator, which is used on jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
9c56d6f71e rockchip: Move firefly and jerry to use the full pinctrl
Use the full pinctrl driver in U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
898d64395c rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.

Update the clock drivers and the code that uses them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
79d020ee74 rockchip: Use pwrseq for MMC start-up on jerry
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
ec4ac4e7c0 rockchip: Correct the defconfig order
This has got out of sequence somehow. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
dd8e42900b rockchip: Fix the configuration for chromebook_jerry
Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-08 07:59:07 -07:00
Sjoerd Simons
00ea76e800 rockchip: Explicitly set CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN
Now that u-boot relocates the malloc area in SPL to SDRAM, with the
malloc area sitting below the SPL_STACK_R_ADDR the
SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for
rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then
STACK_R_MALLOC_SIMPLE_LEN (1Mb).

Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot
from SD card.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
huang lin
41c7f664b9 dm: core: Add SPL Kconfig for REGMAP and SYSCON
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01 08:07:22 -07:00
Bin Meng
e5d5d4474a spi: Move SPI drivers to defconfig
There are already Kconfig options for SPI drivers, but we
have not moved them from config.h to defconfig files. This
commit does this in a batch.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-25 10:05:28 -05:00
Thomas Chou
9e39003e7f ns16550: move CONFIG_SYS_NS16550 to Kconfig
Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-21 21:50:18 -05:00
Ariel D'Alessandro
2b24e09c66 rockchip: Turn on CONFIG_DEBUG_UART_NS16550 in defconfigs
No UART driver was specified in defconfig, thus
DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
commit 220e8021af added a new Altera UART
driver.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19 17:06:25 -05:00
Thomas Chou
e4aa8edb6e common: add CMD_GPIO to Kconfig
Add CMD_GPIO to Kconfig and run tools/moveconfig.py .

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-18 14:50:06 -05:00
Bin Meng
80df691349 Reorder defconfigs with 'savedefconfig'
Some boards' defconfigs are disordered. Reorder them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 09:06:13 -04:00
Simon Glass
e2e947ff6b rockchip: Add basic support for jerry
This builds and displays an SPL message, but does not function beyond that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-02 21:28:24 -06:00