Commit graph

88242 commits

Author SHA1 Message Date
Heinrich Schuchardt
175e4b01be cmd: setexpr: fix printf_str()
If vsnprintf() returns a negative number, (i >= remaining) will
possibly be true:

'i' is of type signed int and 'remaining' is of the unsigned type size_t.
The C language will convert i to an unsigned type before the comparison.

This can result in the wrong error type being indicated.

Checking for negative i should be done first.

Fixes: f4f8d8bb1a ("cmd: setexpr: add format string handling")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-23 08:02:59 +02:00
Tom Rini
976fb2ffa3 Prepare v2023.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-21 16:19:59 -04:00
Tom Rini
db72a5736f sandbox64 fixes
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Merge tag 'dm-pull-20aug23' of https://source.denx.de/u-boot/custodians/u-boot-dm

sandbox64 fixes
2023-08-21 15:48:30 -04:00
Marek Vasut
25a9be71ec test: cpu: Handle both 32bit and 64bit CPUs
Handle both 32bit and 64bit systems, i.e. sandbox and sandbox64
the same way drivers/cpu/cpu_sandbox.c does, that is in case
CONFIG_PHYS_64BIT is enabled, assume 64bit address width, else
assume 32bit address width. This fixes ut_dm_dm_test_cpu test
failure on sandbox64.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
ddfda552e7 configs: sandbox64: Enable PCI register multi-entry support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys
test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
eaa5b5d7d2 configs: sandbox64: Enable clock CCF driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
5d5d7e225d configs: sandbox64: Enable video 12x22 font support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
539485fd9e configs: sandbox64: Enable video 16bpp and 24bpp support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16
and ut_dm_dm_test_video_bmp24 tests .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
d54c44b474 configs: sandbox64: Enable PINCTRL_SINGLE driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
2fff2881c8 test: dm: pinmux: Handle %pa in pinctrl-single mux output
The pinctrl-single driver uses %pa to print register value
in its single_get_pin_muxing() output. Handle this properly
in the test based on CONFIG_PHYS_64BIT .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
09c0b2e712 configs: sandbox64: Enable BUTTON_ADC driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
226ddc0dcc configs: sandbox64: Enable MC34708 driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
49147a0b0d configs: sandbox64: Increase console record size to 0x6000
Align the sandbox64 defconfig with sandbox defconfig. Increase the
console record size. This fixes ut_bootstd_bootflow_cmd_scan_e .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
ff547a6bc2 configs: sandbox64: Enable SF bootdev
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:26 -06:00
Tom Rini
17aad80355 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-08-20 11:09:11 -04:00
Paul Barker
dbada49554 arm: rmobile: Fix off-by-one error in cpuinfo
In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the
rmobile_cpuinfo array.

At the end of the loop, i is equal to the array size, i.e.
rmobile_cpuinfo[i] accesses one entry past the end of the array. The
last entry in the array is a fallback value so the loop should count to
ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the
index of the fallback value if no match is found.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-19 16:34:41 +02:00
Tom Rini
406a5ddf9d Pull request doc-2023-10-rc3-2
Documentation:
 
 * csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line
 * printf() codes: correct format specifier for unsigned int
 * Fix typos in clk.h, irq.h.
 * Correct description of proftool
 
 Other:
 
 * Quieten test for erofs filesystem presence
 * spl: don't assume NVMe partition 1 exists
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Merge tag 'doc-2023-10-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request doc-2023-10-rc3-2

Documentation:

* csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line
* printf() codes: correct format specifier for unsigned int
* Fix typos in clk.h, irq.h.
* Correct description of proftool

Other:

* Quieten test for erofs filesystem presence
* spl: don't assume NVMe partition 1 exists
2023-08-19 10:13:28 -04:00
Fabio Estevam
951d63000e doc: csf_examples: csf.sh: Remove unneeded export ATF_LOAD_ADDR line
Originally, exporting the ATF_LOAD_ADDR was required, but since binman has
been used to generate the flash.bin, it is no longer needed to do
such manual export.

The ATF address is now passed via binman.

Remove the unneeded export ATF_LOAD_ADDR line.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-08-19 04:12:53 +02:00
Paul Barker
99a4e5865e irq: Fix typo in header comment
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19 04:12:53 +02:00
Paul Barker
52029b783b clk: Fix typo in header comment
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19 04:12:53 +02:00
Siddharth Vadapalli
68886a9941 doc: printf() codes: Fix format specifier for unsigned int
The format specifier for the "unsigned int" variable is documented as
"%d". However, it should be "%u". Thus, fix it.

Fixes: f5e9035043 ("doc: printf() codes")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19 04:12:52 +02:00
Puhan Zhou
aab60a5128 docs: fix wrong usage of proftool
The usage of proftool in docs is incorrect. If proftool is used without
'-o' argument, it will show the usage like following

$ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace >trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>

Change '>' to '-o' to fix it.

Signed-off-by: Puhan Zhou <puh4n.zhou@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-19 04:12:52 +02:00
Heinrich Schuchardt
4ad85a9fea spl: don't assume NVMe partition 1 exists
There is no requirement that a partition 1 exists in a partition table.
We should not try to retrieve information about it.

We should not even try reading with partition number
CONFIG_SYS_NVME_BOOT_PARTITION here as this is done in the fs_set_blk_dev()
call anyway.

Fixes: 8ce6a2e175 ("spl: blk: Support loading images from fs")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-19 04:12:52 +02:00
Simon Glass
97f4bc372f fs/erofs: Quieten test for filesystem presence
At present listing a partition produces lots of errors about this
filesystem:

   => part list mmc 4
   cannot find valid erofs superblock
   cannot find valid erofs superblock
   cannot read erofs superblock: -5
   [9 more similar lines]

Use debugging rather than errors when unable to find a signature, as is
done with other filesystems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-19 04:12:52 +02:00
Jonas Karlman
e34efcf51d rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC name
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig

Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-18 10:25:03 -04:00
Tom Rini
2d8e7ac320 ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
 has some other minor enhancements, such as enabling the poweroff command
 on several Tegra210 and Tegra186 boards.
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Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra

ARM: tegra: Changes for v2023.10-rc1

This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
2023-08-18 10:05:04 -04:00
Tom Rini
3a438c1dbc Merge branch '2023-08-17-assorted-minor-fixes'
- More MAINTAINERS updates, update CI to use a newer coreboot and make
  arm-ffa a bit less verbose by default.
2023-08-17 15:01:11 -04:00
Jonas Karlman
a5ce494596 board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERS
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and
can help with review and testing of defconfig and device tree changes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-08-17 15:01:05 -04:00
Jonas Karlman
d17e896d07 board: rockchip: rk35xx: Add device tree files to MAINTAINERS
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include
related device tree files. Also replace space with tabs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-08-17 15:01:05 -04:00
Jonas Karlman
11bb3c76bc doc: rockchip: Add supported RK3566/RK3568 boards
Update Rockchip documentation to include RK3566/RK3568 boards already
supported. Also list Pine64 boards under RK3566 and drop defconfig to
match other listed boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-08-17 15:01:05 -04:00
Neha Malcom Francis
4901d2499c MAINTAINERS: Update UFS maintainer
Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no
longer valid.

Adding Bhupesh Sharma who has been using this framework working on
Qualcomm Snapdragon SoCs as well as sending out fixes.

Adding myself as well to support in reviewing and testing patches.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-08-17 15:00:59 -04:00
Simon Glass
c60e6a24dd CI: x86: coreboot: Update to latest coreboot
Use a recent coreboot build for this test.

The coreboot commit is:

   6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings

This is build with default settings, i.e. QEMU x86 i440fx/piix4

Add some documentation as to how to update it next time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-17 12:29:21 -04:00
Abdellatif El Khlifi
0d9a1262bb corstone1000: update maintainers
Update MAINTAINERS of corstone1000 board.

Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
2023-08-17 12:29:21 -04:00
Abdellatif El Khlifi
67969516b0 arm_ffa: use debug logs
replace info logs with debug logs

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-17 12:29:21 -04:00
Tom Rini
6831a4be29 arm: Add arch/arm/dts/Makefile specifically to MAINTAINERS
In order to reduce the number of people that are cc'd on a patch for
simply touching arch/arm/dts/Makefile (which is a big common file) add
an entry specifically to MAINTAINERS under the ARM entry.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-17 11:13:46 -04:00
Tom Rini
375fea811d DHSOM: Power cycle Buck3 in reset
DHCOM: Switch DWMAC RMII clock to MCO2
 stm32f746: fix display pinmux
 stm32mp: psci: Inhibit PDDS because CSTBYDIS is set
 stm32mp1: DT alignment with v6.4
 stm32mp1: add splashscreen with STMicroelectronics logo
 stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent
 serial: stm32: Extend TC timeout
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Merge tag 'u-boot-stm32-20230816' of https://source.denx.de/u-boot/custodians/u-boot-stm

DHSOM: Power cycle Buck3 in reset
DHCOM: Switch DWMAC RMII clock to MCO2
stm32f746: fix display pinmux
stm32mp: psci: Inhibit PDDS because CSTBYDIS is set
stm32mp1: DT alignment with v6.4
stm32mp1: add splashscreen with STMicroelectronics logo
stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent
serial: stm32: Extend TC timeout
2023-08-16 11:23:58 -04:00
Valentin Caron
9e8cbea1a7 serial: stm32: extend TC timeout
Waiting 150us TC bit couldn't be enough.

If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).

Fixes: b4dbc5d65a ("serial: stm32: Wait TC bit before performing initialization")

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:38:23 +02:00
Marek Vasut
c9678850bd ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC
block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK
pad for the PHY and the same 50 MHz clock are fed back to ETHRX via
internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at
all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and
the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad
using external pad-to-pad connection.

Option (1) has two downsides. ETHCK_K is supplied directly from either
PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and
since the same PLL output is also used to supply SDMMC blocks, the
performance of SD and eMMC access is affected. The second downside is
that using this option, the EMI of the SoM is higher.

Option (2) solves both of those problems, so implement it here. In this
case, the PLL4_P is no longer limited and can be operated faster, at
100 MHz, which improves SDMMC performance (read performance is improved
from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M
count=1). The EMI interference also decreases.

Ported from Linux kernel commit
73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM")

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:37:14 +02:00
Patrick Delaunay
284b08fb51 board: stm32mp1: add splash screen with stmicroelectronics logo
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.

With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:35:55 +02:00
Patrick Delaunay
61ad1a527a ARM: dts: stm32mp: alignment with v6.4
Device tree alignment with Linux kernel v6.4.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:30:49 +02:00
Marek Vasut
b58ab56d14 ARM: stm32: Inhibit PDDS because CSTBYDIS is set
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never
enter CStandby state and would always end up in CStop state. Clear
the PDDS bit, which indicates the CA cores can enter CStandby state
as it makes little sense to keep it set with CSTBYDIS also set.

This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR
PDDS bits are set, then the chip enters CStandby state even though the
PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that
from happening.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16 15:29:47 +02:00
Dario Binacchi
fc7bd99f6d ARM: dts: stm32: fix display pinmux for stm32f746-disco
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9  -> LCD_B4
- AF14 -> LCD_B1

So replace AF14 with AF9 for PG12 in the dts.

Fixes: fe63d3cfb7 ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:27:45 +02:00
Patrick Delaunay
141e232dbd clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent
To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:

   no parents defined for clk id 123

This patch change the level of this message to avoid this trace for
valid clock tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:23:09 +02:00
Marek Vasut
b3d97f8ce3 ARM: stm32: Power cycle Buck3 in reset on DHSOM
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:

  "
  RAM: DDR3L 32bits 2x4Gb 533MHz
  DDR invalid size : 0x4, expected 0x40000000
  DRAM init failed: -22
  ### ERROR ### Please RESET the board ###
  "

Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16 15:19:57 +02:00
Tom Rini
9b54b0e37b Pull request for efi-2023-10-rc3
Documentation:
 
 * Correct description of board_get_usable_ram_top
 * Add partition API to HTML documentation
 * Describe  lmb_is_reserved
 * doc/sphinx/requirements.txt: Bump certifi up
 
 UEFI:
 
 * Fix  efi_add_known_memory
 * Make distro_efi_boot() static
 
 Other:
 
 * Correct return type board_get_usable_ram_top
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Merge tag 'efi-2023-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-10-rc3

Documentation:

* Correct description of board_get_usable_ram_top
* Add partition API to HTML documentation
* Describe  lmb_is_reserved
* doc/sphinx/requirements.txt: Bump certifi up

UEFI:

* Fix  efi_add_known_memory
* Make distro_efi_boot() static

Other:

* Correct return type board_get_usable_ram_top
2023-08-15 13:08:17 -04:00
Heinrich Schuchardt
d768dd8855 common: return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
b571b3acda efi_loader: fix efi_add_known_memory()
In efi_add_known_memory() we currently call board_get_usable_ram_top() with
an incorrect value 0 of parameter total_size. This leads to an incorrect
value for ram_top depending on the code in board_get_usable_ram_top().

Use the value of gd->ram_top instead which is set before relocation by
calling board_get_usable_ram_top().

Fixes: 7b78d6438a ("efi_loader: Reserve unaccessible memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Bin Meng
6072703dc9 bootmeth: efi: Make distro_efi_boot() static
As it is only called in bootmeth_efi.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
5aae021c30 doc: add partition API to HTML documentation
* Convert comments in part.h to Sphinx style.
* Create documentation page for the partition API.
* Add the partition API page to the API index page.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
289bd72ea4 doc: description of board_get_usable_ram_top()
Improve the description of function board_get_usable_ram_top().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15 18:21:17 +02:00