Commit graph

1956 commits

Author SHA1 Message Date
Jens Scharsig
3ee9f03f58 at91rm9200: fix errors with CONFIG_CMD_I2C_TREE
This patch prevents linker error on AT91RM9200 boards, if
CONFIG_CMD_I2_TREE is set.
It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2008-09-12 02:20:47 +02:00
Hugo Villeneuve
b5b0344957 ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-09-12 02:20:47 +02:00
Andrew Dyer
274737e5eb i.mx change get_timer(base) to return time since base
This patch changes get_timer() for i.MX to return the time since
'base' instead of the time since the counter was at zero.

Symptom seen is flash timeout errors when erasing or programming a
sector using the common cfi flash code.

Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
2008-09-12 02:20:46 +02:00
Andrew Dyer
48fed40575 i.MX use u-boot baud rate and don't assume UART master clock
1) Change the i.MX serial driver to use the baud rate set in the
 u-boot environment

2) don't assume a 16MHz value for PERCLK1 in baud rate calculations

3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write
 one to clear" like other status bits in the reg.)

Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
2008-09-12 02:20:46 +02:00
Andrew Dyer
6e1551a870 arm920t fix constant error in start.S
Code in cpu/arm920t/start.S will die with a compilation error if
CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
the ARM sub instruction.  Change the code so that each is subtracted
independently to avoid the error.

Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
2008-09-12 02:20:46 +02:00
Adrian Filipi
c455d07396 Set up SD/MMC OCR as comment describes. i.e. 3.2-3.4v.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-09-12 01:23:44 +02:00
Magnus Lilja
8c4ebec25b i.MX31: Add reset_timer() and modify get_timer_masked().
This patch adds the reset_timer() function (needed by nand_base.c) and
modifies the get_timer_masked() to work in the same way as the omap24xx
function.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-09-12 01:23:43 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0cf4fd3cf8 rename environment.c in env_embedded.c to reflect is functionality
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:01 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9314cee691 rename CFG_ENV_IS_IN_NVRAM in CONFIG_ENV_IS_IN_NVRAM
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:47:59 +02:00
Hugo Villeneuve
9b05aa788b ARM DaVinci: Fix broken HW ECC for large page NAND.
Based on original patch by Bernard Blackham <bernard@largestprime.net>

U-boot's HW ECC support for large page NAND on Davinci is completely
broken.  Some kernels, such as the 2.6.10 one supported by
MontaVista for DaVinci, rely upon this broken behaviour as they
share the same code for ECCs. In the existing scheme, error
detection *might* work on large page, but error correction
definitely does not.  Small page ECC correction works, but the
format is not compatible with the mainline git kernel.

This patch adds ECC code that matches what is currently in the
Davinci git repository (since NAND support was added in 2.6.24).
This makes the ECC and OOB layout written by u-boot compatible with
Linux for both small page and large page devices and fixes ECC
correction for large page devices.

The old behaviour can be restored by defining the macro
CFG_DAVINCI_BROKEN_ECC, which is undefined by default.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-09-10 11:40:30 -05:00
Andrew Klossner
5251469943 Fix printf errors under -DDEBUG
Fix printf format-string/arg mismatches under -DDEBUG.

These warnings occur with DEBUG defined for a platform using
cpu/mpc85xx.  Users of other architectures can unearth similar
problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
after "CFLAGS += $(call cc-option,-fno-stack-protector)".

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-09-09 17:02:41 -05:00
Kumar Gala
e0ff3d350d 85xx: Ensure timebase is zero on secondary cores
The e500um says the timebase is volatile out of reset.  To ensure
TB sync works we need to make sure its zero.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-09-09 16:52:45 -05:00
Sergei Poselenov
59f630588e Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-09-09 10:14:32 +02:00
Wolfgang Denk
ab00e7a23e Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Conflicts:

	Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-09-09 02:24:51 +02:00
Sergei Poselenov
1bb8b2ef27 ARM: fix warning: target CPU does not support interworking
This patch fixes warnings like this:

start.S:0: warning: target CPU does not support interworking

which come from some ARM cross compilers and are caused by hard-coded
(with "--with-cpu=arm9" configuration option) ARM targets (which
support ARM Thumb instructions), while the ARM target selected from
the command line (with "-march=armv4") doesn't support Thumb
instructions.

This warning is issued by the compiler regardless of the real use of
the Thumb instructions in code.

To fix this problem, we use options according to compiler version
being used.

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-09-09 02:14:43 +02:00
Sergei Poselenov
4265c35fbc ARM: Use do_div() instead of division for "long long".
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-09-09 02:14:41 +02:00
Stefan Roese
c351575c22 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-09-08 10:35:49 +02:00
Stefan Roese
f071f01fd0 ppc4xx: Remove CONFIG_CS8952_PHY define
Since this define is only used on one board that was never really in
production, removing this compile time option doesn't hurt and makes
the code more readable.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-08 10:27:56 +02:00
Stefan Roese
6ca8646c18 ppc4xx: Fix compilation warning for PIP405
This patch fixes a compilation warning for the PIP405 board. It moves the
#ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't
occur anymore. I am a little unsure if this #ifdef is at the correct
place now or if it could be removed completely. This needs to get
tested on the PIP405 board.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-08 10:27:51 +02:00
Stefan Roese
725b53ac61 ppc4xx: Fix compilation warning for canyonlands & glacier
Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-08 10:27:46 +02:00
Kumar Gala
302e52e0b1 Fix compiler warning in mpc8xxx ddr code
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
ctrl_regs.c:523: note: 'caslat' was declared here

Add a warning in DDR1 case if cas_latency isn't a value we know about.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-07 01:26:13 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d1e2319414 rtc: allow rtc_set to return an error and use it in cmd_date
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-07 00:56:36 +02:00
Victor Gallardo
78d7823689 ppc4xx: Add support for GPCS, SGMII and M88E1112 PHY
This patch adds GPCS, SGMII and M88E1112 PHY support
for the AMCC PPC460GT/EX processors.

Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-05 12:21:16 +02:00
Adam Graham
f6b6c45840 ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-05 12:04:16 +02:00
Adam Graham
075d0b81e8 ppc4xx: IBM Memory Controller DDR autocalibration routines
Alternate SDRAM DDR autocalibration routine that can be generically used
for any PPC4xx chips that have the IBM SDRAM Controller core allowing for
support of more DIMM/memory chip vendors and gets the DDR autocalibration
values which give the best read latency performance (SDRAM0_RDCC.[RDSS]).

Two alternate SDRAM DDR autocalibration algoritm are provided in this patch,
"Method_A" and "Method_B".  DDR autocalibration Method_A scans the full range
of possible PPC4xx  SDRAM Controller DDR autocalibration values and takes a
lot longer to run than Method_B.  Method_B executes in the same amount of time
as the currently existing DDR autocalibration routine, i.e. 1 second or so.
Normally Method_B is used and it is set as the default method.

The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM
Controller registers.[bit-field]:
1)  SDRAM0_RQDC.[RQFD]
2)  SDRAM0_RFDC.[RFFD]

This alternate PPC4xx DDR autocalibration code calibrates the following
IBM SDRAM Controller registers.[bit-field]:

1)  SDRAM0_WRDTR.[WDTR]
2)  SDRAM0_CLKTR.[CKTR]
3)  SDRAM0_RQDC.[RQFD]
4)  SDRAM0_RFDC.[RFFD]

and will also use the calibrated settings of the above four registers that
produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS]
register.[bit-field].

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-09-05 12:03:44 +02:00
Wolfgang Denk
d459516188 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2008-09-03 23:44:18 +02:00
Nick Spence
6eb2a44e27 mpc83xx: clean up cache operations and unlock_ram_in_cache() functions
Cleans up some latent issues with the data cache control so that
dcache_enable() and dcache_disable() will work reliably (after
unlock_ram_in_cache() has been called)

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-03 16:07:00 -05:00
Nick Spence
46497056ae mpc83xx: Store and display Arbiter Event Register values
Record the Arbiter Event Register values and optionally display them.

The Arbiter Event Register can record the type and effective address of
an arbiter error, even through an HRESET. This patch stores the values in
the global data structure.

Display of the Arbiter Event registers immediately after the RSR value
can be enabled with defines. The Arbiter values will only be displayed
if an arbiter event has occured since the last Power On Reset, and either
of the following defines exist:
 #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
                                    and type register values
 #define CONFIG_DISPLAY_AER_FULL  - display and interpret the arbiter
                                    event register values

Address Only transactions are one of the trapped events that can register
as an arbiter event. They occur with some cache manipulation instructions
if the HID0_ABE (Address Broadcast Enable) is set and the memory region
has the MEMORY_COHERENCE WIMG bit set. Setting:
 #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
                              only events, so that it can still capture
                              other real problems.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-03 16:06:57 -05:00
Nick Spence
ade50c7fa1 mpc83xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-03 16:06:51 -05:00
Nick Spence
d9fe88173c MPC83XX: Fix GPIO configuration - set gpio level before direction
Set DAT value before DIR values to avoid creating glitches on the
GPIO signals.

Set gpio level register before direction register to inhibit
glitches on high level output pins.

Dir and data gets cleared at powerup, so high level output lines see
a short low pulse between setting the direction and level registers.

Issue was seen on a new board with the nReset line of the NOR flash
connected to a GPIO. Setting the direction register puts the NOR flash
in reset so the next instruction to set the level cannot get executed.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-03 16:06:46 -05:00
Ben Warren
e1d7480b5d Moved initialization of MPC5xxx_FEC Ethernet driver to CPU directory
Modified board_eth_init() functions of boards that have this FEC in addition
to other Ethernet controllers.

Affected boards:
	bc3450
	icecube
	mvbc_p
	o2dnt
	pm520
	total5200
	tq5200

Removed initialization of controller from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:18 -07:00
Ben Warren
a0aad08f94 Moved initialization of MPC512x_FEC Ethernet driver to CPU directory
Added a cpu_eth_init() function to MPC512x CPU directory and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:17 -07:00
Ben Warren
3ae071e442 Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()
Removed at91sam9_eth_initialize() from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Ben Warren
89973f8a82 Introduce netdev.h header file and remove externs
This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Andy Fleming
75b9d4ae0d Pass in tsec_info struct through tsec_initialize
The tsec driver contains a hard-coded array of configuration information
for the tsec ethernet controllers.  We create a default function that works
for most tsecs, and allow that to be overridden by board code.  It creates
an array of tsec_info structures, which are then parsed by the corresponding
driver instance to determine configuration.  Also, add regs, miiregs, and
devname fields to the tsec_info structure, so that we don't need the kludgy
"index" parameter.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
Wolfgang Denk
a13b2d9379 Merge branch 'master' of git://git.denx.de/u-boot-arm 2008-09-01 00:06:05 +02:00
Wolfgang Denk
e155c9e00b Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2008-09-01 00:04:26 +02:00
Wolfgang Denk
de5b094def Merge branch 'master' of git://git.denx.de/u-boot-sh 2008-09-01 00:03:40 +02:00
Wolfgang Denk
845842c1e4 Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2008-08-31 23:53:22 +02:00
Nobuhiro Iwamatsu
6ad43d0dd8 sh: Add support SH2/SH2A which is CPU of Renesas Technology
Add support SH2/SH2A basic function.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-08-31 22:48:33 +09:00
Guennadi Liakhovetski
8262813ca0 USB: Add support for OHCI controller on S3C6400
Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-08-31 00:39:46 +02:00
Guennadi Liakhovetski
9b07773f88 ARM: Add arm1176 core with S3C6400 SoC
Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-08-31 00:39:46 +02:00
Sandeep Paulraj
fcaac589a6 ARM DaVinci: Changing function names for EMAC driver
DM644x is just one of a series of DaVinci chips that use the EMAC driver.
By replacing all the function names that start with dm644x_* to davinci_*
we make these function more portable. I have tested this change on my EVM.
DM6467 is another DaVinci SOC which uses the EMAC driver and i will
be sending patches that add DaVinci DM6467 support to the list soon.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2008-08-31 00:39:46 +02:00
Stefan Roese
c2b4b2e481 ppc4xx/NAND: Add select_chip function to 4xx NDFC driver
This function is needed for the new NAND infrastructure. We only need
a dummy implementation though for the NDFC.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-30 11:24:54 +02:00
Ben Warren
6b5049d056 Move MPC512x_FEC driver to drivers/net
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-29 13:58:12 -06:00
Ben Warren
80b00af01b Move MPC5xxx_FEC driver to drivers/net
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-29 13:58:07 -06:00
Wolfgang Ocker
52aef8f9ba ppc4xx: NAND configuration
Made NAND bank configuration setting a config variable.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:21:31 +02:00
Victor Gallardo
5bc542a593 ppc4xx: fix UIC external_interrupt hang on UIC0
This patch fixes a UIC external_interrupt hang if critical or non-critical
interrupt is set at the same time as a normal interrupt is set on UIC0.

Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:13:59 +02:00
Prodyut Hazarika
04737d5ffd ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller
Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests

Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-29 10:01:36 +02:00
TsiChung Liew
eec567a67e ColdFire: I2C fix for multiple platforms
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
Wolfgang Denk
33aa4eac66 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-08-28 00:39:43 +02:00
Wolfgang Denk
ae9e1b579e Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2008-08-28 00:39:27 +02:00
Kumar Gala
5798b1c465 FSL DDR: Remove duplicate setting of cs0_bnds register on 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-28 00:35:56 +02:00
Wolfgang Denk
0ba6bfef06 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-08-28 00:26:52 +02:00
Heiko Schocher
258c37b147 mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-08-27 16:03:48 -06:00
Kumar Gala
9cff4448a9 mpc85xx: remove redudant code with lib_ppc/interrupts.c
For some reason we duplicated the majority of code in lib_ppc/interrupts.c
not show how that happened, but there is no good reason for it.

Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:44:10 -05:00
Kumar Gala
ef50d6c06e mpc85xx: Add support for the MPC8536
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family.  We
also have SERDES init code for the 8536.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-08-27 11:43:54 -05:00
Kumar Gala
129ba616b3 mpc85xx: Add support for the MPC8572DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
457caecdbc FSL DDR: Remove old SPD support from cpu/mpc85xx
All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
2a6c2d7ab2 FSL DDR: Add 85xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
6fb1b73468 FSL DDR: Add e500 TLB helper for DDR code
Provide a helper function that board code can call to map TLBs when
setting up DDR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Ben Warren
fc363ce354 Moved initialization of GRETH Ethernet driver to CPU directory
Added a cpu_eth_init() function to leon2/leon3 CPU directories and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:17:24 -07:00
Ben Warren
86882b8077 Moved initialization of MCFFEC Ethernet driver to CPU directory
Added a cpu_eth_init() function to coldfire CPU directories and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:16:25 -07:00
Ben Warren
b31da88b9c Moved initialization of FSL_MCDMAFEC Ethernet driver to CPU directory
Added a cpu_eth_init() function to cpu/mcf547x_8x directory and
removed code from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:12:36 -07:00
Kumar Gala
b5710d9974 FSL DDR: Remove old SPD support from cpu/mpc86xx
All 86xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:05 +02:00
Kumar Gala
46ff4f1100 FSL DDR: Add 86xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:01 +02:00
Kumar Gala
233fdd502a FSL DDR: Add DDR2 DIMM paramter support
Compute DIMM parameters based upon the SPD information.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:00 +02:00
Kumar Gala
05c05a2363 FSL DDR: Add DDR1 DIMM paramter support
Compute DIMM parameters based upon the SPD information in spd.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:59 +02:00
Kumar Gala
58e5e9aff1 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers.  (83xx, 85xx, 86xx).

The code is broken up into the following steps:
	GET_SPD
	COMPUTE_DIMM_PARMS
	COMPUTE_COMMON_PARMS
	GATHER_OPTS
	ASSIGN_ADDRESSES
	COMPUTE_REGS
	PROGRAM_REGS

This allows us to share more code an easily allow for board specific code
overrides.

Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:58 +02:00
Ira W. Snyder
4ff9aea9d6 mpc83xx: add PCISLAVE support to 83XX_GENERIC_PCI setup code
This adds a helper function to unlock the PCI configuration bit, so that
any extra PCI setup (such as outbound windows, etc.) can be done after
using the 83XX_GENERIC_PCI code to set up the PCI bus.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:30 -05:00
Wolfgang Denk
a49d10cf02 Minor coding style cleanup, updte CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-25 23:45:41 +02:00
Jens Gehrlein
079edb913d MX31: fix bit masks in function mx31_decode_pll()
Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.

Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
2008-08-25 21:47:01 +02:00
Gururaja Hebbar K R
e8f1207bbf Correct ARM Versatile Timer Initialization
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
   -- Timer Value Register @ TIMER Base + 4 is Read-only.
   -- Prescale Value (Bits 3-2 of TIMER Control register)
	can only be one of 00,01,10. 11 is undefined.
   -- CFG_HZ for Versatile board is set to
	#define CFG_HZ		(1000000 / 256)
	So Prescale bits is set to indicate
	- 8 Stages of Prescale, Clock divided by 256
 - The Timer Control Register has one Undefined/Shouldn't Use Bit
   So we should do read/modify/write Operation

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
2008-08-25 13:00:03 +02:00
Hugo Villeneuve
e394116746 ARM DaVinci: Removed redundant NAND initialization code.
ARM DaVinci: Removed redundant NAND initialization code.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-08-25 11:12:44 +02:00
Hugo Villeneuve
b3fb663b20 ARM DaVinci: Fix compilation error with new MTD code.
ARM DaVinci: Fix compilation error with new MTD code.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-08-25 11:12:42 +02:00
Tirumala R Marri
5d4b3d2b31 ppc4xx: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix
During recent PCI-E tests it has been found that current
driverl level and de-emphasis values are not set correctly.
After sweeping throgh all de-ephasis values, it was found that
0x130 is a right value. Where 0x13 is driver level and 0 is
de-emphasis.

Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-22 10:31:41 +02:00
Stefan Roese
f556483734 ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:

- Rework memory-queue and PLB arbiter optimization code, that the
  local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
  of XXX+ 0x01). This was not introduced by Prodyut, just a
  copy-paste problem.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-21 11:05:03 +02:00
Prodyut Hazarika
079589bcfb ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe,
PPC405EX and PPC460EX/GT/SX

- Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
  processors
- Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
  across processors (405 and 440/460)
- Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
  processors
- Add register bit definitions for Memory Queue Configuration registers

Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-21 10:31:16 +02:00
Kumar Gala
ba37aa0328 fdt: rework fdt_fixup_ethernet() to use env instead of bd_t
Move to using the environment variables 'ethaddr', 'eth1addr', etc..
instead of bd->bi_enetaddr, bi_enet1addr, etc.

This makes the code a bit more flexible to the number of ethernet
interfaces.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-21 02:07:43 +02:00
Axel Beierlein
bef92e215d Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards
Tested with TQM5200S on STK52XX.200 Board

Signed-off-by: Axel Beierlein <belatronix@web.de>
2008-08-21 01:39:24 +02:00
Haavard Skinnemoen
d3c23a790f Merge branch 'next' of git://git.denx.de/u-boot-avr32
Conflicts:

	MAINTAINERS
2008-08-20 09:37:09 +02:00
Kumar Gala
fcd69a1a57 Clean up usage of icache_disable/dcache_disable
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache.  All callers of invalidate_l1_instruction_cache()
call icache_disable() right after.  Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.

Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-19 00:57:28 +02:00
TsiChung Liew
4cb4e654ca ColdFire: Multiple fixes for M5282EVB
Incorrect CFG_HZ value, change 1000000 to 1000.
Rename #waring to #warning. RAMBAR1 uses twice
in start.S, rename the later to FLASHBAR. Insert
nop for DRAM setup. And, env_offset in linker file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
9f75155145 ColdFire: Implement SBF feature for M5445EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:55 -06:00
TsiChung Liew
a7323bba22 ColdFire: Add SSPI feature for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:55 -06:00
Wolfgang Denk
28ac671910 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2008-08-14 11:26:22 +02:00
Scott Wood
1a23a197c8 s3c24x0: Update NAND driver to new API.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-13 17:04:30 -05:00
Wolfgang Denk
2fd0aad443 Merge branch 'Makefile' of git://git.denx.de/u-boot-arm 2008-08-13 23:23:13 +02:00
Stefan Roese
5a7ddf4e1f Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-08-13 06:47:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
cc4a0ceeac drivers/mtd/nand: Move conditional compilation to Makefile
rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:43 +02:00
Wolfgang Denk
8641ff266a Merge branch 'master' of git://www.denx.de/git/u-boot-at91 2008-08-12 22:02:27 +02:00
Stefan Roese
9939ffd5fb Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-08-12 20:39:27 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8ed2f5f950 at91: move arch-at91sam9 to arch-at91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-12 18:41:42 +02:00
Scott Wood
e4c0950854 NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:31 -05:00
Sergey Kubushyn
fe56a2772e NAND: Davinci driver updates
Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I
don't have hardware handy so I can not test it at the moment but changes are
rather trivial so it should work. It would be nice if somebody with a
hardware checked it anyways.

Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
2008-08-12 11:31:24 -05:00
Stefan Roese
3df2ece0f0 NAND: Update 4xx NDFC driver to match updated nand subsystem
This patch changes the 4xx NAND driver ndfc.c to match the new
infrastructure from the updated NAND subsystem. This NAND
subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
subsystem.

Tested successfully on AMCC Sequoia and Bamboo.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-12 11:31:23 -05:00
William Juul
5e1dae5c3d Fixing coding style issues
- Fixing leading white spaces
 - Fixing indentation where 4 spaces are used instead of tab
 - Removing C++ comments (//), wherever I introduced them

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:17 -05:00
William Juul
4cbb651b29 Remove white space at end.
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:16 -05:00
William Juul
cfa460adfd Update MTD to that of Linux 2.6.22.1
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:15 -05:00
Wolfgang Denk
52b047ae48 MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk'
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 12:10:11 +02:00
Wolfgang Denk
224f7a5679 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-08-12 11:47:54 +02:00
Wolfgang Denk
565ffbb9ee Merge branch 'master' of git://www.denx.de/git/u-boot-arm 2008-08-12 11:46:56 +02:00
Wolfgang Denk
c9c101c660 ads5121: fix compiler warnings (unused variables)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-12 00:36:53 +02:00
Kumar Gala
902ca09246 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS
Use CONFIG_NUM_CPUS to match existing define used by 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-12 00:09:29 +02:00
Becky Bruce
2d0daa0361 POWERPC 86xx: Move BAT setup code to C
This is needed because we will be possibly be locating
devices at physical addresses above 32bits, and the asm
preprocessing does not appear to deal with ULL constants
properly. We now call write_bat in lib_ppc/bat_rw.c.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-08-11 23:53:59 +02:00
Magnus Lilja
5276a3584d i.MX31: Fix mx31_gpio_mux() function and MUX_-macros.
Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX
contacts instead of only the first 256 ones as is the case prior to
this patch.

Add missing MUX_* macros and update board files to use the new macros.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-08-11 23:33:57 +02:00
Haavard Skinnemoen
7772c13ba0 Merge branch 'favr-32' of git://git.denx.de/u-boot-avr32
Conflicts:

	MAINTAINERS
	MAKEALL
	Makefile
2008-08-06 15:12:38 +02:00
Stefan Roese
f2302d4430 Fix merge problems
Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-06 14:05:38 +02:00
Kenneth Johansson
6689484ccd mpc5121: Move iopin features from board specific to common files.
And in the process eliminate some duplicate register defines.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
2008-08-05 20:45:34 -06:00
John Rigby
ef11df6b66 mpc5121: squash some fdt fixup errors
On ADS5121 when booting linux the following errors are seen:
    Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
    Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND

This is caused by ft_cpu_setup trying to deal with
both old and new soc node naming.  This patch
fixes this by being smarter about what to
fixup.

Also do soc node fixups by compatible instead of by path.
A new board config called OF_SOC_COMPAT defined
to be "fsl,mpc5121-immr" replaces the old
OF_SOC node path that was defined to be "soc@80000000".

Old device trees still work, but the compatiblity
is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
which is on by default in include/configs/ads5121.h.

Signed-off-by: John Rigby <jrigby@freescale.com>
2008-08-05 19:58:21 -06:00
Jean-Christophe PLAGNIOL-VILLARD
4cd7e6528f nios2/sysid: fix printf warning
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:24:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
81d3f1fddd nios2: fix phys_addr_t and phys_size_t support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-03 02:19:16 +02:00
Matvejchikov Ilya
9196b44334 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-31 11:35:16 +02:00
Julien May
5c374c9ee1 Add support for the hammerhead (AVR32) board
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-30 10:06:11 +02:00
Wolfgang Denk
1ca9950b46 Merge branch 'master' of git://git.denx.de/u-boot-mips 2008-07-30 01:24:07 +02:00
Adrian Filipi
7610db17fd Removed support for the adsvix board.
Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-07-30 00:26:03 +02:00
Wolfgang Ocker
dbd3238792 mips: Fix baudrate divisor computation on alchemy cpus
Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.

Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-07-30 00:40:54 +09:00
Michal Simek
1953d128fd microblaze: Fix printf() format issues
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-07-20 23:10:34 +02:00
Stefan Roese
66fe183b1d ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 15:57:23 +02:00
Stefan Roese
60204d06ed ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 support
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-18 12:31:25 +02:00
Ricardo Ribalda Delgado
d865fd0980 ppc4xx: CPU PPC440x5 on Virtex5 FX
-This patchs gives support for the embbedded ppc440
 on the Virtex5 FPGAs
-interrupts.c divided in uic.c and interrupts.c
-xilinx_irq.c for xilinx interrupt controller
-Include modifications propossed by  Stefan Roese

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-18 12:30:50 +02:00
Stefan Roese
42246dacf6 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-07-17 10:41:06 +02:00
Wolfgang Denk
1d28d48e3d Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-07-15 21:37:23 +02:00
Kumar Gala
73f15a060f 85xx: Cleanup L2 cache size detection
The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:14:20 -05:00
Paul Gortmaker
71074abbe0 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 18:56:51 -05:00
Andrew Klossner
24ef76f320 Change the temp map to ROM to align addresses to page size.
With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 18:46:32 -05:00
Kim Phillips
06b4186c10 mpc85xx: use IS_E_PROCESSOR macro
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:34 -05:00
Kim Phillips
6b70ffb9d1 fdt: add crypto node handling for MPC8{3, 5}xxE processors
Delete the crypto node if not on an E-processor.  If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-14 17:01:29 -05:00
Hugo Villeneuve
85e5808e8e ARM DaVinci: Remove extern phy_t declaration by moving code to proper place
ARM DaVinci: Remove extern phy_t declaration by moving
code to proper place.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-14 23:40:55 +02:00
Kumar Gala
348753d416 Fix some more printf() format problems.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 23:01:01 +02:00
Wolfgang Denk
b880cbf207 cpu/i386/serial.c: Fix syntax errors
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 21:19:08 +02:00
Wolfgang Denk
d0ff51ba5d Code cleanup: fix old style assignment ambiguities like "=-" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:19:07 +02:00
Wolfgang Denk
b64f190b7a Fix printf() format issues with sizeof_t types by using %zu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:06:35 +02:00
Stefan Roese
4b326101d6 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next 2008-07-14 10:45:47 +02:00
Wolfgang Denk
25dbe98abb Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-13 23:07:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0a5676befb Fix some more printf() format issues.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-13 16:55:00 +02:00
Marcel Ziswiler
6b760189d7 Fix build time warnings in function mmc_decode_csd()
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-13 15:06:52 +02:00
Hugo Villeneuve
c15947d6ce ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
caused by missing dcache status/enable/disable functions.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-07-13 15:05:11 +02:00
Stefan Roese
068c1b77c8 ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-13 15:04:11 +02:00
Wolfgang Denk
0740ac26f4 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-07-13 14:44:04 +02:00
TsiChung Liew
47bf9c71ae ColdFire: Fix FB CS not setup properly for Mcf5282
Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
CFG_CSn_RO is defined as 0, the chipselect will not
be assigned.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
bc3ccb139f ColdFire: Fix incorrect define for mcf5227x and mcf5445x RTC
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:59 -06:00
TsiChung Liew
dd08e97361 ColdFire: Fix compiling error for MCF5275
The compiling error was caused by missing a closed parentheses
in speed.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
TsiChung Liew
3b1e8ac9b4 ColdFire: Change invalid JMP to BRA caught by new v4e toolchain
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
TsiChung Liew
8371dc2066 ColdFire: Add -got=single param for new linux v4e toolchains
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
2008-07-11 10:45:57 -06:00
Stefan Roese
b578fb4714 ppc4xx: Fix include sequence in 4xx_pcie.c
This patch now moves common.h to the top of the inlcude list. This
is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
the phys_size_t/phys_addr_t are defined to the correct size in this
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 15:07:23 +02:00
Stefan Roese
69e2c6d0d1 ppc4xx: Fix compile warning in 44x_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
5de851403b ppc4xx: Rework 440GX UIC handling
This patch reworks the 440GX interrupt handling so that the common 4xx
code can be used. The 440GX is an exception to all other 4xx variants
by having the cascading interrupt vectors not on UIC0 but on a special
UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references
the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt
handling is simpler without any 440GX special cases.

Also some additional cleanup to cpu/ppc4xx/interrupt.c is done.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
d1631fe1a0 ppc4xx: Consolidate PPC4xx UIC defines
This 2nd patch now removes all UIC mask bit definition. They should be
generated from the vectors by using the UIC_MASK() macro from now on.
This way only the vectors need to get defined for new PPC's.

Also only the really used interrupt vectors are now defined. This makes
definitions for new PPC versions easier and less error prone.

Another part of this patch is that the 4xx emac driver got a little
cleanup, since now the usage of the interrupts is clearer.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:14 +02:00
Stefan Roese
4fb25a3db3 ppc4xx: Consolidate PPC4xx UIC defines
This patch is the first step to consolidate the UIC related defines in the
4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
steps.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Stefan Roese
e321801bed ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Stefan Roese
08250eb2ed ppc4xx: Fix merge problems in 44x_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Grant Erickson
1740c1bf40 ppc4xx: Add MII mode support to the EMAC RGMII Bridge
This patch adds support for placing the RGMII bridge on the
PPC405EX(r) into MII/GMII mode and allows a board-specific
configuration to specify the bridge mode at compile-time.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Grant Erickson
2e2050842e ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM Controller
This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM
controller registers (MODT and INITPLR) used by the
PowerPC405EX(r). The MMODE and MEMODE registers are unified with their
peer values used for the INITPLR MR and EMR registers,
respectively. Finally, a spelling typo is correct (MANUEL to MANUAL).

With these mnemonics in place, the CFG_SDRAM0_* magic numbers for
Kilauea are replaced by equivalent mnemonics to make it easier to
compare and contrast other 405EX(r)-based boards (e.g. during board
bring-up).

Finally, unified the SDRAM controller register dump routine such that
it can be used across all processor variants that utilize the IBM DDR2
SDRAM controller core. It produces output of the form:

	PPC4xx IBM DDR2 Register Dump:
		...
	        SDRAM_MB0CF[40] = 0x00006701
		...

which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included
since it is not uncommon that the DCR values in header files get mixed
up and it helps to validate, at a glance, they match what is printed
in the user manual.

Tested on:
  AMCC Kilauea/Haleakala:
  - NFS Linux Boot: PASSED
  - NAND Linux Boot: PASSED

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Feng Kan
7d30793685 ppc4xx: Add initial 460SX defines for the cpu/ppc4xx directory.
Signed-off-by: Feng Kan <fkan@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:12 +02:00
Wolfgang Denk
9b55a25369 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 01:16:00 +02:00
Kim Phillips
4109df6f75 silence misc printf formatting compiler warnings
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-10 22:12:09 +02:00
Wolfgang Denk
4b13860e74 Merge branch 'master' of git://git.denx.de/u-boot-mpc512x 2008-07-10 22:09:39 +02:00
Martha Marx
f31c49db2a Configuration changes for ADS5121 Rev 3
ADS5121 Rev 3 board is now the default config

config targets are now

ads5121_config
    Rev 3 board with
	PCI
	M41T62 on board RTC
	512MB DRAM

ads5121_rev2_config
    Rev 2 board with
	No PCI
	256MB DRAM

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:42 -06:00
Martha Marx
16bee7b0dc Consolidate ADS5121 IO Pin configuration
Consolidate ADS5121 IO Pin configuration to one file
board/ads5121/iopin.c.

Remove pin config from cpu/mpc512x/fec.c

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
2008-07-10 11:36:32 -06:00
Jon Loeliger
859f24350e Merge commit 'wd/master' 2008-07-10 12:05:32 -05:00
Stefan Roese
b002144e1d ppc4xx: Fix printf format warnings now visible with the updated format check
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:58:06 +02:00
Stefan Roese
5d812b8b4a ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.

Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:14:01 +02:00
Stefan Roese
ac5ba41c22 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-10 09:09:45 +02:00
Wolfgang Denk
4188f04918 Minor coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-10 01:13:30 +02:00
Wolfgang Denk
40234535ee Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-07-10 00:59:04 +02:00
Marcel Ziswiler
dbab0691d2 Minor spelling fix in comment.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-07-10 00:49:37 +02:00
Scott Wood
3167c5386e NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<smcnutt@psyent.com>.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-07-09 17:24:47 -05:00
Haavard Skinnemoen
c3bf1ad7ba mmc: Move atmel_mci driver into drivers/mmc
This makes it easier to use the driver on other platforms.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:05:52 +02:00
Haavard Skinnemoen
d2d54ea449 avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver
After we move the atmel_mci driver into drivers/mmc, we can't select
it with CONFIG_MMC anymore. Introduce a new symbol specifically for
this driver so that there's no ambiguity.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-10 00:04:47 +02:00
Matvejchikov Ilya
0e6989b9fa FDT memory and pci node fixes for MPC8260ADS
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:57:59 +02:00
Andrew Klossner
dc4b0b38d4 Fix printf errors.
The compiler will help find mismatches between printf formats and
arguments if you let it.  This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings.  Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments.  Others were just annoying, like
int-long mismatches on a system where both are 32 bits.  It's worth
fixing the annoying errors to catch the real ones.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
2008-07-09 23:55:46 +02:00
Wolfgang Denk
9692cab76f Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-07-09 23:22:54 +02:00
Nobuhiro Iwamatsu
9e23fe0560 sh: Fix SH-boards compile error
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-08 12:03:24 +09:00
Jason Jin
3473ab7372 Feed the watchdog in u-boot for 8610 board.
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-07-07 11:29:48 -05:00
Stefan Roese
7c6237b3e2 Merge branch 'master' of /home/stefan/git/u-boot/u-boot 2008-07-07 09:51:25 +02:00
Hugo Villeneuve
63676841ca Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.

Remove duplicate code in a if/else block in
cpu/arm926ejs/davinci/lxt972.c.
Fixed style issues.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Hugo Villeneuve
fec61431a0 Remove duplicate definitions in include/lxt971a.h.
Remove duplicate definitions in include/lxt971a.h.

Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 23:44:34 -07:00
Wolfgang Denk
b223017f08 Merge branch 'master' of git://www.denx.de/git/u-boot-avr32 2008-07-07 00:39:43 +02:00
Wolfgang Denk
3070a9a3cb Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-07-07 00:32:47 +02:00
Michal Simek
9fea65a6c4 ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405
This change helps with better handling with others
Xilinx based platform.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
2008-07-06 22:39:14 +02:00
Ben Warren
dd35479a50 Add mechanisms for CPU and board-specific Ethernet initialization
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code.  Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-06 00:20:59 -07:00
Wolfgang Denk
d86a0a6f7f Merge branch 'master' of ssh+git://mercury.denx.de/home/wd/git/u-boot/master
Conflicts:

	board/amirix/ap1000/serial.c
	board/exbitgen/exbitgen.c
	board/exbitgen/flash.c
	board/ml2/serial.c
	board/xilinx/ml300/serial.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-06 01:15:17 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
a30cc5a340 Cleanup: fix out-of-tree building for some boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:38:50 +02:00
Wolfgang Denk
461fa68d20 Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:00:14 +02:00
Esben Haabendal
ee4ae38342 mpc8260: add fdt_fixup_ethernet support
Add support for updating mac-address and local-mac-address in fdt for
all MPC8260 targets.

Signed-off-by: Esben Haabendal <eha@doredevelopment.dk>
2008-07-01 23:44:22 +02:00
Juergen Kilb
d92ea21baf i.MX31: fixed CTRL-C detection
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.

Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
2008-07-01 20:54:04 +02:00
Stefan Roese
dd1c5523d6 ppc4xx: Fix 460EX/GT PCIe port initialization
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-01 17:03:19 +02:00
Stefan Roese
745d8a0d3c ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:

Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.

This errata is not officially available yet. I'll update the comment
to add the errata number later.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-30 15:20:41 +02:00
Wolfgang Denk
e093a24762 Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-28 23:34:37 +02:00
Haavard Skinnemoen
341188b9cc MMC: Consolidate MMC/SD command definitions
This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.

There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.

Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-28 22:40:15 +02:00
Andre Schwarz
846f1574dd fix system config overwrite @ MPC834x and MPC8313
During 83xx setup the "System I/O configuration register high" gets
overwritten with user defined value if CFG_SICRH is defined.

Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
must keep their reset value regardless of configuration.

On my board (using RGMII) those bits are set after reset - yet it's
unclear where they come from.

The patch keeps both bits on MPC834x and MPC8313.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 17:04:28 -05:00
Kim Phillips
4890246a2c mpc83xx: move CPU_TYPE_ENTRY over to processor.h
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-25 16:34:29 -05:00
Stefan Roese
aac7a5095b ppc4xx: Fix problem in gpio_config()
As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted
left by one. So the additional shift is bogus.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-23 11:15:09 +02:00
Haavard Skinnemoen
5605ef6b58 avr32: Fix SPI portmux initialization
Use the new GPIO manipulation functions to set up the chip select lines,
and make sure both busses use GPIO for chip select control.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 12:46:43 +02:00
Peter Ma
4688f9e34a avr32: Add GPIO manipulation functions
Adds GPIO manipulation functions for AVR32 AP7 platform.

Signed-off-by: Peter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: coding style fixup, slight simplification]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20 10:40:42 +02:00
Anatolij Gustschin
96026d42fa Fix 4xx build issue
Building for 4xx doesn't work since commit 4dbdb768:

In file included from 4xx_pcie.c:28:
include/asm/processor.h:971: error: expected ')' before 'ver'
make[1]: *** [4xx_pcie.o] Error 1

This patch fixes the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 22:48:45 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Wolfgang Denk
1a5017601f Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-06-11 22:48:09 +02:00
Wolfgang Denk
cdeb62e20d Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-06-11 22:30:47 +02:00
Wolfgang Denk
1730edf76c Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-06-11 22:13:07 +02:00
Wolfgang Denk
5ea67393b8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-11 21:33:16 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Kumar Gala
f060054dad FSL LAW: Keep track of LAW allocations
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.

In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.

Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 01:50:53 -05:00
Sergei Poselenov
740280e68c Added the upmconfig() function for 85xx.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-06-11 00:29:29 -05:00
Wolfgang Grandegger
6beecfbb54 MPC85xx: Beautify boot output of L2 cache configuration
The boot output is now aligned poperly with other boot output
lines, e.g.:

  FLASH: 128 MB
  L2:    512 KB enabled

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2008-06-10 18:22:26 -05:00
Kumar Gala
730b2fcf6f 85xx: Add setting of cache props in the device tree.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Kumar Gala
4dbdb7681e 85xx: expose cpu identification
The current cpu identification code is used just to return the name
of the processor at boot.  There are some other locations that the name
is useful (device tree setup).  Expose the functionality to other bits
of code.

Also, drop the 'E' suffix and add it on by looking at the SVR version
when we print this out.  This is mainly to allow the most flexible use
of the name.  The device tree code tends to not care about the 'E' suffix.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-10 18:22:25 -05:00
Gerald Van Baren
fec6d9ee7c Remove the deprecated CONFIG_OF_FLAT_TREE
Use CONFIG_OF_LIBFDT instead to support flattened device trees.  It is
cleaner, has better functionality, and is better supported.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:35 -04:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Kumar Gala
ee1e35bede 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-09 13:31:20 -05:00
Becky Bruce
3b9519fc50 MPC85xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-09 13:31:20 -05:00
Shinya Kuribayashi
79b51ff820 [MIPS] cpu/mips/Makefile: Split [CS]OBJS onto separate lines
Also get rid of some #ifdefs in *.c files.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:59 +09:00
Shinya Kuribayashi
8bde63eb3f [MIPS] Rename Alchemy processor configs into CONFIG_SOC_*
CONFIG_SOC_AU1X00

  Common Alchemy Au1x00 stuff. All Alchemy processor based machines
  need to have this config as a system type specifier.

CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
CONFIG_SOC_AU1500, CONFIG_SOC_AU1550

  Machine type specifiers. Each port should have one of aboves.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-07 20:51:56 +09:00
Becky Bruce
279726bd00 MPC86xx: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd to prevent us from trying to access
non-mapped memory.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-06 10:55:35 -05:00
Stefan Roese
b2815f7928 ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config options
We use upper case letters for the AMCC processor defines (like
CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
not CONFIG_440SPe. This patch fixes the last misspelled config options.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06 16:10:41 +02:00
Shinya Kuribayashi
7daf2ebe91 [MIPS] Update <asm/addrspace.h> header
- Fix traditional KSEG names
- Replace PHYSADDR with CPHYSADDR

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Shinya Kuribayashi
5f64d21c9a [MIPS] Kill unused <version.h> inclusions
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-06-05 22:29:00 +09:00
Grant Erickson
22f371b630 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 21:22:26 +02:00
Hans-Christian Egtvedt
60445cb5c3 atmel_spi: Driver for the Atmel SPI controller
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.

Changed in v4:
  - Update to new API
  - Handle zero-length transfers appropriately. The user may send a
    zero-length SPI transfer with SPI_XFER_END set in order to
    deactivate the chip select after a series of transfers with chip
    select active. This is useful e.g. when polling the status
    register of DataFlash.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-03 20:30:05 +02:00
Haavard Skinnemoen
d255bb0e78 SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates the chipselect for a given slave
  * spi_cs_deactivate(): Deactivates the chipselect for a given slave
  * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?

Changed in v4:
  - Build fixes for various boards, drivers and commands
  - Provide common struct spi_slave definition that can be extended by
    drivers
  - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
  - Make default bus and mode build-time configurable
  - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-06-03 20:28:50 +02:00
Stefan Roese
bbeff30cbd ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.

This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:

csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG

I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:19 +02:00
Stefan Roese
192f90e272 ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:13 +02:00
Stefan Roese
39b32be18c ppc4xx: Fix common ECC generation code for 440GP style platforms
This patch makes the common 4xx ECC code really usable on 440GP style
platforms.

Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
we need to make some processor dependant defines used later on by the
driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:08 +02:00
Stefan Roese
ec724f883e ppc4xx: Change Kilauea to use the common DDR2 init function
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.

Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:03 +02:00
Stefan Roese
36ea16f6a0 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).

It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:

used on 405GR/CR/EP and some Xilinx Virtex boards.

used on 440GP/GX/EP/GR.

used on 440EPx/GRx.

used on 405EX/r/440SP/SPe/460EX/GT.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:21:53 +02:00
Stefan Roese
64852d09e0 ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code
selected via CONFIG_NAND_SPL. Now common code is used to initialize the
SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
Only *after* running from this location, nand_boot() is called.

Please note that the initsdram() call is now moved from nand_boot.c
to start.S. I experienced problems with some boards like Kilauea
(405EX), which don't have internal SRAM (OCM) and relocation needs to
be done to SDRAM before the NAND controller can get accessed. When
initdram() is called later on in nand_boot(), this can lead to problems
with variables in the bss sections like nand_ecc_pos[].

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2008-06-03 20:21:49 +02:00
Grant Erickson
c821b5f120 ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 1 of 2):

* Rolls up a suite of changes to enable correct primordial stack and
  global data handling when the data cache is used for such a purpose
  for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).

* Related to the first, unifies DDR2 SDRAM and ECC initialization by
  eliminating redundant ECC initialization implementations and moving
  redundant SDRAM initialization out of board code into shared 4xx
  code.

* Enables MCSR visibility on the 405EX(r).

* Enables the use of the data cache for initial RAM on
  both AMCC's Kilauea and Makalu and removes a redundant
  CFG_POST_MEMORY flag from each board's CONFIG_POST value.

  - Removed, per Stefan Roese's request, defunct memory.c file for
    Makalu and rolled sdram_init from it into makalu.c.

With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:20:50 +02:00
Grant Erickson
a439680019 PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-06-03 20:20:01 +02:00
Becky Bruce
9b124a6834 MPC512x: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible.  Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 19:47:14 +02:00
Becky Bruce
e34a0e911b PPC: 86xx Add bat registers to reginfo command
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 18:05:15 +02:00
Becky Bruce
31d8267224 PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now.  Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-03 17:48:41 +02:00
Wolfgang Denk
912810eeca Merge remote branch 'u-boot-at91/for-1.3.4' 2008-06-03 00:24:36 +02:00
Wolfgang Denk
7a68389a23 Merge remote branch 'u-boot-avr32/master' 2008-06-03 00:19:57 +02:00
Shinya Kuribayashi
e2ad842662 [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-30 00:53:38 +09:00
Haavard Skinnemoen
a8092c021d avr32: Fix theoretical race in udelay()
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.

Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
48ea623eae avr32: Compile atmel_mci.o conditionally
Remove #ifdef CONFIG_MMC from the source file and use conditional
compilation in the Makefile instead.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
e92a5bf833 avr32: Fix wrong error flags in atmel_mci driver
Make sure we check for CRC errors when sending commands that use CRC
checking.

Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
7a96ddadd1 avr32: Fix two warnings in atmel_mci.c
The warnings are harmless but annoying. Let's fix them.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
a23e277c4a avr32: Rework SDRAM initialization code
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.

  * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
  * Remove memory test from sdram_init() and make caller responsible
    for verifying the SDRAM and determining its size.
  * Remove base_address member from struct sdram_config (was sdram_info)
  * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
  * Add support for a common STK1000 hack: 16MB SDRAM instead of 8.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:31 +02:00
Haavard Skinnemoen
95107b7c02 avr32: Do stricter stack checking in the exception handler
Don't do a stack dump if the stack pointer is outside the memory area
reserved for stack.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
caf83ea888 avr32: Use the same entry point for reset and exception handling
Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.

Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
3ace2527ba avr32: Rename pm_init() as clk_init() and make SoC-specific
pm_init() was always more about clock initialization than anything
else. Dealing with PLLs, clock gating and such is also inherently
SoC-specific, so move it into a SoC-specific directory.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
4f5972c3b2 avr32: Use new-style Makefile for the at32ap platform
This makes it easier to avoid compiling certain files later.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
a9b2bb78a1 avr32: Remove unused file cpu/at32ap/pm.c
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:30 +02:00
Haavard Skinnemoen
781eb9a1e4 avr32: Get rid of the .flashprog section
The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.

Remove it on STK1000 as well, and get rid of all the associated code and
annotations.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
David Brownell
f793a35819 avr32: Disable the AP7000 internal watchdog on startup
This patch forces the watchdog off in all cases.  That will at least
get rid of the constant reboot cycle, though it won't let the watchdog
actually run in the new kernels:  its probe() comes up with a polite
warning.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-05-27 15:27:29 +02:00
Jean-Christophe PLAGNIOL-VILLARD
42fd5f87b1 Merging Stelian Pop AT91 patches
Merge branch 'testing-V2'

Conflicts:

	board/atmel/at91cap9adk/Makefile
                Fixing copyright
	board/atmel/at91sam9260ek/Makefile
                Fixing copyright
	board/atmel/at91sam9260ek/u-boot.lds
                Delete no more needed ld script

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-24 12:56:53 +02:00
Wolfgang Denk
2c8d41969b Merge branch 'master' of git://git.denx.de/u-boot-testing 2008-05-21 17:06:45 +02:00
Wolfgang Denk
ce6754df61 Fix some whitespace issues
introduced by 53677ef18 "Big white-space cleanup."

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 16:56:08 +02:00
Wolfgang Denk
0ad4770f8e Merge branch 'socrates' of /home/wd/git/u-boot/projects 2008-05-21 01:13:52 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Sergei Poselenov
793670c3c0 Fixed reset for socrates
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-05-20 23:27:50 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3cc27b426a i386: Fix multiple definitions of __show_boot_progress
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:59:20 +02:00
Stefan Roese
70fab1908f ppc4xx: Add 405EX(r) revision C PVR definitions and detection code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-13 20:22:01 +02:00
Stelian Pop
d99a8ff66d AT91SAM9261EK support
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:08 +02:00
Stelian Pop
11b162bae0 Use a common u-boot.lds file across all AT91CAP9/AT91SAM9 platforms
All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
below avoids the duplication of u-boot.lds by putting the file in the
cpu directory instead of the board one.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-10 11:32:06 +02:00
Stelian Pop
cce9cfdabc Fix @ -> <at> substitution
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.

The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-05-10 00:30:22 +02:00
Guennadi Liakhovetski
2ab02fd456 mx31ads: fix 32kHz clock handling
According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
Also fix a typo when verifying a jumper configuration. While at it, make
two needlessly global functions static.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-10 00:21:43 +02:00
Wolfgang Denk
7ea8325b41 Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-05-09 22:19:29 +02:00
Wolfgang Denk
356cd17cc2 Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-05-09 22:18:58 +02:00
Adrian Filipi
8fbc985bda Fix some typos
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-05-09 20:53:52 +02:00
Wheatley Travis
f5a2425919 7450 and 86xx L2 cache invalidate bug corrections
The 7610 and related parts have an L2IP bit in the L2CR that is
monitored to signal when the L2 cache invalidate is complete whereas the
7450 and related parts utilize L2I for this purpose. However, the
current code does not account for this difference. Additionally the 86xx
L2 cache invalidate code used an "andi" instruction where an "andis"
instruction should have been used.

This patch addresses both of these bugs.

Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Acked-By: Jon Loeliger <jdl@freescale.com>
2008-05-09 20:46:48 +02:00
Stelian Pop
567fb85217 Fix @ -> <at> substitution
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.

The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-08 23:40:42 +02:00
Stefan Roese
cb5d88b961 ppc4xx: Add weak default ft_board_setup() routine
This patch adds a default ft_board_setup() routine to the 4xx fdt code.
This routine is defined as weak and can be overwritten by a board specific
one if needed.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 11:01:09 +02:00
Dave Mitchell
b9bbefce1a ppc4xx: Fix typos in 460GT/EX FBDV array
Corrected two typos in the 460GT/EX FBDV array.

Signed-off-by: Dave Mitchell <dmitchell@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 07:01:41 +02:00
Shinya Kuribayashi
49387dba91 [MIPS] cpu/mips/cache.S: Fix build warning
Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.

Here's an example on gth2_config:

mips_4KC-gcc  -D__ASSEMBLY__ -g  -Os   -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.

In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.

In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.

This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code with/without this patch.

 90000668:       1485ffef        bne     a0,a1,90000628 <mips_cache_reset+0x20>
 9000066c:       ac80fffc        sw      zero,-4(a0)
 90000670:       01402821        move    a1,t2
-90000674:       0411ffba        bal     90000560 <mips_init_icache>
-90000678:       01803021        move    a2,t4
-9000067c:       01602821        move    a1,t3
-90000680:       0411ffcc        bal     900005b4 <mips_init_dcache>
-90000684:       01a03021        move    a2,t5
-90000688:       03000008        jr      t8
-9000068c:       00000000        nop
+90000674:       01803021        move    a2,t4
+90000678:       8f8f83ec        lw      t7,-31764(gp)
+9000067c:       01e0f809        jalr    t7
+90000680:       00000000        nop
+90000684:       01602821        move    a1,t3
+90000688:       01a03021        move    a2,t5
+9000068c:       8f8f81e0        lw      t7,-32288(gp)
+90000690:       01e0f809        jalr    t7
+90000694:       00000000        nop
+90000698:       03000008        jr      t8
+9000069c:       00000000        nop

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-06 13:22:52 +09:00
Wolfgang Denk
908261f3fd Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-05-05 13:25:04 +02:00
Vlad Lungu
0f8c62a14b Allow building mips versions with ELDK 3.1.1
.gpword works only with local symbols on certain binutils versions

Signed-off-by: Vlad Lungu <vlad.lungu@windrvier.com>
2008-05-05 13:24:12 +02:00
Wolfgang Denk
fb98f94fcb Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-05-04 01:03:30 +02:00
Wolfgang Denk
4a89b766bf Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-05-04 00:02:29 +02:00
Wolfgang Denk
bd98ee60df Revert "ColdFire: Get information from the correct GCC"
This reverts commit b7166e05a5
(replaced by commit c4e5f52a58).
2008-05-03 23:07:15 +02:00
Jean-Christophe PLAGNIOL-VILLARD
27c38689d0 pxa: fix previous definition on cpu init
start.S:183:1: warning: "ICMR" redefined
In file included from start.S:33:
include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition
start.S:187:1: warning: "RCSR" redefined
...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-03 20:56:22 +02:00
Wolfgang Denk
56bb37e4b9 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-05-03 20:46:40 +02:00
Shinya Kuribayashi
141ba1cad8 [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version picker
Current trick to pick up GNU assembler minor version uses a dot(.) as a
delimiter, and take the second field to obtain minor version number. But
as can be expected, this doesn't work with a version string which has
dots more than needs.

Here's an example:

$ mips-linux-gnu-as --version | grep 'GNU assembler'
GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
2-129) 2
$

This patch restricts the version format to 2.XX.XX... This will work
in most cases.

$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
18
$

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-03 13:51:44 +09:00
Shinya Kuribayashi
ea638951ac [MIPS] cpu/mips/cache.S: Add dcache_enable
Recent bootelf command fixes (017e9b7925,
"allow ports to override bootelf behavior") requires ports to have this
function.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-03 13:51:28 +09:00
Timur Tabi
1b9ed2574a Fix calculation of I2C clock for some 86xx chips
Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2.
There is no pattern that can be used to determine which chips use which
frequency, so the only way to determine is to look up the actual SOC
designation and use the right value for that SOC.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-04-30 22:52:35 +02:00
TsiChung Liew
b7166e05a5 ColdFire: Get information from the correct GCC
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-30 22:35:13 +02:00
Stefan Roese
ea9202a659 ppc4xx: Fix problem with DIMMs with 8 banks in 44x_spd_ddr2.c
This patch fixes a problem with DIMMs that have 8 banks. Now the
MCIF0_MBxCF register will be setup correctly for this setup too.

This was noticed with the 512MB DIMM on Canyonlands/Glacier.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30 14:50:04 +02:00
Kumar Gala
70a0f81412 85xx: Add -mno-spe to e500/85xx builds
Newer gcc's might be configured to enable autovectorization by default.
If we happen to build with one of those compilers we will get SPE
instructions in random code.

-mno-spe disables the compiler for automatically generating SPE
instructions without our knowledge.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 20:08:43 +02:00
Wolfgang Denk
8466647684 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-29 20:06:42 +02:00
Kumar Gala
45239cf415 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:44:29 -05:00
Kumar Gala
cf6cc01427 85xx: Additional fixes and cleanup of MP code
* adjust __spin_table alignment to match ePAPR v0.94 spec
* loop over all cpus when determing who is up.  This fixes an issue if
  the "boot cpu" isn't core0.  The "boot cpu" will already be in the
  cpu_up_mask so there is no harm
* Added some protection in the code to ensure proper behavior.  These
  changes are explicitly needed but don't hurt:
  - Added eieio to ensure the "hot word" of the table is written after
    all other table updates have occurred.
  - Added isync to ensure we don't prefetch loading of table entries
    until we a released

These issues we raised by Dave Liu.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 09:42:19 -05:00
Stefan Roese
cab99d6f32 ppc4xx: Fix compilation warning in denali_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 14:44:54 +02:00
Stefan Roese
85ad184b3b ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().

Tested on Katmai with ECC DIMM.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 13:57:07 +02:00
Markus Brunner
eea5a743a2 ppc4xx: Fixup ebc clock in FDT for 405GP/EP
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
doesn't exist.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
2008-04-29 07:37:54 +02:00
Wolfgang Denk
57533b881e Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-04-26 00:07:26 +02:00
Wolfgang Denk
1d907e66fd Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-26 00:06:13 +02:00
Dave Liu
bcae52a681 mpc83xx: remove the unused CPM's stuff
The MPC83xx family never have CPM block, so remove it from 83xx.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-25 09:34:21 -05:00
Wolfgang Denk
d00ce09040 USB: fix more GCC 4.2.x aliasing warnings
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-04-25 12:44:08 +02:00
Stefan Roese
24bfedbd0b ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdt
The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
environment variable will now get passed to the Linux kernel by setting
the device_type property of the PCIe device tree node. For normal root-
complex configuration it will keep its defaults value of "pci" and for
endpoint configuration it will get changed to "pci-endpoint".

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-25 11:44:47 +02:00
Wolfgang Denk
04a5b03d86 Merge branch 'master' of git://www.denx.de/git/u-boot-at91 2008-04-25 10:05:42 +02:00
Kim Phillips
78e4882988 lib_ppc: Revert "Make MPC83xx one step closer to full relocation."
This reverts commit 70431e8a73 which has
proven problematic getting right from the start at least on 83xx and
4xx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-25 00:13:12 +02:00
Kumar Gala
022f121635 85xx: Round up frequency calculations to get reasonable output
eg. because of rounding error we can get 799Mhz instead of 800Mhz.

Introduced DIV_ROUND_UP and roundup taken from linux kernel.

Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-04-24 15:42:35 +02:00
Wolfgang Denk
0aa88c8266 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-04-24 15:28:05 +02:00
Dirk Behme
80c40b765b ARM: Davinci: Fix DM644x timer overflow handling and cleanup
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.

Changes:

- Remove *_masked() functions as noted by Wolfgang

- Adapt register naming to recent TI spec (sprue26, March 2007)

- Fix reset_timer() handling

- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179

- Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).

Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing!

Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
2008-04-22 23:12:01 +02:00
Stefan Roese
8deafdc6ad ppc4xx: Add dcache_enable() for 440
dcache_enable() was missing for 440 and the patch
017e9b7925 ["allow ports to override bootelf
"] behavior uses this function.

Note: Currently the cache handling functions like
d/icache_disable/enable() are NOP's on 440. This may be changed in the
future.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-22 12:26:33 +02:00
Matthias Fuchs
e1d09680f6 ppc4xx: Fix sys_get_info() for 405GP(r)
This patch assigns the correct EBC clock for 405GP(r) CPUs
to PPC4xx_SYS_INFO structure. Without this patch U-Boot
uses an uninitialized EBC clock in its startup message.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-21 06:54:08 +02:00
Kumar Gala
0878af169b 85xx: Fix size of cpu-release-addr property
The cpu-release-addr is defined as always being a 64-bit quanity regardless
if we are running on a 32-bit or 64-bit machine.
2008-04-18 17:44:50 -05:00