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Author SHA1 Message Date
Stephen Warren
16bb08d19a ARM: tegra: implement WAR for Tegra114 CPU reset vector 
A Tegra114 HW bug prevents the main CPU vector from being modified under
certain circumstances. Tegra114 A01P and later with a patched boot ROM
set the CPU reset vector to 0x4003fffc (end of IRAM). This allows placing
an arbitrary jump instruction at that location, in order to redirect to
the desired reset vector location. Modify Tegra114's start_cpu() to make
use of this feature. This allows CPUs with the patched boot ROM to boot.

Based-on-work-by: Jimmy Zhang <jimmzhang@nvidia.com>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
 2013-03-14 11:06:43 -07:00
Tom Warren
702b872894 Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work 
I2C driver can now probe dev 0 (PWR_I2C, where the PMU, etc. lives).
This is needed so that the SDIO slot power can be brought up for
the MMC driver, so it has to precede those commits.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
 2013-03-14 11:06:41 -07:00
Tom Warren
4040ec10df Tegra114: Add AVP (arm720t) files 
This provides SPL support for T114 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
 2013-02-11 10:35:25 -07:00