Commit graph

5 commits

Author SHA1 Message Date
Xiang Wang
ee4303cffa gpio: mvmfp: support newer MFP bit definitions
1. The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range
has been moved to 12..11.
2. add sleep bit support

Signed-off-by: Xiang Wang <wangx@marvell.com>
[robh: rebase to current mainline]
Signed-off-by: Rob Herring <robh@kernel.org>
2015-04-23 13:59:18 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Lei Wen
71f13a21dc gpio: mvmfp: reduce include platform file
Build pass with following config:
dkb_config
aspenite_config

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-27 21:56:33 +02:00
Lei Wen
a03774ed88 mvmfp: add MFP configuration support for PANTHEON
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Prafulla Wadaskar
e5f495d172 gpio: Add Multi-Function-Pin configuration driver for Marvell SoCs
Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers
For ex. ARMADA100.

These registers are programmed to expose the specific functionality
associated with respective SoC Pins

This driver provides configuration APIs,
using them, configuration need to be done in board specific code

for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality

int board_early_init_f(void)
{
        u32 mfp_cfg[] = {
                /* Console on UART1 */
                MFP107_UART1_RXD,
                MFP108_UART1_TXD,
                MFP_EOC         /*End of configureation*/
        };
        /* configure MFP's */
        mfp_config(mfp_cfg);
        return 0;
}

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-12-16 23:02:43 +01:00