Commit graph

58299 commits

Author SHA1 Message Date
Tom Rini
11bd2fa197 SPL: Default to disabling legacy image support when using FIT
When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image.  Disable
legacy image support by default in that case to reclaim space.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:19 -04:00
Tom Rini
c76c93a3d5 configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY).  In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:18 -04:00
Roman Kapl
27eb177b39 tpm: wait for valid status
The TPM specification says that the EXPECT_DATA bit is not valid until
the VALID bit is set. Wait for that bit to be set. Fixes problems with
Ifineon SPI TPM.

Signed-off-by: Roman Kapl <rka@sysgo.com>
2019-07-11 14:11:18 -04:00
Miquel Raynal
2e8a720246 arm: spear: Return to BootROM if failing to boot from the main device
Overload the weak function board_boot_order() so that besides choosing
the main boot device, we can fallback on USB boot by returning in the
BootROM, eg. if the NOR flash is empty while it was the primary boot
medium.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
6d09581f78 arm: spear: Do not link the _main branch
The _main call is not supposed to return at all: don't link the
branch.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
f78fdee9fc arm: spear: Support returning to BootROM
Implement the weak board_return_to_bootrom() function so that when
enabling the spl_bootrom.c driver, one can make use of usbboot on
spear platforms. All necessary information to return to the BootROM
are stored in the BootROM's stack. The SPL stack pointer is reset so
we save the BootROM's stack pointer into the SPL .data section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
6a9d0e275f arm: spear: Simplify start.S organization
There is no reason to do the few spear-related initialization, in a
different procedure than 'reset'. Spare one branching and get a linear
code flow by removing this indirection.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
08ad72ae81 arm: spear: Reference the link register with LR instead of R14
The link register is stored in R14. ARM assembly code allows to use
the 'lr' name to reference it instead of 'r14' which is not very
meaningful. Do the substitution to ease the reading.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
f30765b748 arm: spear: Use PUSH/POP mnemonics when relevant
Quoting ARM "RealView Compilation Tools Assembler Guide v4.0":

        PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with
        the base register sp (r13), and the adjusted address written
        back to the base register.
	PUSH and POP are the preferred mnemonic in these cases.

Let's follow this recommandation to ease the reading and substitute
LDMIA/STMDB operations with PUSH/POP mnemonics.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
76bdaaa196 arm: spear: Purely cosmetic changes in start.S
Before cleaning a bit further the spear/start.S file, apply a few
cosmetic changes: capital letters, comment indentation and small
rewriting.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
10a5b3cd99 arm: spear: Fix the main comment in start.S
This comment describes the board state at the moment where we enter
the SPL. The description is entirely wrong; re-write it to fit the
reality.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
58cbb671ef arm: spear: Drop false comment
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in
arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
68cadee6f2 arm: spear: Call the SPL 'SPL', not 'Xloader'
Rename Xloader as SPL in comments.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
aa13fa71ea arm: spear: Drop useless board_init_r call
It is clearly stated that board_init_f should *not* call
board_init_r. Indeed, board_init_f should return. The code will
continue through arch/arm/lib/crt0.S which will do more setup before
calling board_init_r.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Miquel Raynal
fd4ee98db3 spl: Fix typo in kernel doc
Fix a tiny typo in boot_from_devices() kernel doc.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-07-11 10:05:15 -04:00
Ramon Fried
f2a55acfcf test: pci_ep: add basic pci_ep tests
Add basic PCI endpoint sandbox testing.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
bb41333782 pci_ep: add pci endpoint sandbox driver
Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
c2ccc9e5cb pci_ep: add Cadence PCIe endpoint driver
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Ramon Fried
914026d258 drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Baruch Siach
cc66ebdeec arm: mvebu: set 38x and 39x AVS on lower frequency
Reduce Auto Voltage Scaling VDD limit when core frequency is lower than
1600MHz. This reduces core voltage level from 1.25V to 1.15V, which
saves power.

The code is taken from Marvell's U-Boot 2013.01 revision 18.06.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
fd9d70d738 km/spi: remove deprecated SPI flash driver code for KM Kirkwood boards
KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
c2cd4ec00c km/spi: activate driver model for SPI flash on KM Kirkwood boards
The corresponding configurations are selected in the common Kconfig file.
This is easier than changing every affected board default configuration
file. The default configuration for the PORTL2 board, however, still needs
some modifications to correctly use the driver model.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
c85306345a km/spi: add SPI configuration to KM Kirkwood device tree
In order to migrate the SPI flash interface to the driver model, the SPI
configuration needs to be added in the KM Kirkwood device tree file.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
53c3050d0d km/spi: overwrite kirkwood_spi weak functions for KM Kirkwood boards
As the SPI NOR and NAND devices share the same hardware pins, the MPP
configuration has to be changed when claiming/releasing the bus. The
current configuration is saved when claiming and restored when releasing.
Furthermore, a general-purpose output is used to switch the chip-select
signal. This is now also implemented for the DM part of the kirkwood_spi
driver.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
f169653483 km/spi: add weak functions to kirkwood_spi driver (DM part)
The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
c0fed3ac25 km: modify Kconfig file organization for KM boards
As preparation for the upcoming transferring of configurations from header
files to Kconfig, a common Kconfig file for all KM boards was created. For
the moment, it only sources the other three, more specific, Kconfig files.
Therefore, the architecture Kconfig files now include the common Kconfig
file. Also, the configuration selection for KM boards was moved from the
architecture Kconfig files to the board specific Kconfig files.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Chris Packham
54b8c51ebe ARM: mvebu: Enable FIT support for db-xc3-24g4xg
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Luka Kovacic
7945436f88 arm: mvebu: crs305-1g-4s: Enable CMD_BOOTZ and increase SYS_BOOTM_LEN
This change enables CMD_BOOTZ and increases SYS_BOOTM_LEN to
make it easier to work with kernel images.

Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
6165c89128 arm: mvebu: turris_omnia: fix rescue mode bootcmd bootargs setting
Rescue mode bootcmd currently only appends the "omniarescue" parameter
to the bootargs variable. We do not want the user to be able to change
rescue mode bootargs. Therefore change this so that bootcmd sets the
bootargs variable in an absolute way (adding console device information
and the omniarescue paramterer).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
02aa5af922 arm: mvebu: turris_omnia: call pci_init from board init code
We always want to enumerate PCIe devices, because withouth this they
won't work in Linux.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
27e3d4846d arm: mvebu: turris_omnia: prefer SCSI booting before USB
If SCSI and USB boot options are both available, try to boot from SCSI
first.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
422237ee59 arm: mvebu: turris_omnia: remove unneeded macro from board config
This is not needed here since Omnia is using DM_PCI now.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
305a82217d arm: mvebu: turris_omnia: change environment address in SPI flash
The U-Boot partition is 1 MiB and environment is 64 KiB. It does not
make sense to have environment at 0xc0000 when it could be at 0xf0000
and we can have more space for U-Boot binary.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
b0045b1c11 arm: mvebu: turris_omnia: fix adapters MAC addresses
The board code reads MAC addresses from the ATSHA204A cryptochip.
For compatibility reasons the ethernet adapters on this SOC are not
enumerated in register address order. But when Omnia was first
manufactured this was done differently.

Change setting of MAC addresses to conform to the description on the
stickers sticked on actual Omnias.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
1b355e53fc arm: mvebu: turris_omnia: set default ethernet adapter
Set default value for the ethact variable to the WAN port.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
85fe44105a arm: mvebu: clearfog: document boot from SATA
Document the main U-Boot image offset when booting from SATA disk on the
Clearfog board.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
6403d385b6 arm: mvebu: clearfog: set U-Boot offset for SATA boot
See the offset of U-Boot in raw SATA disk to the same value as the MMC
offset. That is 0x140 sectors from the beginning of the SPL, which is
0x141 sectors from the beginning of the device (after the MBR sector).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
22c47f6bbe arm: mvebu: clearfog: enable SATA in SPL
Enable SATA peripherals in SPL to allow boot from SATA.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
22c654557f arm: mvebu: add support for boot from SATA
Add the required Kconfig and macro definitions to allow boot from SATA
on Armada 38x systems.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
f0aa125477 arm: mvebu: fix ahci mbus config in SPL
SPL does not initialize mbus_dram_info. Don't change the ahci mbus
settings of the ROM. This allows the ahci to work in SPL.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
760ef309cb spl: sata: don't force FS_FAT support
Allow the code to build when FS_FAT is not enabled, and thus
spl_load_image_fat() is not provided.

A subsequent patch should add alternative raw access U-Boot main image
load method.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Baruch Siach
ab2d415e9b spl: sata: fix build with DM_SCSI
The init_sata() routine is only present when DM_SCSI is not enabled.
Don't call init_sata() when DM_SCSI is enabled. The code will fall back
to scsi_scan() in this case.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Baruch Siach
a4c61ffde3 spl: sata: add default partition and image name
Add sensible defaults for the FAT partition selection and the main
U-Boot image file name. This allows spl_sata to build when the board
headers does not select them explicitly.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Heinrich Schuchardt
7ea3357957 trace: trace buffer may exceed 2GiB
Correct the debug output for the trace buffer size to accommodate trace
buffers exceeding 2GiB.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
2b7a3882e0 trace: do not limit trace buffer to 2GiB
There is no good reason to limit the trace buffer to 2GiB on a 64bit
system. Adjust the types of the relevant parameters.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Alex Marginean
b8e1f8270c drivers: pci: add API to issue FLR on a PCI function if supported
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function,
if FLR is supported.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
21ebbafde8 test: dm: Add a test for PCI Enhanced Allocation
This test is built on top of the existing swap_case driver.  It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case.  BARs 2,4 map to a
couple of magic values.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
0b143d8ab2 drivers: pci: add map_bar support for Enhanced Allocation
Makes dm_pci_map_bar API available for integrated PCI devices that
support Enhanced Allocation instead of the original PCI BAR mechanism.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
2204bc1bd3 pci: fixed dm_pci_map_bar comment
The comment now indicates that the input argument bar is a register offset,
not a BAR index.
It also mentions which BARs are supported for type 0/1 and that the
function can return 0 on error.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
da0fb5fdd4 trace: make call depth limit customizable
Up to now we had hard coded values for the call depth up to which trace
records are created: 200 for early tracing, 15 thereafter. UEFI
applications reach a call depth of 80 or above.

Provide customizing settings for the call trace depth limit and the early
call trace depth limit. Use the old values as defaults.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00