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5 commits

Author SHA1 Message Date
David Brownell
154b5484ac davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
David Brownell
6e29ed8e57 davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:01 -05:00
David Brownell
fcb7747775 davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:44:55 -05:00
Thomas Lange
d583ef5147 ARM DaVinci: EMIF settings
NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.

Without this patch, EMIF configurations made in board_init()
will be invalidated.

Signed-off-by: Thomas Lange <thomas@corelatus.se>
2009-07-06 21:52:23 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ee4f3e2765 davinci: move nand driver to drivers/mtd/nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-30 18:58:39 +02:00
Renamed from cpu/arm926ejs/davinci/nand.c (Browse further)