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74277 commits

Author SHA1 Message Date
Keerthy
7bafe88620 soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present of various TI SoCs such as
AM335x or AM437x or the AM654x family. Each SoC can have
one or more PRUSS instances that may or may not be identical.

The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.

Add support for pruss driver. Currently am654x family
is supported.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210622063431.3151-2-lokeshvutla@ti.com
2021-07-15 17:56:04 +05:30
Aswath Govindraju
776e25788c arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication
The final 128KB in SRAM is reserved by default for DMSC-lite code and
secure proxy communication buffer. The memory region used for DMSC-lite
code can be optionally freed up by secure firmware API[1]. However, the
buffer for secure proxy communication is not configurable. This default
hardware configuration is unique for AM64.

Therefore, indicate the area reserved for DMSC-lite code and secure proxy
communication buffer in the oc_sram device tree node.

[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210616163821.20457-3-a-govindraju@ti.com
2021-07-15 17:56:04 +05:30
Aswath Govindraju
5242c6a432 configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c0000
Earlier, the region 0x701c0000 to 0x701dffff was firewalled off because of
a bug in SYSFW. In the v2021.05 release of SYSFW this bug has been fixed
and this region can now be used for other allocations.

Therefore, move TF-A's load address to 0x701c0000 and update its location
in the device tree node. Also, increase the size allocated for TF-A to
account for future expansions.

Fixes: defd62ca13 ("arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210616163821.20457-2-a-govindraju@ti.com
2021-07-15 17:56:04 +05:30
Tom Rini
ff8f277e91 ti: am335x_evm: Switch to DISTRO_BOOT only
Remove the environment support for various legacy boot methods.  With
this, we will now default to booting any distribution that follows the
generic distro boot framework and no longer attempt to boot various
legacy (to this SoC) scripts/etc.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210610230147.22475-1-trini@konsulko.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
920e39b2f6 configs: am335x_guardian: add register maps support
add support to direct memory access of hardware peripherals registers

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-19-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
83a7ec0fbc configs: am335x_guardian: Enable bootcount nvmem support
include bootcount nvmem support

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-18-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
caf9478624 am335x, guardian: software update available status is stored in AM3352 RTC scracth register
RTC second scratch register[32-bit]:
  -zero byte hold boot count value
  -first byte hold update available state
  -second byte hold version
  -third byte hold magic number

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-17-Gireesh.Hiremath@in.bosch.com
Gbp-Pq: Topic apertis/guardian
Gbp-Pq: Name am335x-guardian-software-update-available-status-is-store.patch
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
9cd380ef5f am335x, guardian: Enable panel driver Himax HX8238D
- Enable lcd controller
- Display splash screen

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-16-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
e81e8af98f drivers: video: hx8238 fix build bug
update panel driver hx8238
fix build bug

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-15-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
321c5b7cd7 configs: am335x_guardian: Enable display config
-Enable configuration for display driver
-Disable support for SPL GPIO, CMD LED & SPL GPIO

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-14-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
ae628fb6da am335x, guardian: Enable backlight
Enable backlight, set brightness value and dimming frequency

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-13-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
d364926da3 am335x, guardian: update swi logic
read boot mode gpio and set the swi status

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-12-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
da09ba6f73 configs: am335x_guardian: disable spl command
- disable support for spl command

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-11-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
25b36ab260 configs: am335x_guardian: set boot delay
- set boot delay to zero, to increase boot speed

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-10-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
195854287b am335x, guardian: code cleanup and boot optimization
- remove redundant headers and boot modes from board file

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-9-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
f379c44a37 am335x, guardian: set environment variable autoload to no
autoload: if set to "no" then rarpb, bootp or dhcp commands will
just perform a configuration lookup from the BOOTP / DHCP server,
but not try to load any image using TFTP

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-8-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Moses Christopher
cea76a4f42 am335x, guardian: Update pinmux configuration
pinmux update for guardian board
- control ASP Board Power: GPIO, on/off ASP Board Power
- control Coincell Voltage Measurement: GPIO, enable/disable
  ADC measurements
- powerOff Device GPIO-PowerOff, cut the PMIC supply

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-7-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
b5a57bcda6 configs: am335x_guardian: add memtest configs
- Add mtest, meminfo commands

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-6-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Moses Christopher
2f147e028c am335x, guardian: set tftp_load_addr in environment
Set tftp_load_addr to 0x82000000 in MEM_LAYOUT_ENV_SETTINGS

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-5-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
f11c3b0ef3 configs: am335x_guardian: add ubi fastmap support
- Trigger fastmap automatically

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-4-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Moses Christopher
050531db00 am335x, guardian: mem: Add board dependent mem values
- Add mem-guardian.h derived from am33xx/mem.h

    * Add GPMC config values optimized for Bosch Guardian Board
    * NAND Chip used by Bosch Guardian Board is Micron MT29F4G08ABBFA

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-3-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Gireesh Hiremath
5dce6d226d configs: am335x_guardian: Enable clock driver
Enable TI clock driver support for guardian board

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-2-Gireesh.Hiremath@in.bosch.com
2021-07-15 17:56:03 +05:30
Simon Glass
2f91fc4003 x86: Ensure the e820 map is installed in all cases
This is a revert of a recent logic change in setup_zimage(). We do
actually need to install this information always. Change it to install
from the Coreboot tables if available, else the normal source.

Fixes: e7bae8283f ("x86: Allow installing an e820 when booting from coreboot")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:56:16 +08:00
Simon Glass
4db474aea0 doc: Update documentation for cros-2021.04 release
With the new 2021.04 we have a new version of Chromium OS boot, which
supports sandbox, coral and coral-on-coreboot. Add documentation for
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:28 +08:00
Simon Glass
1c56469ce1 dtoc: Check that a parent is not missing
With of-platdata-inst we want to set up a reference to each devices'
parent device, if there is one. If we find that the device has a parent
(i.e. is not a root node) but it is not in the list of devices being
written, then we cannot create the reference.

Report an error in this case, since it indicates that the parent node
is either missing a compatible string, is disabled, or perhaps does not
have any properties because it was not tagged for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-15 19:50:27 +08:00
Simon Glass
54e0bd1728 x86: cros: Check ROM exists before building vboot
All the x86 devicetree files are built at once, whichever board is
actually being built. If coreboot is the target build, CONFIG_ROM_SIZE
is not defined and samus cannot build Chromium OS verified boot. Add
this condition to avoid errors about CONFIG_ROM_SIZE being missing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-15 19:50:25 +08:00
Simon Glass
e74d0ec80b x86: coreboot: Document the memory map
Add information about memory usage when U-Boot is started from coreboot.
This is useful when debugging. Also, since coreboot takes a chunk of
memory in the middle of SDRAM for use by PCI devices, it can help avoid
overwriting this with a loaded kernel by accident.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:23 +08:00
Simon Glass
4dfe4b44cc x86: coreboot: Use vendor in the Kconfig
Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple
coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be
defined TARGET_COREBOOT.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:21 +08:00
Simon Glass
c5c62155c5 x86: Add function comments to cb_sysinfo.h
Add a function comment for get_coreboot_info() and a declaration for
cb_get_sysinfo(), since this may be called from elsewhere.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:17 +08:00
Simon Glass
50cf68c728 x86: coral: Allow booting from coreboot
Set up coral so that it can boot from coreboot, even though it is a
bare-metal build. This helps with testing since the same image can be used
in both cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:14 +08:00
Simon Glass
e5bfcab97b x86: coreboot: Show the BIOS date
The BIOS version may not be present, e.g. on a Chrome OS build. Add the
BIOS date as well, so we get some sort of indication of coreboot's
vintage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:12 +08:00
Simon Glass
7052968707 x86: Do cache set-up by default when booting from coreboot
A recent change to disable cache setup when booting from coreboot
assumed that this has been done by SPL. The result is that for the
coreboot board, the cache is disabled (in start.S) and never
re-enabled.

If the cache was turned off, as it is on boards without SPL, we should
turn it back on. Add this new condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:09 +08:00
Simon Glass
0f5ca1d1f1 x86: Update the MP constants to avoid conflicts
These constants conflict with error codes returned by the MP
implementation when something is wrong. In particular, mp_first_cpu()
returns MP_SELECT_BSP when running without multiprocessing enabled.
Since this is -2, it is interpreted as an error by callers, which
expect a positive CPU number for the first CPU.

Correct this by using a different range for the pre-defined CPU
numbers, above zero and out of the range of possible CPU values. For
now it is safe to assume there are no more than 64K CPUs.

This fixes the 'mtrr' command when CONFIG_SMP is not enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:04 +08:00
Simon Glass
92873f83d1 x86: Don't set up MTRRs if previously done
When starting U-Boot from a previous-stage bootloader we presumably don't
need to set up the variable MTRRs. In fact this could be harmful if the
existing settings are not what U-Boot uses.

Skip that step in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:50:00 +08:00
Simon Glass
bca2d579f4 tpm: cr50: Drop unnecessary coral headers
These headers are not actually used. Drop them so that this driver can
be used by other boards, e.g. coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:49:56 +08:00
Simon Glass
f784361b2a spi: ich: Don't require the PCH
When booting from coreboot we may not have a PCH driver available. The
SPI driver can operate without the PCH but currently complains in this
case. Update it to continue to work normally. The only missing feature
is memory-mapping of SPI-flash contents, which is not essential.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-07-15 19:49:52 +08:00
Simon Glass
f5cbb5c7cd x86: pci: Allow binding of some devices before relocation
At present only bridge devices are bound before relocation, to save space
in pre-relocation memory. In some cases we do actually want to bind a
device, e.g. because it provides the console UART. Add a devicetree
binding to support this.

Use the PCI_VENDEV() macro to encode the cell value. This is present in
U-Boot but not used, so move it to the binding header-file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:49:50 +08:00
Simon Glass
e58f3a7d9b pci: Use const for pci_find_device_id() etc.
These functions don't modify the device-ID struct that is passed in, so
mark the argument as const, so the data structure can be declared that
way. This allows it to be placed in the rodata section.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:49:46 +08:00
Tom Rini
18e7ebf755 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Turris_omnia/mox: SPI NOR and MTD related changes / fixes (Marek)
- a37xx: pci: Misc fixes / optimizations (Pali)
- Espressobin: Fix setting $fdtfile env & changes in MMC detection
  (Pali)
- MMC: mmc_get_op_cond: Allow quiet detection of eMMC (Pali)
2021-07-15 07:11:06 -04:00
Pali Rohár
a4c577f981 mmc: mmc_get_op_cond: Allow quiet detection of eMMC
Add a new 'quiet' argument to mmc_get_op_cond() function which avoids
printing error message when SD/eMMC card is not detected.

Espressobin and mx6cuboxi boards use this function for detecting presence
of eMMC and therefore it is expected and normal that eMMC does not have to
be connected. So error message "Card did not respond to voltage select!"
should be skipped in this case as it is not an error.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-15 10:53:11 +02:00
Pali Rohár
42ba56691c arm: mvebu: Espressobin: Use function mmc_get_op_cond() for detecting eMMC
Use function mmc_get_op_cond() instead of mmc_init() for detecting presence
of eMMC. Documentation for this function says that it could be used to
detect the presence of SD/eMMC when no card detect logic is available.

This function is also used by mx6cuboxi board for detecting presence of eMMC.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Pali Rohár
aeff1740b6 arm: mvebu: Espressobin: Fix setting $fdtfile env
Ensure that 'env default -a' always set correct value to $fdtfile, even
when custom user variable is already stored in non-volatile env storage
(means that env_get("fdtfile") call returns non-NULL value).

As default value is now correctly set like if specified at compile time in
CONFIG_EXTRA_ENV_SETTINGS, there is no need to set $fdtfile explicitly via
env_set("fdtfile", ...) call.

So remove wrong skip based on env_get("fdtfile") and then also unneeded
env_set("fdtfile", ...) call.

Fixes: c4df0f6f31 ("arm: mvebu: Espressobin: Set default value for $fdtfile env variable")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Marek Behún
4a8ad5849b arm: mvebu: armada-3720: remove unused config option
The config option CONFIG_DEBUG_UART_CLOCK is not used by Armada 3720's
serial driver (it wasn't even before the recent update of that driver).

Even if it was used, the value was incorrect (the frequency of the clock
is 25 MHz, not 25.8048 MHz).

Remove it from config files and set the default value to 0.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Marek Behún
4d4cbd9d4e arm: mvebu: turris_{omnia, mox}: enable MTD command
Now that the MTD subsystem properly supports OF partitions of a SPI NOR,
we can enable the MTD command and start using it instead of the
deprecated sf command.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Marek Behún
4494ca8431 arm: mvebu: turris_omnia: force 40 MHz speed on SPI NOR
Commit e2e95e5e25 ("spi: Update speed/mode on change") changed the
boot time on Turris Omnia from ~2.3s to over 8s, due to SPL loading main
U-Boot from SPI NOR at 1 MHz instead of 40 MHz.

This is because the SPL code passes the CONFIG_SF_DEFAULT_SPEED option
to spi_flash_probe(), and with the above commit spi_flash_probe() starts
prefering this parameter instead of the one specified in device-tree.

The proper solution here would probably be to fix the SF subsystem to
prefer the frequency specified in the device-tree, if it is present, but
I am not sure what else will be affected on other boards with such a
change. So until then we need a more simple fix.

Since the CONFIG_SF_DEFAULT_SPEED option is used by the code, put the
correct value there for Turris Omnia. Also put the correct value to
CONFIG_SF_DEFAULT_MODE and use 40 MHz when reading environment.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Pali Rohár
960d45979a arm: a37xx: pci: Fix typo in comment
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Pali Rohár
cbd7ef70bc arm: a37xx: pci: Optimize a3700_fdt_fix_pcie_regions() when fixup offset is zero
If fixup offset is zero then there is nothing to fix. All calculation in
this case just increase addresses by value zero which results in identity.
So in this case skip whole fixup re-calculation as it is not needed.

This is just an optimization for special case when fix_offset is zero which
skips code path which does only identity operations (meaning nothing). No
functional changes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Pali Rohár
a831495091 arm: a37xx: pci: Extend validation for PCIe resources and oubound windows
Remapped address of PCIe outbound window may have set only bits from the
mask. Add additional check that remapped address which is calculated from
PCIe bus address specified in DTS file is valid.

Remove also useless clearing of low 16 bits in win_mask. As win_size is
power of two and is at least 0x10000 it means that it always has zero low
16 bits.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-15 10:53:05 +02:00
Tom Rini
c11f5abce8 Merge branch '2021-07-14-build-and-host-updates'
- Resync Kbuild with the v4.20 Linux Kernel release
- Update checkpatch.pl
- Assorted other tooling updates
2021-07-14 20:10:34 -04:00
Tom Rini
963fde3155 scripts/get_default_envs.sh: Update for thin archive support
This script was broken by the change to default archives for linking.
This is due to objcopy specifically disallowing copying of thin
archives.  To fix this and re-support external users of this script,
switch to using the same logic the u-boot-initial-env make target uses
to dump the section from the object file.

Reported-by: Jan Kiszka <jan.kiszka@web.de>
Fixes: 958f2e57ef ("build: use thin archives instead of incremental linking")
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-14 16:57:35 -04:00