Commit graph

1795 commits

Author SHA1 Message Date
Tom Rini
44fb0d6c9f Xilinx/FPGA changes for v2020.01
FPGA:
 - Enable fpga loading on Versal
 - Minor fix
 
 Microblaze:
 - Fix LMB configurations to support initrds
 - Some other cleanups
 
 Zynq:
 - Minor config/dt changes
 - Add distro boot support for usb1 and mmc1
 - Remove Xilinx private boot commands and use only distro boot
 
 ZynqMP:
 - Kconfig cleanups, defconfig updates
 - Update some dt files
 - Add firmware driver for talking to PMUFW
 - Extend distro boot support for jtag
 - Add new IDs
 - Add system controller configurations
 - Convert code to talk firmware via mailbox or SMCs
 
 Versal:
 - Add board_late_init()
 - Add run time DT memory setup
 - Add DFU support
 - Extend distro boot support for jtag and dfu
 - Add clock driver
 - Tune mini configurations
 
 Xilinx:
 - Improve documentation (boot scripts, dt binding)
 - Enable run time initrd_high calculation
 - Define default SYS_PROMPT
 - Add zynq/zynqmp virtual defconfig
 
 Drivers:
 - Add Xilinx mailbox driver for talking to firmware
 - Clean zynq_gem for Versal
 - Move ZYNQ_HISPD_BROKEN to Kconfig
 - Wire genphy_init() in phy.c
 - Add Xilinx gii2rgmii bridge
 - Cleanup zynq_sdhci
 - dwc3 fix
 - zynq_gpio fix
 - axi_emac fix
 
 Others:
 - apalis-tk1 - clean config file
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXZ2mcwAKCRDKSWXLKUoM
 IT/KAJ4tL49YwINqCVGd7gafWvdfC4htygCcCgr9gLnJ+LjDQkxWT/r6faIcL00=
 =OnMk
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01

FPGA:
- Enable fpga loading on Versal
- Minor fix

Microblaze:
- Fix LMB configurations to support initrds
- Some other cleanups

Zynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro boot

ZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCs

Versal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurations

Xilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfig

Drivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fix

Others:
- apalis-tk1 - clean config file
2019-10-09 16:22:03 -04:00
Tom Rini
eaa0bde051 u-boot-imx-20191009
-------------------
 
 Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532
 
 - MX6UL / ULZ
 - Toradex board
 - Allow to set OCRAM for MX6Q/D
 - MX7ULP
 - MX8: (container image, imx8mq_mek), SCU API
 - fix several board booting from SD/EMMC (cubox-i for example)
 - pico boards
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl2dlTAPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3yfgL/1b4pKCwxswK42XkPpdHN1u/v2W/PVDanl/H
 EYxlluHVFH23bLTjLvrrgQjAnZD1VQhxWq3bwCMoJ8vb9tYQ3d9vq7XADQ0WVQV+
 EfhE33fVRPRT3rEdhDKWm+y1mL8YPvYEBnr9li7qU9n1VxiwONPXxMXMqoo9/lbM
 b6lJaG5KkuK8Ofx3cYFVQeAEdsFYIJ2aXtTqsqrV9o2sjruOuG3Ux+6Ov+9O0crY
 q8MXvW6kwWkVVNriVV7Yal0pomPZfMTqft007En9Mv2FtXqMeCWZ4Xh2LtRylR7n
 ruIbo94jkPuwuZ0p/6SeiyopoG/hU/skrkJv1s8W70DOsyaunP2BsveYXEjMV2Rb
 DomotcJit9Ws6P7rOP1oI8OvxSxVN8n6mo23UviZd8MjNAmOm49BtSxVGGB+pwmr
 ufGFG4MGQ5VpCxmzh6KrJCLXpI/mhKrkBkZy58cUbus7aPv3es/jBmmtGlU3m6ka
 NlEzHOX1hpJV/lhLvxjqRhVxuXvXOA==
 =+e3p
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191009
-------------------

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532

- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards

[trini: display5 merged manually]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-10-09 11:44:45 -04:00
Tom Rini
efea5a34bb Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
2019-10-08 18:45:26 -04:00
Lukasz Majewski
cf31914cf2 mmc: Replace printf with debug call for timeouts in the i.MX28 mxs driver
This change replaces printf() with debug() for the notification about
commands timeouts.

This is done on purpose (also other drivers use such approach - dw_mmc.c,
mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one
is using sd card or eMMC device.
In such situation timeout is a some kind of a "normal" behavior and there
shall not be any output to the console.

There is no impact on boot time for boards using this driver (even in SPL)
when two extra timeouts are returned (no SD card present, only eMMC
available).

Boot time tested with grabserial:
sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*"

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
6116f4c56f mmc: Convert mxsmmc eMMC driver for i.MX2{38} to DM/DTS
This patch converts the mxsmmc driver to support DM/DTS.

Moreover, it is also possible to use it in early SPL with
SPL_OF_PLATDATA enabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Siva Durga Prasad Paladugu
c95b19acac mmc: zynq_sdhci: Remove check for DM_MMC config
The zynq_sdhci drivers depends on DM_MMC in Kconfig so no need to check for
DM_MMC in the driver so this patch removes it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
d882f0847c mmc: sdhci: Move ZYNQ_HISPD_BROKEN to Kconfig
This patch moves CONFIG_ZYNQ_HISPD_BROKEN to Kconfig

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Sandeep Sheriker Mallikarjun
f5663740cb mmc: atmel_sdhci: Add sam9x60-sdhci compatibility string
Add new compatibility string for matching sam9x60 product.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
2019-10-08 09:16:11 +03:00
Simon Glass
27084c03d3 spl: Allow tiny printf() to be controlled in SPL and TPL
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.

Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Simon Glass
5abd58f0de sandbox: mmc: Fix up MMC emulator for valgrind
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:39 +08:00
Yinbo Zhu
6f883e501b mmc: fsl_esdhc: Add emmc hs200 support
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a.
This increases eMMC performance.
Tuning procedure is currently not supported.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:05:38 +05:30
Yinbo Zhu
29009a507c mmc: Kconfig: Add FSL_ESDHC_USE_PERIPHERAL_CLK option
NXP fsl_esdhc controller supports two reference clocks:
platform clock and peripheral clock
Peripheral clock can provide higher clock frequency
which is required to be used for tuning of SD UHS mode
and eMMC HS200/HS400 modes.

Peripheral clock is enabled by default by defining config
option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes
are supported.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12 14:02:10 +05:30
Tom Rini
40e362a9ab Merge tag 'mmc-9-6-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Bug fixes to mmc_spi
Add Aspeed SD driver
Fix dw_mmc timeout calculation
Fix timeout values passed to mmc_wait_dat0
sdhci dt caps/mask update

[trini: Fix evb-ast2500_defconfig CONFIG_MMC line]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-09-08 21:15:13 -04:00
Tom Rini
ba83753289 - fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
 - increase kernel image size from 8 MB to 64 MB on arm64
 - add support for RPi4
 - add prefixes for raspberry pi related stuff to git-mailrc
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEiUuSfQSYnG8EMsBltDliWyzx00MFAl1yhwYSHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJELQ5Ylss8dNDNE8QAIzrHZ0RYg6eMCBFzAOyFu+daxUqB1vh
 GR3Kq2ku5+cwmWDRhZjj5Y8ualFqm5/IVvIbYLpV8r5ltnHJOsLCUiNVFsyod3uY
 Np3TtTH6B1QkZAJhz+kqHUHlrNlys/+7vEv1gHdSjZ+fM3OTB+NOzA6cjPMPl1lD
 fGQBEeoddMVjA7UDyoEORrwlQTy7PK82FK5xge4S8nmTrCwGkqkapg24haQwabSd
 QvNjXte1r3g/fsQZ+tFRIZEqOrBpdqXt1sEjrDe8ICjUeRIaOs/3lJxgjk2H1ia6
 x9O7u3OJNgmjs7Y5idi5pXBNiEMKFJCInAecPg6vKkaw/CAQgoQN+8MP5jjE4Cvr
 5oN6vkbScSZ8TeSYgb9NoGZ2/YxqJv67U2+4xSLn9eWPflwy3iVIOaM8R1cOEiHy
 On9tE1JMkIEQ6DClyXlERovTnAUkfFh9Wac8UbTxqHEhcBtGzRkPSYkCRXBR6mL1
 GNh3XZEFLDAczm/nzwQSgbGqKo02siKlOJbKh5PMRA/SZXVKY0BlkpI8hmj+2ra0
 V33YjmwxS+NJdRIQJoVQVgJ8eIFdioJ6+6G3oV7btGlgbA1sJajHtm3ZZ5+080+I
 fbiy1ibUjnrWcVmPWEtY3pr6ZzcL52N8Nzj7c02yej2PS/VL2ewYj7vjmUhFOVYv
 uHKtATRqUYCz
 =hWTf
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot

- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
2019-09-06 19:49:51 -04:00
Matthias Brugger
e0e3c7dada mmc: bcm283x: Add support for bcm2711 device in bcm2835_sdhci
The bcm2711 has two emmc controllers. The difference is the clocks
they use. Add support for the second emmc controller.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
2019-09-06 18:16:59 +02:00
Raul Benet
b1125802a5 mmc: bcm2835-host: Fix wait_transfer_complete
Function bcm_2835_wait_transfer_complete() is not waiting long enough.
The previous code was claiming to wait for ~1 seconds, but as it depends
on register reads it's time actually varies.
Some cards require wait times of up to ~56 ms to perform
the command 'saveenv' on an EXT4 partition.

Re-implement the loop exit condition to use get_timer() which allows
to specify the wait time in more reliable manner. Set the maximum wait
time to the originally intended 1 second.

Signed-off by: Raul Benet <raul.benet_at_kaptivo.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-09-06 18:16:59 +02:00
T Karthik Reddy
cd45d6f395 mmc: sdhci: Add support for dt caps & caps mask
The sdhci capabilities registers can be incorrect. The
sdhci-caps-mask and sdhci-caps dt properties specify which bits of
the registers are incorrect and what their values should be. This
patch makes the sdhci driver use those properties to correct the caps.
Also use "dev_read_u64_default" instead of "dev_read_u32_array" for
caps mask.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-09-06 10:40:13 +08:00
Bin Meng
d3302395e7 dm: mmc_spi: Fix NULL pointer dereference in mmc_spi_bind()
The mmc_spi driver's priv is not available in its bind phase(). Use
platdata instead.

Fixes: 05e35d4297 ("mmc: mmc_spi: Re-write driver using DM framework")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-09-05 15:29:29 +08:00
Kever Yang
c077c057a4 mmc: dw_mmc: fix timeout calculate method
There are two cases not been considered:
- use uint for timeout, it will overflow when size bigger than 512KB for
  it *8*1000 at the beginning, but we may use size up to 32MB; The
  'timeout' will overflow if size bigger than 51.2MB after this fix, which
  should be enough for U-Boot;
- The timeout is using clock speed for data rate, but the device may not
  have such high speed, eg. clock is 52MHz while the device write speed may
  be less than 10MB/s, and we may use up to 150MHz clock.

Fix them in this patch, the max timeout is about 6500 when size is 32MB
after fix.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-05 15:28:40 +08:00
Eddie James
7764ee2e83 mmc: Add Aspeed SD controller driver
Add support for the Aspeed SD host controller engine.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2019-09-05 15:27:31 +08:00
Sam Protsenko
6cf8a903c5 mmc: Rename timeout parameters for clarification
It's quite hard to figure out time units for various function that have
timeout parameters. This leads to possible errors when one forgets to
convert ms to us, for example. Let's rename those parameters
correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues
further.

While at it, add time units info as comments to struct mmc fields.

This commit doesn't change the behavior, only renames parameters names.
Buildman should report no changes at all.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05 15:27:31 +08:00
Sam Protsenko
116cffeca6 mmc: Fix timeout values passed to mmc_wait_dat0()
mmc_wait_dat0() expects timeout argument to be in usec units. But some
overlying functions operate on timeout in msec units. Convert timeout
from msec to usec when passing it to mmc_wait_dat0().

This fixes 'avb' commands on BeagleBoard X15, because next chain was
failing:

    get_partition() -> mmc_switch_part() -> __mmc_switch() ->
    mmc_wait_dat0()

when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0().

Fixes: bb98b8c5c0 ("mmc: During a switch, poll on dat0 if available and check the final status")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-09-05 15:27:31 +08:00
Andy Yan
701a51e1ef dm: mmc: remove unused U_BOOT_DRIVER(mmc)
When look through the code, I found this bare metal
drives is not used, so remove it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-09-05 15:27:31 +08:00
Weijie Gao
47b7fa30c4 mmc: invalidate block cache after hwpart switched successfully
eMMC device has multiple hw partitions both address from zero. However the
mmc driver lacks block cache invalidation for switch hwpart. This causes a
problem that data of current hw partition is cached before switching to
another hw partition. And the following read operation of the latter hw
partition will get wrong data when reading from the addresses that have
been cached previously.

To solve this problem, invalidate block cache after a successful
mmc_switch_part() operation.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Felix Brack <fb@ltec.ch>
2019-08-30 14:17:11 -04:00
Christophe Kerello
48ac723a6f mmc: stm32_sdmmc2: reload watchdog
This patch solves a watchdog reset issue during mmc erase command.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-08-27 11:19:23 +02:00
Patrice Chotard
2e01fcf17c mmc: sti_sdhci: Fix sdhci_setup_cfg() call.
host->mmc, host->mmc->dev and host->mmc->priv must be set
before calling sdhci_setup_cfg() to avoid hang during mmc
initialization.

Thanks to commit 3d296365e4
("mmc: sdhci: Add support for sdhci-caps-mask") which put
this issue into evidence.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-27 09:36:56 +02:00
Patrice Chotard
23441fbf2b mmc: stm32_sdmmc2: Increase SDMMC_BUSYD0END_TIMEOUT_US
Increase SDMMC_BUSYD0END_TIMEOUT_US from 1s to 2s to
avoid timeout error during blocks erase on some sdcard

Issue seen on Kingston 16GB :
  Device: STM32 SDMMC2
  Manufacturer ID: 27
  OEM: 5048
  Name: SD16G
  Bus Speed: 50000000
  Mode: SD High Speed (50MHz)
  card capabilities: widths [4, 1] modes [SD Legacy, SD High Speed (50MHz)]
  host capabilities: widths [4, 1] modes [MMC legacy, SD Legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz)]
  Rd Block Len: 512
  SD version 3.0
  High Capacity: Yes
  Capacity: 14.5 GiB
  Bus Width: 4-bit
  Erase Group Size: 512 Bytes

Issue reproduced with following command:

STM32MP> mmc erase 0 100000

MMC erase: dev # 0, block # 0, count 1048576 ... mmc erase failed
16384 blocks erased: ERROR

By setting SDMMC_BUSYD0END_TIMEOUT_US at 2 seconds and by adding
time measurement in stm32_sdmmc2_end_cmd() as shown below:

	+start = get_timer(0);
	/* Polling status register */
	ret = readl_poll_timeout(priv->base + SDMMC_STA,
				 status, status & mask,
 				 SDMMC_BUSYD0END_TIMEOUT_US);

	+printf("time = %ld ms\n", get_timer(start));

We get the following trace:

STM32MP> mmc erase 0  100000

MMC erase: dev # 0, block # 0, count 1048576 ...
time = 17 ms
time = 1 ms
time = 1025 ms
time = 54 ms
time = 56 ms
time = 1021 ms
time = 57 ms
time = 56 ms
time = 1020 ms
time = 53 ms
time = 57 ms
time = 1021 ms
time = 53 ms
time = 57 ms
time = 1313 ms
time = 54 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
time = 1036 ms
time = 54 ms
time = 56 ms
time = 1028 ms
time = 53 ms
time = 56 ms
time = 1027 ms
time = 54 ms
time = 56 ms
time = 1024 ms
time = 54 ms
time = 56 ms
time = 1020 ms
time = 54 ms
time = 57 ms
time = 1023 ms
time = 54 ms
time = 56 ms
time = 1033 ms
time = 53 ms
time = 57 ms
....
time = 53 ms
time = 57 ms
time = 1021 ms
time = 56 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
1048576 blocks erased: OK

We see that 1 second timeout is not enough, we also see one measurement
up to 1313 ms. Set the timeout to 2 second to keep a security margin.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-08-27 09:36:56 +02:00
Adam Ford
3f70bef1b8 Convert CONFIG_FSL_USDHC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_USDHC

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-23 16:42:38 -04:00
Fabien Parent
908d006ba5 mmc: mtk-sd: Add MT8183 SoC support
Add support for the MT8183 in the MediaTek MMC driver.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-08-20 12:20:32 -04:00
Manivannan Sadhasivam
122537e1f3 mmc: Add support for HI3660 SoC reusing hi6220_dw_mmc driver
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc
driver. Since HI3660 operates at different clock rate and uses fifo
mode now, let's introduce the platform data and utilize it for different
SoCs supported by this driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Trent Piepho
b78d97ea49 mmc: Move tegra loopback disable option to be under tegra
This is a configuration option specific to the tegra controller.

Doing it this way makes it show up directly under the tegra controller
option, indented one level, as "Disable external clock loopback".

The way it is now, it shows up at the end of the controller list, not
indented, as if it's some kind of generic MMC configuration option.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-08-09 10:01:34 -07:00
Tom Rini
163bc1e4da Merge tag 'mmc-8-9' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc test fix
- sdhci driver fix
2019-08-09 07:29:54 -04:00
Tom Rini
21bc1935b1 Merge tag 'u-boot-rockchip-20190809' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Add rk3399 boards Khadas Edge/-V/-Captain
- Add fully souce code support for rk3328 including TPL/DRAM init
- Enable boot from eMMC for rk3399 rock960/ficus boards
- turn on the IO supply for dw_mmc
2019-08-09 07:29:20 -04:00
Peng Fan
d569b4b0a4 mmc: tangier_sdhci: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Peng Fan
d703104507 mmc: sdhci-cadence: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-09 13:45:25 +08:00
Peng Fan
6f16cbe55b mmc: s5p: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Peng Fan
a5abe152b2 mmc: pci: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Peng Fan
6904e1b250 mmc: msm_sdhci: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Peng Fan
425d83346d mmc: bcm: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Peng Fan
7835e87322 mmc: atmel_sdhci: fix uninitialized pointer deref on probe
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-08-09 13:45:25 +08:00
Matwey V. Kornilov
3148a3c2d3 mmc: zynq_sdhci: fix uninitialized pointer deref on probe
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.

[this patch is based on commit 41a9fab8da ("mmc: mv_sdhci: fix
uninitialized pointer deref on probe") by Baruch Siach]

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu102/zc706)
2019-08-09 13:45:25 +08:00
Faiz Abbas
68b3e8b398 mmc: Select SPL_HS200_SUPPORT if SPL_HS400_SUPPORT is selected
Select SPL_HS200_SUPPORT if SPL_HS400_SUPPORT is selected as is being
done for the U-boot case.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-08-09 13:45:25 +08:00
Baruch Siach
fea3939d31 mmc: relocate code comment
The comment about init op being NULL used to be next to the NULL check
code. Commit 8ca51e51c1 ("dm: mmc: Add a way to use driver model for
MMC operations") separated the comment from the code. Put them back
together.

Fixes: 8ca51e51c1 ("dm: mmc: Add a way to use driver model for MMC operations")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 15:31:36 +08:00
Weijie Gao
caa332336d mmc: mtk-sd: add WATCHDOG_RESET() to prevent watchdog timeout
When reading large data in once (reading 512MiB is tested on MT7623), a
watchdog timeout is triggered due to watchdog not being fed.

This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will
be fed every 1024 blocks are read/written.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-07-31 15:31:36 +08:00
Baruch Siach
58d65d5082 mmc: sdhci: fix chip detect gpio property name
The standard property name for chip-detect gpio is "cd-gpios". All
in-tree DT files use only this name.

Fixes: 451931ea70 ("mmc: sdhci: Read cd-gpio from devicetree")
Cc: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-31 15:31:36 +08:00
Baruch Siach
41a9fab8da mmc: mv_sdhci: fix uninitialized pointer deref on probe
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.

Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2019-07-31 15:31:36 +08:00
Urja Rannikko
2b157019bb dw_mmc: turn on the IO supply
Fixes the microSD slot on the ASUS C201.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com<mailto:peng.fan@nxp.com>>
2019-07-31 09:07:30 +08:00
Tom Rini
75551c8bfc Merge branch '2019-07-26-ti-imports'
- Bring in the rest of the J271E platform
- Various OMAP3/AM3517, DA850 fixes
2019-07-27 19:50:52 -04:00
Tom Rini
222701e157 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- fix for fsl_qspi read timeout (Thomas)
- spi-mem read data size fix (Ye Li)
- SiFive SPI driver, mmc_spi flags (Bhargav, Anup)
- Micron spi-nor parts (Ashish)
- MT7629 spi-mem driver(Weijie)
2019-07-27 09:34:07 -04:00
Faiz Abbas
794453f91d mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions
The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.

Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:28 -04:00
Kever Yang
4dcdc5c159 rockchip: sdhci: Fix sdhci mmc driver probe abort
This patch fix mmc driver abort caused by below patch:
3d296365e4 mmc: sdhci: Add support for sdhci-caps-mask

After the patch sdhci_setup_cfg() access to host->mmc->dev,
so we have to do init before make the call to the function()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-20 23:59:44 +08:00
Anup Patel
a706029410 mmc: mmc_spi: Use SPI_XFER_BEGIN and SPI_XFER_END flags
Most DM based SPI host controller drivers use SPI_XFER_BEGIN and
SPI_XFER_END flags to enable/disable slave chip select.

This patch extends MMC SPI driver to pass SPI_XFER_BEGIN flag when
MMC command is send at start and pass SPI_XFER_END flag using a
dummy transfer (of bitlen = 0) at the end of MMC command.

Suggested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Andreas Dannenberg
70942db4dd mmc: am654_sdhci: Allow driver to probe without PDs specified
We would like to use the driver even without power domains being
specified for cases such as during early boot when the required power
domains have already gotten enabled by the SoC's boot ROM and such
explicit initialization is not needed and possible.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:54 -04:00
Faiz Abbas
f605807f3d mmc: am654_sdhci: Add a platform specific set_control_reg() callback
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
d1c0a2200a mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
ce142ff0c5 mmc: am654_sdhci: Add Support for PHY
Add support in the driver for handling phy specific registers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
a8185c50d3 mmc: sdhci: Make set_ios_post() return int
Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3966c7d006 mmc: sdhci: Make sdhci_set_clock() non static
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3d296365e4 mmc: sdhci: Add support for sdhci-caps-mask
Add Support for masking some bits in the capabilities
register of a host controller.

Also remove the redundant readl() into caps1.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
6fca7fb3a0 mmc: am654_sdhci: Remove quirks
The host controller works perfectly well without having to add any
quirks. Remove them.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Faiz Abbas
3a1a0dfc39 arm64: dts: k3: Sync sdhci0 node from kernel and change driver name
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.

Also change the name of the driver to match the compatible in kernel.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-17 11:12:08 -04:00
Tom Rini
6674dc77c2 Merge tag 'mmc-2019-7-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc spi driver model support
- drop mmc_spi command
- enhanced Strobe mmc HS400 support
- minor mmc bug/fixes and optimization
- omap hsmmc and mvbeu update
- sdhci card detect support
2019-07-15 09:42:41 -04:00
Peng Fan
356f782c6e mmc: fsl_esdhc_imx: enlarge mmc timeout
Flash system partition with fastboot will earse the partition firstly
The 600ms timeout will fail on some SD Card. Enlarge it to 5s to make
it works for most of sdcard

Cc: guoyin.chen <guoyin.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
609ba125c5 mmc: fsl_esdhc_imx: add i.MX8QM compatible
Add i.MX8QM compatible and soc data, the soc data is following Linux
i.MX SDHC driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
e9c2255267 mmc: fsl_esdhc_imx: add HS400 Enhanced strobe support
Implement set_enhanced_strobe hook for fsl_esdhc_imx,
,in esdhc_set_timing and esdhc_change_pinstate, also handle HS400_ES.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
b0155ac63c mmc: fsl_esdhc_imx: use mmc_of_parse to set host_caps
Use mmc_of_parse to set host_caps.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:09 +08:00
Peng Fan
479a8dd6dc mmc: Parse no-1-8-v DT property
Parse no-1-8-v DT

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-07-15 10:30:08 +08:00
Peng Fan
b0fc3127bd mmc: Parse HS400 Enhanced strobe DT properties
Add HS400 Enhanced strobe properties parsing support to mmc_of_parse().

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-07-15 10:30:08 +08:00
Peng Fan
44acd49248 mmc: support hs400 enhanced strobe mode
eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
 - set HS_TIMIMG (Highspeed)
 - Host change freq to <= 52Mhz
 - set the bus width to Enhanced strobe and DDR8Bit(CMD6),
   EXT_CSD[183] = 0x86 instead of 0x80
 - set HS_TIMING to 0x3 (HS400)
 - Host change freq to <= 200Mhz
 - Host select HS400 enhanced strobe complete

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:30:08 +08:00
Ye Li
8277171663 mmc: fsl_esdhc_imx: fix config check issue when building in SPL
Should use CONFIG_IS_ENABLED not IS_ENABLED for clock and regulator drivers,
CONFIG_IS_ENABLED will check the CONFIG_SPL_CLK and CONFIG_SPL_DM_REGULATOR
when building SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:30:08 +08:00
Bhargav Shah
05e35d4297 mmc: mmc_spi: Re-write driver using DM framework
This patch rewrites MMC SPI driver using U-Boot DM
framework and get it's working on SiFive Unleashed
board.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:16:49 +08:00
Anup Patel
f49ff79935 mmc: skip select_mode_and_width for MMC SPI host
The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
0538477c53 mmc: retry a few times if a partition switch failed
This operation may fail. Retry it a few times before giving up and report
a failure.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
9bc5666c8a mmc: do not change mode when accessing a boot partition
Accessing the boot partition had been error prone with HS200 and HS400 and
was disabled. The driver first switched to a lesser mode and then switched
the partition access. It was mostly due to a bad handling of the switch and
has been fixed, so let's remove this 'feature'

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
bb98b8c5c0 mmc: During a switch, poll on dat0 if available and check the final status
The switch operation can sometimes make the bus unreliable, in that case
the send_status parameter should be false to indicate not to poll using
CMD13. If polling on dat0 is possible, we should use it to detect the end
of the operation.
At the end of the operation it is safe to use CMD13 to get the status of
the card. It is important to do so because the operation may have failed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
513e00b64e mmc: When switching partition, use the timeout specified in the ext_csd
The e-MMC spec allows the e-MMC to specify a timeout for the partition
switch command. It can take up to 2550 ms. There is no lower limit to this
value in the spec, but do as the the linux driver does and force it to be
at least 300ms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
39320c537d mmc: use the generic timeout for cmd6 (SWITCH) provided in the ext_csd
Starting with rev 4.5, the eMMC can define a generic timeout for the
SWITCH command.

Following Linux Kernel code, the timeout also changed from 1000 -> 500

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
cd0b80ec9c mmc: if possible, poll the busy state using DAT0
Using the DAT0 line as a rdy/busy line is an alternative to reading the
status register of the card. It especially useful in situation where the
bus is not in a good shape, like when modes are switched.
This is also how the linux driver behaves.

Note of warning: As per the specification, while polling on DAT0 the CLK
must not turned off: "[...] Without a clock edge the Device (unless
previously disconnected by a deselect command (CMD7)) will force the DAT0
line down, forever. [...]"

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
863d10044a mmc: add mmc_poll_for_busy() and change the purpose of mmc_send_status()
mmc_send_status() is currently used to poll the card until it is ready, not
actually returning the status of the card.
Make it return the status and add another function to poll the card.

Also remove the 'extern' declaration in the mmc-private.h header to comply
with the coding standard.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
c2c22b9df3 mmc: omap_hsmmc: provide wait_dat0 even if UHS modes are not supported
This function can also be used for eMMC devices.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
c5bda37589 Revert "mmc: Add a new callback function to perform the 74 clocks cycle sequence"
This reverts commit 318a7a576b.

The last and only user of this callback had been the omap_hsmmc driver.
It is not used anymore. Removing the callback.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
db52e19ced mmc: omap_hsmmc: don't fill the send_init_stream callback
This is not required. The MMC core sends CMD0 right after the
initialization and it serves the same purpose.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Jean-Jacques Hiblot
b2ffa3320a mmc: omap_hsmmc: reset FSM for DAT and CMD lines if needed before a new command
It sometimes happen that the PSTATE register does not indicate that the
bus is ready when it really is. This usually happens after a mode switch.
In that case it makes sense to reset the FSM handling the CMD and DATA

Also reset the FSMs if the STATE register cannot be cleared. This also
sometimes happens after a mode switch.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-07-15 10:16:49 +08:00
Akio Hirayama
24b1e0c7e2 mmc: rpmb: fix response type of CMD25
The response type of CMD25 is R1 instead of R1b.

Signed-off-by: Akio Hirayama <hirayama.akio@socionext.com>
[masahiro: add log ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
da18c62b6e mmc: sdhci: Implement SDHCI card detect
Card detect function implemented for SDHCI framework.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
451931ea70 mmc: sdhci: Read cd-gpio from devicetree
This patch reads cd-gpio property from devicetree

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-15 10:16:49 +08:00
T Karthik Reddy
86a94e7b2b mmc: Read sd card detect properties from DT
This patch reads card detect properties from device tree &
added mmc capability macros in mmc.h.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-07-15 10:16:49 +08:00
Tom Rini
a9a3a37f92 - syscon: add support for power off
- stm32mp1: add op-tee config
 - stm32mp1: add specific commands: stboard and stm32key
 - add stm32 mailbox driver
 - solve many stm32 warnings when building with W=1
 - update stm32 gpio driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdKK2iAAoJEOKyvdngqpN1TvcH/jj1ujNdRKn994R3DqULzFtc
 Y0WGjAciTUuV0d9gZLxPZJwlWfqxLgbmUEBlPJQJe79gaM7kNN0PgAe6GNedFhGk
 UhRR7GgbA7wogorpRo8aLe3XYEqHtgPFkf1nSiNz/AHLBg8SB20VhWcY90Kha9lh
 IJ0GK+lSdCxiyaLBC2nswnI2PS/fl4NfC7KWvujtKZduIDIOHqh5q+39llpejyuw
 WOzL/bEa4ald6JKpxOii2KXNwD1gUDQGmPzADYcIdwzJtx9hft7DBSLC5Nr+ndBz
 72TjpbtfJ/qIurv8HeXYs9mtwnCO3WP+015fog0T0zjZ48BrT1A8C96ezwLOfz0=
 =W3ny
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
2019-07-14 09:09:49 -04:00
Ezequiel Garcia
d66fb5b1f6 mmc: Register only the first MMC device on MMC_TINY
When MMC_TINY is enabled, support for only one MMC device
is provided. Boards that register more than one device,
will just write over mmc_static keeping only the last one
registered.

This commit prevents this, keeping only the first MMC
device created. A debug warning message is added, if nothing
else, as a hint/documentation for developers.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-07-13 11:11:26 -04:00
Ezequiel Garcia
bf7c01d92b spl: Move SPL_MMC_TINY option to appear under SPL menu
The SPL_MMC_TINY implements feature-reduced MMC support
on SPL, and as such, it's more consistent and convenient
to find it as part of the SPL configuration.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
2019-07-13 11:11:26 -04:00
Patrick Delaunay
0e9fb25f71 mmc: stm32_sdmmc2: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wmissing-prototypes]
 - [-Wimplicit-fallthrough=]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:54 +02:00
Yangbo Lu
5053da2e4a mmc: fsl_esdhc_imx: drop useless code
Dropped useless code for i.MX eSDHC driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-06-23 14:18:48 +08:00
Yangbo Lu
4d8ff42e46 mmc: fsl_esdhc: drop i.MX code
Dropped i.MX code which couldn't be reused.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
2019-06-23 14:18:42 +08:00
Yangbo Lu
fa33d20749 mmc: split fsl_esdhc driver for i.MX
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.

For the two series processors, the eSDHCs are becoming more and
more different. We should have split it into two drivers, like them
(sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.

This patch is just to create a fsl_esdhc_imx driver which is a copy
of fsl_esdhc driver for i.MX processors. We will convert i.MX processors
to use fsl_esdhc_imx, and clean up the two drivers separately in the
future patches.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
2019-06-23 14:15:31 +08:00
Tom Rini
64fabed971 Merge tag 'mmc-6-19' of https://github.com/MrVan/u-boot
- Avoid HS400 mode when accessing boot partitions
2019-06-20 09:13:27 -04:00
Yangbo Lu
66fa035b55 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
u-boot is trying to make CONFIG_BLK as a hard requirement
for DM_MMC. But now it's still not.

config BLK
	bool "Support block devices"
	depends on DM
	default y if DM_MMC

When fsl_esdhc driver was reworked for DM_MMC support, DM_MMC
without CONFIG_BLK enabled wasn't considered. This patch is to
fix probe issue without CONFIG_BLK enabled.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:56 +05:30
Marek Vasut
72119aa14a mmc: Avoid HS400 mode when accessing boot partitions
U-Boot code currently only applies this restriction to HS200 mode,
extend this to HS400 mode as well.

Currently U-Boot code not support accessing boot partition in HS200/400
mode. This needs more check.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-06-19 13:53:59 +08:00
Thomas Fitzsimmons
77934fdedf dm: arm: bcmstb: Enable driver model MMC support
For bcm7445 and bcm7260, this patch enables CONFIG_DM_MMC and updates
the bcmstb SDHCI driver to use the new driver model.  This allows
removal of SDHCI configuration handling from bcmstb.c, and eliminates
a board removal compile warning.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-28 13:58:06 -04:00
Tom Rini
c18b103657 Merge branch 'master' of git://git.denx.de/u-boot-sh
- Gen3 PCIe driver + enablement on Salvator-X platforms.
- Gen3 recovery SPL used to reload ATF/OpTee/U-Boot instead of minimon.
- SDHI HS400 fixes ported from latest BSP and datasheet.
2019-05-26 20:18:20 -04:00
Yinbo Zhu
b69e1d0bc7 driver: mmc: adopt 32 bit addr in fsl_esdhc for CONFIG_PPC
PowerPC supports 32 bit address.
So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Yinbo Zhu
b512d07e8c driver: mmc: set sdhc clock in fsl_esdhc for CONFIG_PPC
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 14:22:33 +05:30
Marek Vasut
b5900a58ca mmc: tmio: sdhi: HS400 manual adjustment
Since Gen3 SDHI has an internal DS signal AC-spec violation in HS400 mode,
CRC-error may occur in read command in HS400 mode. This phoenomenon occurs
at low/high temperature.

To fix this, after completion of HS400 tuning, enable manual calibration.
However, Gen3 M3 Ver.1.2 or earlier and H3 1.x does not support HS400.
These SoC forcibly use HS200 mode by SoC attribute.

The DT adjustment of the tuning parameters is not supported until the
DT property names become clear.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Adapted from a patch by Takeshi Saito <takeshi.saito.xv@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
2019-05-21 22:15:32 +02:00
Marek Vasut
1bac2b6b41 mmc: tmio: sdhi: Minor macro cleanup
Clean up the whitespaces in macros, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
2019-05-21 22:15:32 +02:00
Lukasz Majewski
b6a0427554 Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"
This reverts commit 72a89e0da5, which
causes the imx53 HSC to hang as the eMMC is not working properly anymore.

The exact error message:
MMC write: dev # 0, block # 2, count 927 ... mmc write failed
0 blocks written: ERROR

imx53 is not using the DDR mode.

Debugging of pre_div and div generation showed that those values are
generated in a way, which is not matching the ones from working setup.

As the original patch was performing code refactoring, let's revert this
change, so all imx53 boards would work again.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-05-20 11:34:27 +08:00
Tom Rini
c9baea6d0e Merge tag 'mmc-2019-5-3' of https://github.com/MrVan/u-boot 2019-05-04 20:02:16 -04:00
Alex Kiernan
623de3f086 Convert CONFIG_SUPPORT_EMMC_BOOT to Kconfig
This converts the following to Kconfig:
   CONFIG_SUPPORT_EMMC_BOOT

As requested by Michal Simek <michal.simek@xilinx.com>, these boards
have no eMMC so CONFIG_SUPPORT_EMMC_BOOT has not been migrated:

  xilinx_zynqmp_zc1275_revB
  xilinx_zynqmp_zc1751_xm018_dc4
  xilinx_zynqmp_zc1751_xm019_dc5
  xilinx_zynqmp_zcu100_revC
  xilinx_zynqmp_zcu102_rev1_0
  xilinx_zynqmp_zcu102_revA
  xilinx_zynqmp_zcu102_revB
  xilinx_zynqmp_zcu104_revA
  xilinx_zynqmp_zcu104_revC
  xilinx_zynqmp_zcu106_revA
  xilinx_zynqmp_zcu111_revA

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-05-04 13:04:12 -04:00
Tom Rini
4862830b69 Merge git://git.denx.de/u-boot-socfpga
- Misc MMC, FPGA bridge, general SoCFPGA fixes
2019-05-03 14:23:01 -04:00
Faiz Abbas
37cb626da2 mmc: sdhci: Add Support for ADMA2
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-05-03 20:44:11 +08:00
Faiz Abbas
6d6af20571 mmc: sdhci: Move DMA handling to prepare_dma() function
In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-05-03 20:43:50 +08:00
Ye Li
da8e1f3cd4 mmc: fsl_esdhc: Fix wp_enable issue
The wp-gpios property is used for gpio, if this is set, the WP pin is muxed
to gpio function, can't be used as internal WP checking. However the codes
remain to use internal WP checking.

This patch changes to examine the "fsl,wp-controller" for enabling internal WP
checking, and "wp-gpios" for muxing to gpio.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-03 20:04:30 +08:00
Ye Li
72a89e0da5 mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue
When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the output clock rate is half of the internal clock rate.

This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-03 20:03:41 +08:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Marek Vasut
bdb5df1a06 mmc: dw_mmc: Round up descriptor end to nearest multiple of cacheline size
The driver currently calculates the end address of cache flush operation
for the DMA descriptors by adding cacheline size to the start address of
the last DMA descriptor. This is not safe, as the cacheline size may be,
in some unlikely cases, smaller than the DMA descriptor size. Replace the
addition with roundup() applied on the end address of the last DMA
descriptor to round it up to the nearest cacheline size multiple.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
2019-04-29 10:08:56 +02:00
Marek Vasut
6ad5aec419 mmc: dw_mmc: Handle return value from bounce_buffer_start()
The bounce_buffer_start() can return -ENOMEM in case memory allocation
failed. However, in that case, the bounce buffer address is the same as
the possibly unaligned input address, and the cache maintenance operations
were not applied to this address. This could cause subtle problems. Add
handling for the bounce_buffer_start() return value to prevent such a
problem from happening.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
2019-04-29 10:08:56 +02:00
Marek Vasut
4e16f0a67d mmc: dw_mmc: Calculate timeout from transfer length
The current 4-minute data transfer timeout is misleading and broken.
Instead of such a long wait, calculate the timeout duration based on
the length of the data transfer. The current formula is the transfer
length in bits, divided by a multiplication of bus frequency in Hz,
bus width, DDR mode and converted the mSec. The value is bounded from
the bottom to 1000 mSec.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
2019-04-29 10:08:56 +02:00
Pierre Bourdon
4ec9dd4071 mmc: mv_sdhci: add driver model support
The new DM implementation currently does not support the Sheeva
88SV331xV5 specific quirk present in the legacy implementation. The
legacy code is thus kept for this SoC and others not yet migrated to
DM_MMC.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26 07:35:38 +02:00
Tom Rini
c2bb9c5b9e STM32 MCUs update:
_ DT rework and alignment with DT kernel v4.20
 _ mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
 _ mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
 _ configs: update for F746/769 boards
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJcvxeXAAoJEMrHeC97M/+mkpgP/0Xi+pN81lXGEELdVARyu3o9
 g45Ap+xgARgMwtnwtDmx/7tbawieG7F7Gq/AcY+SOod4qIUfb+1LZ/7UMikzXfbG
 VsSFm1YtxTiHIldPAs+i5MU0OO8TphHpqEtI7kj6eAa3MwYYnhd4DTqI/qahexeU
 3FXnUZg6XhURj1Hp/k4lL+8aoEgQKrjPpSq6oKtbF2rUStwyWbZ2PDYbI19RCU6I
 So58wSQYt0W5CP/dbUDydKorjLirHEvj7ppiGMjwaFjSdipOblrinjLSJ2fVPosF
 EK5lG3AOdf4telYafuq2Ur6EXdGOP1HHdsRhUYBCbZchzGLbH2sGdAs2xHUEsxzV
 80+uE5grX46yAQAj2V8ogpIrP6E4PA4pwEZctsS+4tgUhz9NO7kxFooGmNUk5BkY
 ggtXRlYlmXEz+epoXL7Hr5XkHOObkPk5W/R8JiZqRNv4y3NovYbjqAwYYhPCG60k
 jzwT3BdZJDN28gBU57d60VPEhPQHzpoXc6v3rJ08uFhFms03iz7pj9gCsreF48A9
 jQPZ2nemFt4m4LBsKtihLhvb6t6EllOBkCvbYCD6zgebcjUOscJTq3/TnHrMiNBh
 6wUorR09Bn7iMqhs/rPzUUmwDSN9O78P6uBr/D1E8zA9t/mCPHJHVbUHzrB96UGI
 LA7QA1pWbuYtoVSYa09W
 =0eSL
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot

STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards
2019-04-24 12:26:39 -04:00
Fabien Parent
b5096f1b6d mmc: mtk-sd: fix configuration option check
We either need to use IS_ENABLED(CONFIG_FOO) or CONFIG_IS_ENABLED(FOO).
IS_ENABLE(FOO) will always return false.

This commit fixes the comparison by using the CONFIG_IS_ENABLED(FOO)
syntax.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-04-23 17:57:25 -04:00
Fabien Parent
a93326681d mmc: mtk-sd: add support for MT8516
Add config for handling MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23 17:57:25 -04:00
Fabien Parent
ba077e5f74 mmc: mtk-sd: add source_cg clock support
Some MediaTek SoC need an additional clock "source_cg". Enable
this new clock. We reuse the same clock name as in the kernel.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23 17:57:25 -04:00
Christophe Kerello
c406a47431 mmc: stm32_sdmmc2: Fix r1b timeout issue
On response type r1b, if DTIME is not defined or too short,
the Datatimeout and DPSM flag occurs. Like the DPSM is
activated all next data transfer will be frozen.
To avoid this freeze:
    -The driver must define a DTIME on all r1b response type.
    -DTIME of SDMMC must be defined for alls stop transmission
     (for read and write request) even if MMC_RSP_BUSY is not set.
    -If busy timeout occur, an abort request must be sent to
     reinitialize the DPSM.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
2019-04-23 15:42:28 +02:00
Patrick Delaunay
b611535238 mmc: stm32_sdmmc2: Update DT properties with v4.19 bindings
Some properties name has been updated:
  - st,dirpol becomes st,sig-dir
  - st,negedge becomes st,neg-edge
  - st,pin-ckin becomes st,use-ckin

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:42:23 +02:00
Patrice Chotard
6f41d1a17e mmc: arm_pl180_mmci: Sync compatible with kernel
Initially the compatible string was wrongly set to "st,stm32f4xx-sdio".
Use compatible string used by kernel instead and identify mmci variant
using "arm,primecell-periphid" property.

Currently, the DM part of mmci driver is only used by STM32 SoCs,
that's why the switch case gets only one entry. It will be populated
easily with new variant in the future.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:30 +02:00
Eugeniy Paltsev
15736e288e ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboards
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys
ARC devboards. It is created to switch ARC devboards to use DM_MMC.

It required information such as clocks (Bus Interface Unit clock,
Card Interface Unit clock) and SDIO bus width.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-18 09:12:38 +03:00
Faiz Abbas
d2c05f50e1 mmc: omap_hsmmc: Set 3.3V for IO voltage
Pbias voltage should match the IO voltage set for the SD card. With the
latest pbias change to 3.3V, update the capabilities and IO voltages
settings to 3.3V.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-04-12 08:05:57 -04:00
BOUGH CHEN
5cf12031a4 mmc: correct the HS400 initialization process
After the commit b9a2a0e2e9 ("mmc: Add support for downgrading
HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
which indicates that the HS200/HS400 to HS downgrade is happening.

During the HS400 initialization, first select to HS200, and config
the related clock rate, then downgrade to HS mode. So here also need
to config the downgrade value to be true for two reasons. First,
make sure in the function mmc_set_card_speed(), after switch to HS
mode, first config the clock rate, then read the EXT_CSD, avoid
receiving data of EXT_CSD in HS mode at 200MHz. Second, after issue
the MMC_CMD_SWITCH command, it need to wait a bit then switch bus
properties.

Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer
mode in this case, and USDHC will never get data transfer complete
status, cause the uboot hang.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2019-03-29 10:53:18 -04:00
Tom Rini
d32519ac8a Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various fixes for bugs found by u-boot test.py
2019-03-26 23:19:11 -04:00
Marek Vasut
c453fe3a05 mmc: tmio: Clamp SD_SECCNT to 16bit values on 16bit IP
On 16bit variants of the TMIO SD IP, the SECCNT register can only be
programmed to 16bit values, while on the 32bit and 64bit variants it
can be programmed to 32bit values. The SECCNT register indicates the
maximum number of blocks in a continuous transfer. Hence, limit the
maximum continuous transfer block count to 65535 blocks on 16bit
variants of the TMIO IP and to BIT(32)-1 blocks on 32bit and 64bit
variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-03-25 20:26:53 +01:00
Marek Vasut
f4eaa56a52 mmc: sh_mmcif: Set default MMCIF clock rate
Set MMCIF clock rate to 97.5 MHz, which is the default according
to Gen2 datasheet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-03-25 20:26:53 +01:00
Marek Vasut
7d5ccb1ae7 mmc: Align MMC_TRACE with tiny printf
The tiny printf implementation only supports %x format specifier,
it does not support %X . Since it makes little difference whether
the debug output prints hex numbers in capitals or not, change it
to %x and make the MMC_TRACE output work with tiny printf too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
2019-03-25 11:44:12 -04:00
Marek Vasut
ba41c45ec3 mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-25 16:07:41 +01:00
Marek Vasut
5d6888418c mmc: tmio: Clear BUSWIDTH bit when WMODE bit is set
According to latest specification rev.0026, when HOST_MODE bit 0
(WMODE) is not set, HOST_MODE bit 8 (BUSWIDTH) is ignored. Clear
HOST_MODE bit 8 in such case and align the code with Linux and
avoid possible unforeseen issues.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-25 16:07:41 +01:00
Tom Rini
b78a9e2212 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc Gen5 fixes
- stratix10 bugfix
- dwmmc bugfix
2019-02-18 22:12:59 -05:00
Ley Foon Tan
7997599e2d mmc: dwmmc: Poll for iDMAC TX/RX interrupt
Poll for iDMAC TX/RX interrupt before disable DMA.
This to prevent disable DMA before data is transfer
completed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-02-18 13:00:54 +01:00
Tom Rini
7a2ab3778c Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various MMC fixes
2019-02-16 17:05:51 -05:00
Marek Vasut
261445dfaf mmc: tmio: sdhi: Configure DT2FF register for HS400 mode
The DT2FF register must be configured differently for HS400 mode
and for HS200/SDR104 mode. Configure the DT2FF register according
to the recommended datasheet settings for each mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-16 18:12:17 +01:00
Marek Vasut
4c80f111c0 mmc: tmio: Configure HOST_MODE WMODE according to bus width
Set the HOST_MODE register WMODE bit according to the SDHI bus width,
that is 0 for 64bit bus and 1 for 16/32bit bus.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-16 18:12:17 +01:00
Marek Vasut
fceea99268 mmc: Downgrade SD/MMC from UHS/HS200/HS400 modes before boot
Older kernel versions or systems which do not connect eMMC reset line
properly may not be able to handle situations where either the eMMC
is left in HS200/HS400 mode or SD card in UHS modes by the bootloader
and may misbehave. Downgrade the eMMC to HS/HS52 mode and/or SD card
to non-UHS mode before booting the kernel to allow such older kernels
to work with modern U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2019-02-16 18:12:17 +01:00
Abel Vesa
d76706c89a mmc: fsl_esdhc: Fix DM_REGULATOR ifdefs for SPL builds
Since the fsl_esdhc will also be used by SPL, make the
preprocessor switches more generic to allow any kind of build.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-02-15 22:01:15 +01:00
Tom Rini
dbe70c7d4e Merge branch 'master' of git://git.denx.de/u-boot-sh
- SD/MMC fixes and ext4 memory leak fix
2019-02-10 08:11:53 -05:00
Tom Rini
151b8339cc Samsung sound patches (applied for Samsung maintainer)
Common sound support
 buildman environment support
 of-platdata documentation improvements
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlxf7igRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreYKfggApQiL0Gv6NdGAQN+zfpjKY5a2QyjKsAxa
 KLm3q8XyXIQXufMWOEPoW1iWm0iixpIFgChy8ff3m/OPDzsx99UXDTyvjitsSxtQ
 5tFu8K78nUZT6OOE3HNhhlyW/xK442oKBzGt4MUt3kUZOELsCNuftgbJUWksHuO3
 6pPrgt36E0uRGbUA4ioYCU336viJRPOOCdqb8hHViEihFj/IEv5T82RdE5y97YxG
 dT7BZxjPkBH5ZN1uD/tdxG1k6IZBagZiYoDAsYp4YqNwmVsm5sLrZ9QVSf7EcH/y
 qX8butZesiMd7xm7RROlrIImh7fb36N3zsoRiUWZDo1Al3IRkmZyVA==
 =tdut
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-10feb19' of git://git.denx.de/u-boot-dm

Samsung sound patches (applied for Samsung maintainer)
Common sound support
buildman environment support
of-platdata documentation improvements
2019-02-10 08:11:32 -05:00
Lokesh Vutla
d3de38554a mmc: omap_hsmmc: Use regulator_set_enable_if_allowed for enabling regulator
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while enabling io regulators. This way the driver doesn't see an error
when disabling an always-on regulator and when enabling is not supported.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-02-09 12:50:22 -07:00
Simon Glass
e898799ce4 samsung: mmc: Drop old MMC init code
Now that these boards use driver model we can drop the old code. At
present s5p_mmc_init() is still used by goni and smdkv310 so cannot be
removed unless we remove those boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2019-02-09 12:50:22 -07:00
Faiz Abbas
351a4aa050 mmc: omap_hsmmc: Workaround errata regarding SDR104/HS200 tuning failures (i929)
Errata i929 in certain OMAP5/DRA7XX/AM57XX silicon revisions
(SPRZ426D - November 2014 - Revised February 2018 [1]) mentions
unexpected tuning pattern errors. A small failure band may be present
in the tuning range which may be missed by the current algorithm.
Furthermore, the failure bands vary with temperature leading to
different optimum tuning values for different temperatures.

As suggested in the related Application Report (SPRACA9B - October 2017
- Revised July 2018 [2]), tuning should be done in two stages.
In stage 1, assign the optimum ratio in the maximum pass window for the
current temperature. In stage 2, if the chosen value is close to the
small failure band, move away from it in the appropriate direction.

References:
[1] http://www.ti.com/lit/pdf/sprz426
[2] http://www.ti.com/lit/pdf/SPRACA9

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-02-09 07:50:58 -05:00
Marek Vasut
6892550c4a mmc: Do not poll using CMD13 when changing timing
When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy,
do not poll for the completion status using CMD13, but rather wait 50mS.

Once the card receives the CMD6 and starts executing it, the bus is in
undefined state until both the card finishes executing the command and
until the controller switches the bus to matching timing configuration.
During this time, it is not possible to transport any commands or data
across the bus, which includes the CMD13.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-02-09 11:08:40 +01:00
Marek Vasut
cbbe69483e mmc: tmio: renesas: Add 1uS delay after DMA completion on older IPs
The internal DMAC asserts DMA transfer end bit too early on older
version of the TMIO IPs which use bit 17 for DTRAEND. Add 1uS
delay after the completion of DMA transfer and before invalidating
the cache to let the DMAC fully complete the transfer. Otherwise,
it could happen that the last few bytes of a transferred data are
not available.

A test case to trigger this behavior is the following command, ran
on the U-Boot command line, with Sandisk 16 GiB UHS-I card inserted
into SDHI slot 0 and with first partition being of type FAT:
=> while true ; do mmc rescan ; fstype mmc 0:1 ; done

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-09 11:08:40 +01:00
Marek Vasut
992bcf4f27 mmc: tmio: Make DMA transfer end bit configurable
Different versions of the SDHI core use either bit 17 or bit 20 for the
DTRAEND indication, which can differ even between SoC revisions. Make
the DTRAEND bit position part of the driver private data, so that the
probe function can set this accordingly. Set this to 20 on Socionext
SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-09 11:08:40 +01:00
Tom Rini
552452f80c Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Enable DM_MMC support
2019-01-30 12:24:32 -05:00
Tom Rini
748ad078ee For 2019.04
-----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlxQnKQPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3Mm8L/0P99AB62Pu0NbAaVI9PnqaeR9/kUIvHlaPT
 RMuUIz931/1GDnugGsEEquSMUt69lfBCKYbF4sKiWObytHfYKvB/u638gqG2IoEt
 KcnWU5dagaTOyoyPOtr8EyKxThJtG2j1uN+fA5BCZ6A6CLnEW0biJXYLwN5P/DIE
 bsn9R+XfOV/ppaFh3p65SZfzzwKh6eUQLHqEphBbbAHCPz74QSeZMHkumbKplGOk
 1cjuFi8bekFnPGDDPW8jRvUNlhRD0kTjXoBj1eF2Q1g8lUj6La8yOsq1DAeGJjd1
 ywUDi8GPNYQ7HuHNzfZETWAYspNflARnPQwMemmNSKmmu6CO8aB6lt3JZWEUrnjL
 1D8LzMrRpyq1jEA0a57qsvTc8i3KA7X3FHTszP0flhiLKgBgE+5t1w8dc0wxC7HZ
 eF9TE3tGAmVzRVZwBh8HIDuKhe+y3uGKtvxl80DF8vQQWrXHq0GSC+pmdEXk7DGU
 OGYvdvVoThglZwM4vqeKlT/+1KLPCQ==
 =dOOt
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imx

For 2019.04
2019-01-30 07:22:12 -05:00
Andre Przywara
4233698dd3 mmc: sunxi: Honour non-removable property in DT
If a board DT describes a cd-gpios property, but also marks the storage
as non-removable, we must ignore the GPIO (as Linux does).

Teach the DM_MMC part of the Allwinner MMC driver about the
non-removable DT property, to fix DM_MMC access on the SoPine and
Pine64-LTS board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2019-01-29 23:49:41 +05:30
Andre Przywara
c57572eb5a mmc: sunxi: Add DM clk and reset support
Now that we have the gate clocks and the reset gates in our new
Allwinner clock driver, let's make use of them in the MMC driver, when
DM_MMC is defined.
We treat the reset device as optional now, as the older SoCs don't
implement it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-29 23:44:03 +05:30
Jagan Teki
3c8c7da6fc mmc: sunxi: Add DM_MMC support for A80
A80 gates clock already be part of CLK framework, so just
add mod_clk offset with A80 compatible string.

Cc: Rask Ingemann Lambertsen <rask@formelder.dk>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29 23:41:57 +05:30
Jagan Teki
9e23338268 mmc: sunxi: Add DM_MMC support for H6
Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset.
Connect that with the respective compatible string.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29 23:35:18 +05:30
Jagan Teki
a1925a64d5 mmc: sunxi: Add remaining compatible strings
Add MMC compatible strings for A83T, A64, H5.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29 23:34:58 +05:30
Patrick Bruenn
791c88da31 mmc: fsl_esdhc: add compatible for fsl, imx53-esdhc
Add compatible "fsl,imx53-esdhc" to keep mmc working on i.MX53 platforms
with CONFIG_DM_MMC=y

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2019-01-28 20:55:46 +01:00
Angelo Dureghello
1f15cb8f5b drivers: esdhc: add support for ColdFire mcf5441x family
This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2019-01-26 08:13:56 -05:00
Fabien Parent
70dbbd7269 mmc: mtk-sd: fix SPL compilation when GPIO=y and SPL_GPIO=n
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not.  Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.

This commit fixes the following errors:
	* undefined reference to `dm_gpio_get_value
	* undefined reference to `gpio_request_by_name'

Signed-off-by: Fabien Parent <fparent@baylibre.com>
[trini: Move guard to fix warning in msdc_ops_get_wp()]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-26 08:13:54 -05:00
Fabien Parent
924ed344a7 mmc: mtk-sd: fix possible incomplete read ops
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.

This commit fixes the driver re-ordering the code so that we first
check for data inside the RX fifo and only after check the status
of the INT_XFER_COMPL flag.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-01-26 08:13:54 -05:00
Shawn Guo
94f139a9ce mmc: hi6220_dw_mmc: add compatible for Poplar support
It adds compatible "hisilicon,hi3798cv200-dw-mshc" for Poplar SoC
Hi3798CV200 to probe this mmc driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-01-25 12:12:57 -05:00
Michal Simek
25aed77f51 mmc: zynq: Remove unused pwrseq variable
This variable was incorrectly added by:
"mmc: zynq_sdhci: Add support for SD3.0"
(sha1: d1f4e39d58)
which had nothing to do with MMC power sequence provider.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:42 +01:00
Philipp Tomsich
2acc24fc28 Kconfig: Migrate BOUNCE_BUFFER
The bounce buffer is used by a few drivers (most of the MMC drivers)
to overcome limitations in their respective DMA implementation.

This moves the configuration to Kconfig and makes it user-selectable
(even though it will be a required feature to make those drivers
work): the expected usage is for drivers depending on this to 'select'
it unconditionally from their respective Kconfig (see follow-up
patches).

This commit includes a full migration using moveconfig.py to ensure
that each commit compiles.  To ensure bisectability we update
dependencies of various drivers to now select BOUNCE_BUFFER when needed.

[trini: Squash all patches to ensure bisectability]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
2019-01-19 09:49:26 -05:00
Tom Rini
77c07e7ed3 Add TFA boot flow for more boards
Add TFA boot defconfig for ls1088a and ls2088a.
 Add dts fixup for PCIe endpoint and root complex.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEorkTmaQ1QAtDiYw67UVZlNoLnbQFAlxCFVMACgkQ7UVZlNoL
 nbQJaA/9GQ+FpUj8AzsWmLd1JYMdjQeoltlYSicqV1oPkzjX3BsPncAYsr6cW2rm
 SMkriCw+xrlTgC8ge1dyzKxWqMovGzUFEGxpDJqIKCc16s8A/Ro+R0y8saNq1Y89
 MI2axPoaPDT4ZRCSWMzzFVv3lfdvFgGyygZljNlmiKqWp1//fE0OJD4ggE8SqgVo
 +5cMmufuhQhuFuFulQw6YwAOdrJ0eN8wb1SB9wJ8zwdwKn6Oy4CgkRGjJEjKRNoK
 Posw8FUPxQybXmsXW2vie9oomQqmI2A1ILzl1KvdRHSbW0N6P7MbAgsGH1vDPW0u
 dDAsutmkjYR7Ihq/4/5jcTdjkPd7LRJU/SSJzRSnZSD1uLDt5Z4jerQBq0BN9nMR
 peUS/nQ5LTT+rGBRevFT1I0hGNVHhArKGpumV8VRxlq7a30lUPSKhd3jOsadqVLU
 TchCZPjFIVaTrlz9NoX0Wa8bz+m5v1MygRiPkxERc8ft3cudn3rI83neeK1WVKSy
 uwSttQ+Q2uPXBvPq80fIKNToxkEBihPCbEHXZUUs3iE3r+jnRLAZ8CelAn1qK7n6
 fw1oduqOqupPVtYaLHZa6fAWj7lX0FCSge7z4oYu4ezCtoCutzUb6rgwHCpSLEA0
 OF/3fzb+Gn68GpcP23P0pPx+0UplEcmOT+f2/fUXgarUyxd5H/Y=
 =vNy2
 -----END PGP SIGNATURE-----

Merge tag 'fsl-qoriq-for-v2019.04-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for more boards

Add TFA boot defconfig for ls1088a and ls2088a.
Add dts fixup for PCIe endpoint and root complex.
2019-01-18 23:11:51 -05:00
Tom Rini
f83ef0dac8 - MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
 - MIPS: optimised SPL linker script
 - MIPS: bcm6368: fix restart flow issues
 - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
 - MIPS: mt7688: small fixes and enhancements
 - mmc: compile-out write support if disabled
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAlw/LR0ACgkQKPlOlyTy
 XBg46xAAv3/7/aZuBhTYLmPuApcjJ/STGwHKtJTZUQtij6pxqbYDQB2AVzmjEbwk
 JR9KfXgvqcJK/XU3qVmrIs4kiHIKpC+y2diBgiCY26UVRFrmeKxP6T/AqLH6wCCG
 PEv0cE3U+XX2RX8VN0cItdhOuwnkbg09ToxAqfBrfPDTvI4xEO1EB28IVYozD16B
 ucBdUFkG4hB5JFqc+Sx8pJ2iSq4SmOp+mHD4sHM2XpbuMB4UnRNkjzQPk7gLHZUo
 i8wQ6tJoDKY07u9//QE75BkND/5dm1PflCNIrvH1/aJlv32lbHHf8Mm/ZEKCcth0
 dFAhalFnhl8TF8l8MgmDmjtlE52u9GUVGBJpRfc7EX1EzLm2dVu62dxBl9r4qyXM
 jj5BZBoXFeaeuA3Zm8Oui+jbkKExiuJOAgbvb5vMzyaQYN0mQjFyMBCOQQzBqBoe
 sRh/itYb0Ie0F0B2Y96mx1UgTQ4LGWtBaWrnuCQhrIB9iwt1vHA6DWNfA5PMelDK
 6iHLVBKYsV6sU+f7Ua9krczwP1p6y9u5XzW9teM7BLO5ab2vsI5/wz78OutAKmul
 NylqF3vtZDSGKz/duvEE54e4ltux0/xv5CFV/xO/bEiScNxGu8OPVIvtaAmgRomG
 vE7m63ZoI5DaxOpuBX4Qh8xOomshu3fM+1LnZ6sjulMXpoAE1vc=
 =Mxqj
 -----END PGP SIGNATURE-----

Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips

- MIPS: mscc: various enhancements for Luton and Ocelot platforms
- MIPS: mscc: added support for Jaguar2 platform
- MIPS: optimised SPL linker script
- MIPS: bcm6368: fix restart flow issues
- MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards
- MIPS: mt7688: small fixes and enhancements
- mmc: compile-out write support if disabled
2019-01-17 19:12:55 -05:00
Yinbo Zhu
7a0425dd96 mmc: fsl_esdhc: make get_cd work well in dm_mmc_ops
This patch is to make get_cd work well when DM_MMC enabled

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2019-01-17 13:17:10 -08:00
Ezequiel Garcia
82d5464788 mmc: jz_mmc: Compile-out write support if disabled
Do not build write support, unless it's enabled.

In the SPL case, this change will typically remove
precious bytes (as write support is most often
not needed in SPL).

This is important on this platform, where the maximum
SPL size is 14 KiB.

With gcc v7.3, this change saves 144 bytes producing:

size spl/u-boot-spl
   text	   data	    bss	    dec	    hex	filename
   9240	    752	    712	  10704	   29d0	spl/u-boot-spl

To make the code easier to compile-out and more
readable, a pair of read_data/write_data helpers are created.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Ezequiel Garcia
2a4bb3d271 mmc: Use proper IS_ENABLED macro to check block support
Use CONFIG_IS_ENABLED(BLK) instead of CONFIG_BLK,
in order to fix the following build issues when
CONFIG_SPL_MMC_WRITE is selected:

drivers/mmc/mmc_write.c:69:7: error: conflicting types for 'mmc_berase'
 ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:39:7: note: previous declaration of 'mmc_berase' was here
 ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
       ^~~~~~~~~~
drivers/mmc/mmc_write.c:187:7: error: conflicting types for 'mmc_bwrite'
 ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~
In file included from drivers/mmc/mmc_write.c:15:0:
drivers/mmc/mmc_private.h:37:7: note: previous declaration of 'mmc_bwrite' was here
 ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
       ^~~~~~~~~~

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Marek Vasut
b9a2a0e2e9 mmc: Add support for downgrading HS200/HS400 to HS mode
The mmc_select_mode_and_width() function can be called while the card
is in HS200/HS400 mode and can be used to downgrade the card to lower
mode, e.g. HS. This is used for example by mmc_boot_part_access_chk()
which cannot access the card in HS200/HS400 mode and which is in turn
called by saveenv if env is in the MMC.

In such case, forcing the card clock to legacy frequency cannot work.
Instead, the card must be switched to HS mode first, from which it can
then be reprogrammed as needed.

However, this procedure needs additional code changes, since the current
implementation checks whether the card correctly switched to HS mode in
mmc_set_card_speed(). The check only expects that the card will be going
to HS mode from lower modes, not from higher modes, hence add a parameter
which indicates that the HS200/HS400 to HS downgrade is happening. This
makes the code send the switch command first, reconfigure the controller
next and finally perform the EXT_CSD readback check. The last two steps
cannot be done in reverse order as the card is already in HS mode when
the clock are being switched on the controller side.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-01-15 15:28:42 -05:00
Manivannan Sadhasivam
6240e64f92 mmc: Convert HI6220 MMC driver to driver model
Convert HiSilicon HI6220 MMC driver based on DWMMC IP to driver
model.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Enable this on poplar]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-15 15:28:10 -05:00
Fabio Estevam
29c2edb42b mmc: fsl_esdhc: Avoid infinite loop in esdhc_send_cmd_common()
The following hang is observed on a Hummingboard 2 MicroSOM
i2eX iMX6D - rev 1.3 with no eMMC populated on board:

U-Boot SPL 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)
Trying to boot from MMC1

U-Boot 2018.11+gf6206f8587 (Nov 16 2018 - 00:56:34 +0000)

CPU:   Freescale i.MX6D rev1.5 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 33C
Reset cause: POR
Board: MX6 HummingBoard2
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

No panel detected: default to HDMI
Display: HDMI (1024x768)
In:    serial
Out:   serial
Err:   serial
---> hangs

which is caused by the following infinite loop inside esdhc_send_cmd_common()

	while (!(esdhc_read32(&regs->irqstat) & flags))
		;

Instead of looping forever, provide an exit path so that a timeout
error can be propagated in the case irqstat does not report
any interrupts, which may happen when no eMMC is populated on
board.

Reported-by: Ricardo Salveti <rsalveti@rsalveti.net>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Ricardo Salveti <rsalveti@rsalveti.net>
2019-01-14 11:26:12 -05:00
Tom Rini
64abfc9b6b Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2019-01-10 09:28:28 -05:00
Jagan Teki
e8f37f4203 mmc: sunxi: Fix mmc clocks for DM_MMC
Existing clock configure code has been followed based on the
legacy MMC dt node definitions and it cannot work with recent
dts(i) sync from Linux.

So, add clock configure code for Allwinner platforms which support
DM_MMC and eventually this will drop once CLK support is in Mainline.

Fixes: 3c92cca3cd ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3")
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet
Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
2019-01-10 14:45:15 +05:30
Andre Przywara
eef05fd3ba mmc: bring back partition init for non-DM MMC drivers
Commit d0851c8937 ("blk: Call part_init() in the post_probe() method")
removed the call to part_init() in mmc.c, as this is done by the DM_MMC
framework.
However Allwinner is (still) relying on a non-DM MMC driver, so we are
now missing the implicit partition init, leading to failing MMC accesses
due to the missing partition information.

Bring the call back just for non-DM MMC driver to fix this regression.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Soeren Moch <smoch@web.de>
2019-01-09 07:13:30 -05:00
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlwrbc8PHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3oCwL/RCqesqQaLKkUQDiYQJzoa6Ia7TeSTD1HoHl
 lYXarE9FloD7lHp4Lz1elU8Y+yTtjvixKS9UJGRc0pMcJJ/CEavjK+oBOVNbEnvH
 vm/oXQfZqj60tLc2Z7RfRe1gHHCcaGiBXJePea5WhP89cUZW1YBs4TVY2AIEQeRV
 V8vcxbBprqqBWyFRgH+ORsWrmkfcYEfiMr97Y8v07RRPX/C80e98PTc16fh9o7S1
 +i8Pcs0SIMnA8PqXVgrpa4DT7OS/ZtLADG/ODpvJ25nHoKvdhlXMc8o8L5dyaO1f
 66UD0A8D3PXkXkFodZujSjtKl5ygeA/4YkEnY6PRqd2W6kZsq6R7XCu/3e3eQSwK
 GFnWQnzLkDOCKMZlxR8l3sJdhY3Ee3oAQ+EX3PEy1MvKKrGA8PSOIKHq3tVNrPYB
 tBnJP32G+2Ya0SG169ROoUMZQQXfTt+9kdqsxx5xL2Pfpt9d+YinCM8uQdhqBGPa
 COqegLaD0ZkADsodZp876u3Irbo6bw==
 =mEcH
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Peng Fan
cd357ad112 imx: rename mx8m,MX8M to imx8m,IMX8M
Rename mx8m,MX8M to imx8m,IMX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01 14:12:18 +01:00
Paul Burton
d77271393a mmc: Add JZ47xx SD/MMC controller driver
Add driver for the JZ47xx MSC controller.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Philipp Tomsich
a740ee913e lib: merge CRC16-CCITT into u-boot/crc.h
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure.  Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-08 20:18:32 -05:00
Marek Vasut
cf345760bd mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01
According to SD Specifications Part 1 Physical Layer Simplified Specification
Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and
section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the
SD CMD 6.

Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed()
while configuring the bus for selected frequency. This will make SD cards
version 1.00 and 1.01 time out and thus fail detection altogether.

Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric
Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which
is correctly detected with this patch as:

Device: sd@ee160000
Manufacturer ID: 1
OEM: 5041
Name: S008B
Bus Speed: 25000000
Mode : SD Legacy
Rd Block Len: 512
SD version 1.0
High Capacity: No
Capacity: 6.5 MiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-04 09:21:06 +01:00
Marek Vasut
50aa1d99ed mmc: tmio: sdhi: Add HS400 support
Add support for the HS400 mode to SDHI driver. This uses the up-tune
mechanism from already supported HS200 tuning.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:17 +01:00
Marek Vasut
95ead3d98d mmc: tmio: sdhi: Move tap_pos to private data
Move the tap_pos variable, which is the HS200/HS400/SDR104 calibration
offset, into private data, so it can be passed around. This is done in
preparation for the HS400 mode, which needs to adjust this value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:17 +01:00
Marek Vasut
d34bd2deda mmc: tmio: sdhi: Filter out HS400 on certain SoCs
Filter out HS400 support on SoCs where HS400 is not supported yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:17 +01:00
Marek Vasut
ed427dab2e mmc: tmio: Reorder TMIO clock handling
Reorder the tmio_sd_set_clk_rate() function such that it handles all
of the clock requiests correctly. Specifically, before this patch,
clock request with (mmc->clock == 0 && mmc->clk_disable) could leave
the clock enabled, as the function would exit on if (!mmc->clock)
condition on top and will not handle the mmc->clk_disable at all.

Rather than band-aid fixing just that particular problem, reorder
the entire function to make it easier to understand and verify that
all the cases are covered. The function has three sections now:

First, if mmc->clock != 0, we calculate divider for the SD block.
Second, if mmc->clock != 0 and SD block clock are enabled and
           current divider is not equal to the new divider, then
           stop the clock and update the divider.
Third, if mmc->clk_disable is set, disable the clock, otherwise
       enable the clock. This happens independently of divider
       update now.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:16 +01:00
Marek Vasut
59d529afdc mmc: tmio: Keep generating clock when clock are enabled
The TMIO core has a feature where it can automatically disable clock output
when the bus is not in use. While this is useful, it also interferes with
switching the bus to 1.8V and other background tasks of the SD/MMC cards,
which require clock to be enabled.

This patch respects the mmc->clk_disable and only disables the clock when
the MMC core requests it. Otherwise the clock are continuously generated
on the bus.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:16 +01:00
Marek Vasut
6f8f20f85d mmc: tmio: Do not set divider to 1 in DDR mode
The TMIO core has a quirk where divider == 1 must not be set in DDR modes.
Handle this by setting divider to 2, as suggested in the documentation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-03 12:51:16 +01:00
Marek Vasut
8ec6a04b6b mmc: tmio: Switch to clock framework
Switch the driver to using clk_get_rate()/clk_set_rate() instead of
caching the mclk frequency in it's private data. This is required on
the SDHI variant of the controller, where the upstream mclk need to
be adjusted when using UHS modes.

Platforms which do not support clock framework or do not support it
in eg. SPL default to 100 MHz clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
V2: - Fix build on certain platforms using SPL without clock framework
V3: - Turn clk_get_rate into a callback and fill it as needed on both
      renesas and socionext platforms
2018-12-03 12:51:16 +01:00
Marek Vasut
eb2acbafff mmc: Parse HS400 DT properties
Add HS400 properties parsing support to mmc_of_parse().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
2018-12-03 12:51:16 +01:00
Tom Rini
93e72ac472 Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
 - net: designware: add meson meson compatibles
 - Amlogic Meson cleanup for AXG SoC support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJb/AwoAAoJEHfc29rIyEnR2dMQANCsuWQzKASCLgUzeL/KWhQ8
 gj1YEVGbS0meQ35hNo0hL6qfN4VkjazawyWnb40HVVADBjil42QuxN9rncovg69Q
 ZvPEo4XYNCkDzOU3UmoR2rjxxGICVFY6GCOuNbqzvB2x4gWJmoUeByqewKW2g2Zp
 jyjbzYvJ+r8wLtUFbdqaGvsHHC8hiIkjyeaqdXUc6NHJrGYasRuOsCO92bEioYC1
 XPh76c2ABAnbzJy7GArdlBbDOQrQxoEskVeP47ZjiPywXxGCkgHaRSXaUKzpz30G
 8MrA5AciL6pmurmsM0APlgvJwL7qaX1P6NxiJ+12prWWfAk1ZC2/MEKVZY+gO/CF
 vUAyzhus1oJ5JjccCngy/1ftkIReueSbUrzGYFvqhihs9g4QyRpi7F5MDKX0MvP2
 uk+XXStXs+rOZ2YdMFlV8l6G12TijcViZVmVHdh8qdl4t8WFlv7gENVUM+0mhyu2
 x5OsoYz5w2h9hCh/CB3oIZfyJBe5VZVHZ2fWIRZJ72J7toUGMewlKYQq2LOv7A9q
 w6vRGnza3fSPUZgYenznohaeo9vXG/WX7cNSPQiNBoiGeC+Y2ko5NHe2MIEnUD4c
 amp21KA6rWnWeHHvDbwo5DJ+NhCd6uMgkiZDLCuiTtns1/a03l0V6kgOvQLIBjhK
 KxBWBn6+rDPq1wJxhxab
 =Oo1g
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic

Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
- net: designware: add meson meson compatibles
- Amlogic Meson cleanup for AXG SoC support
2018-11-29 15:16:58 -05:00
Weijie Gao
d24b693959 mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC
This patch adds MT7623 host controller driver for accessing SD/MMC.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28 23:04:54 -05:00
Neil Armstrong
3e3f701059 mmc: meson-gx: Add AXG compatible
Add the compatible string for the upcoming Amlogic AXG SoC family.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:39:57 +01:00
Vasily Khoruzhick
0e21a2ffb3 sunxi-mmc: use new mode on both controllers on A64
Using new mode improves stability of eMMC and SD cards. Without
it SPL fails to load u-boot from SD on Pinebook.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-22 13:20:16 +05:30
Vasily Khoruzhick
629d267a97 sunxi-mmc: don't double clock for new mode unconditionally
Comment in Linux driver says that clock needs to be doubled only
if we use DDR modes, moreover divider has to be set accordingly.

U-boot driver doesn't declare support for any DDR modes and doesn't
set internal clock divider in CLKCR, so it doubles clock
unconditionally when new mode is used.

Some cards can't handle that and as result SPL fails to load u-boot.

Fixes: de9b1771c3 ("mmc: sunxi: Support new mode")
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
2018-11-22 13:19:42 +05:30
Vasily Khoruzhick
2a8882ecef sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option
Allwinner A64 has new mode but doesn't have a mode switch in CCM,
and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails
if MMC_SUNXI_HAS_NEW_MODE is enabled

Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage
of CCM_MMC_CTRL_MODE_SEL_NEW

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
2018-11-22 13:19:19 +05:30
Tom Rini
1d6edcbfed - virtio implementation and supporting patches
- DM_FLAG_PRE_RELOC fixes
 - regmap improvements
 - minor buildman and sandbox things
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlvsxt8RHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIrebPtQgAxR8bKdTNODUuVrw5OUIl40ziKQvNIlG5
 uiVsQLDI7Cd9D3Yls8yNffXqkNcQj+0/MJa38UZsm32c/uR4PU0zyFxpz4mwgyXk
 ZMrJ15AEAxf4IOHjbh52sNgR2mw+PeP9A3NO5LnZAMd/rnRF2MgBTy28FvjsBlNn
 z4OUjUpNv4ePND0QQ1EoGPlYotYPASEw8iK1pc5L+Rwq/ponAnNqegKIxQtiMugY
 kLtuFe0JJ704T20UkwYvI8LsnuB50ANRLLMyy5JLy1UtCpS24cc86ml49IKk3pqb
 v4GbnMI67s7S+Imzm4A7Mg8fgGnkkpLqacI3gnlpbIPkLrqRM2C20g==
 =RORj
 -----END PGP SIGNATURE-----

Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dm

- virtio implementation and supporting patches
- DM_FLAG_PRE_RELOC fixes
- regmap improvements
- minor buildman and sandbox things
2018-11-16 08:37:50 -05:00
Tom Rini
6f44333018 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-11-14 18:25:34 -05:00
Bin Meng
223b10ca7a mmc: omap: Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be
bound before relocation. However due to a bug in the DM core,
the flag only takes effect when devices are statically declared
via U_BOOT_DEVICE(). This bug has been fixed recently by commit
"dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in
lists_bind_fdt()", but with the fix, it has a side effect that
all existing drivers that declared DM_FLAG_PRE_RELOC flag will
be bound before relocation now. This may expose potential boot
failure on some boards due to insufficient memory during the
pre-relocation stage.

To mitigate this potential impact, the following changes are
implemented:

- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver
  only supports configuration from device tree (OF_CONTROL)
- Keep DM_FLAG_PRE_RELOC flag in the driver only if the device
  is statically declared via U_BOOT_DEVICE()
- Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for
  drivers that support both statically declared devices and
  configuration from device tree

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:28 -08:00
Bin Meng
d0851c8937 blk: Call part_init() in the post_probe() method
part_init() is currently called in every DM BLK driver, either
in its bind() or probe() method. However we can use the BLK
uclass driver's post_probe() method to do it automatically.

Update all DM BLK drivers to adopt this change.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Vasily Khoruzhick
20940ef2a3 mmc: sunxi: add support for automatic delay calibration
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.

Fixes eMMC instability on Pinebook

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 22:07:39 +05:30
Marek Vasut
26cc40d8c4 mmc: dw_mmc: Add RCRC handling
This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-10 08:16:30 -05:00
Marek Vasut
a376dde1de mmc: tmio: sdhi: Merge DTCNTL access into single register write
It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:07:04 +01:00
Marek Vasut
2fc10754d1 mmc: tmio: sdhi: Implement waiting for DAT0 line state
When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.

This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:45 +01:00
Marek Vasut
dc1488f1d2 mmc: tmio: sdhi: Clear HS400 settings when resetting SCC
Make sure to clear HS400 configuration when resetting the SCC block.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:45 +01:00
Marek Vasut
52e1796883 mmc: tmio: sdhi: Touch SCC only when UHS capable
Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:44 +01:00
Marek Vasut
c83da2ebc0 mmc: tmio: Preinitialize regulator to 3.3V
Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
8171f99e7d mmc: tmio: Configure clock before any other IOS
Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
33633ebb1c mmc: tmio: Silence transfer errors when tuning
In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.

This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
b22c8d0de4 mmc: tmio: Improve error handling
Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
645a575aeb mmc: tmio: Simplify pinmux handling
The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.

Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Tom Rini
cf033e04da Merged imx8 architecture, fix build for imx8 + warnings
-----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAlvRk0gPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3IuAL/0jfCqEIzKbPXIz81zJ+43ZNPsyu4LluUFsP
 2s5+yKN4zPnxDaHmVyxKynREqCNCcbfz7biStEPRzIjQYPBWUWrqz1yceqvOTqWQ
 eh51ItNeow28IlnVEr40e5cNL28KPsAdO8Tx6yNiXdPndPOgm3DuFlT+Xbnv2/+P
 X9GYBoCD7EQ3aUJBDUKcN/AFSAl8YCQ43FKhowM18/ExeURiKk8YDRXVFgTDDd4J
 HIlzUbyeIG24xfmxc0MsUMEufMjqQE7k/tMfFvQJiwLBLkzuO+1WmbPlWd7XHqco
 t68mheBcm8m2G/CZJoxCy8ymUi5PKDJBhw3qQz646h+JiXP1lg7Yw8hf4nREV56k
 v/bMiDU1exIflI9Qf8CibxRAYv3bjKJD6p/uua2CIvsLO4emLPbi7DHFBdaQq+WB
 r32O0Xc6LiRBIhr/qeL/5HmxFT2o4lo+O9ybo10uhK8RA1LTPlQ0UNMwmSPLl4zR
 7e5YwnRCcHV492+/Fn31LWXUUVVxVw==
 =kkpS
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings
2018-10-25 10:16:21 -04:00
Peng Fan
3cb1450380 mmc: fsl_esdhc: add uclass clk support
When CONIFG_CLK is enabled, use uclass clk api to handle
the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-10-22 13:00:09 +02:00
Ye Li
d423c93b66 fsl_esdhc: Update usdhc driver to support i.MX8
Add CONFIG_ARCH_IMX8 to use the 64bits support in usdhc driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-10-22 13:00:09 +02:00
Michal Simek
ec48b6c991 arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16 16:53:21 +02:00
Marek Vasut
beced53a74 mmc: tmio: Limit DMA to 32bit on R-Car Gen3
The internal DMAC on Gen3 is 32bit only, limit the DMA address
range to 32bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-10-09 17:21:44 +02:00
Marek Vasut
92bde154ec mmc: tmio: Pass full address to tmio_sd_addr_is_dmaable()
Pass the entire source data pointer to tmio_sd_addr_is_dmaable()
so we don't have to apply casts throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-10-09 17:21:43 +02:00
Jens Wiklander
4853ad3e13 mmc: rpmb: add mmc_rpmb_route_frames()
Adds mmc_rpmb_route_frames() to route RPMB data frames from/to an
external entity.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-10-07 10:47:38 -04:00
Heiko Stuebner
26a52f3473 rockchip: dwmmc: add rk2928-dw-mshc compatible
The rk3188 works nicely with the rockchip mmc driver, so we just need
to add the different compatible for it - as used in the Linux kernel.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:09 +02:00
Heiko Stuebner
05fa06b960 mmc: dw_mmc: check fifo status with a timeout in fifo mode
While trying to enable the dw_mmc on rk3188 I managed to confuse
and hang the dw_mmc controller into not delivering further data.
The fifo state never became ready and the driver was iterating in
the while loop reading 0-byte packets forever.

So inspired by how other implementations handle this, check the fifo-
state beforhand and add a timeout to catch any glaring fifo issues
without hanging uboot altogether.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:09 +02:00
Adam Ford
f4df405f0e mmc: omap_mmc: Remove invert references
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this.  This
patch removes the support for 'invert' from the MMC driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 08:06:56 -04:00
Adam Ford
03190a7888 mmc: omap_hsmmc: Fix pbias for omap3_logic to enable CD pin
The MMC card detect pin is connected to gpio127 on omap3_logic.
When setting up the pbias register for MMC, let's also enable
gpio_127 for the card detect.  As part of the package deal,
gpio_126 and gpio_129 are also enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-25 21:49:18 -04:00
Adam Ford
04355de71d MMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL
When used with a device tree, this will extract the card detect
and write protect pins from the device tree and configure them
accordingly.  This assumes the GPIO_ACTIVE_LOW/HIGH is supported
by da8xx_gpio.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:49:02 -04:00
Adam Ford
df6565c36c MMC: Enable DM_MMC for Davinci
With CONFIG_BLK becoming a requirement, the Davinci MMC driver
needs to be updated with DM_MMC support.  Since SPL is tiny and
many boards do not support DM in SPL, this retains the backwards
compatibility for those boards who need to initialize MMC manually
in SPL.

Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:40:17 -04:00
Adam Ford
307a214329 mmc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO
The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled.  In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11 21:39:11 -04:00
Tom Rini
d1e15041ab Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2018-09-11 08:50:10 -04:00
Lokesh Vutla
aaa449fb27 mmc: k3_arasan: Add sdhci driver support for K3 family SoCs
AM654 has an arasan sdhci controller and a mmc phy attached to it.
Add basic support for K3 specific arasan sdhci controller.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Masahiro Yamada
c3ab1e118f mmc: uniphier-sd: sync with Linux
Sync with the driver code and the binding recently merged in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11 20:37:18 +09:00
Peng Fan
c76382ff7f mmc: fsl_esdhc: enable HS400 feature
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-09-10 20:48:19 -04:00
Peng Fan
3dd2626f48 mmc: add HS400 support
Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-09-10 20:48:19 -04:00
Marek Vasut
65186977ee mmc: renesas-sdhi: Use priv directly
The dev_get_priv(dev) is used twice in the probe function.
Replace the second invocation with priv variable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-08-30 15:32:59 +02:00
Marek Vasut
12ea13ad43 mmc: socfpga: Add clock framework support
Add support for fetching the clock frequency both using the legacy
method in case clock framework is disabled as well as via the clock
framework if it is enabled. This allows for migration to the clock
framework on platforms which supports it while not breaking legacy
platforms. That said, the legacy method must be removed eventually.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Tom Rini
fc82e7684b Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-08-07 21:36:20 -04:00
Lukasz Majewski
0acdb2cc8a ARM: Odroid XU3: Modify exynos dw_mmc driver to support Odroid XU3 in DM MMC
This commit enables support for Exynos Designware MMC driver based on DM.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
7c350a2a0f ARM: Odroid XU3: Fix the dwmci_exynos *priv data assignment for DM_MMC (sdr_timing)
By convention for DM_MMC the host->priv is used to store struct udevice
*dev pointer.

Unfortunately, the legacy Exynos DW MMC code uses this field to
store pointer to dwmci_exynos_priv_data struct
Hence, we do need to get data in other way - namely by using container_of
when host pointer is present.
In this way the sdr_timing data is properly accessed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Lukasz Majewski
b88c1efadb ARM: dw_mmc: Exclude dwmci Exynos priv_data allocation from exynos_dwmci_get_config()
This commit prevents memory leak when this function is used with DM_MMC
as the struct dwmci_exynos_priv_data is already allocated by DM.

It is necessary for NON DM aware devices to allocate this struct first.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06 10:53:53 +09:00
Tom Rini
0cba6e906a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-08-04 19:41:30 -04:00
Patrice Chotard
fa91156165 mmc: arm_pl180_mmci: Remove cd_inverted host's struct field
As platform uses GPIOs for card detection, it's
simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH)
in the gpio flags instead of using the cd-inverted
property.

Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Patrice Chotard
43d36a0bae mmc: arm_pl180_mmci: Add missing clk_free
Add missing clk_free() call in case of failure
when enabling the clock.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03 19:53:54 -04:00
Patrice Chotard
8015093874 mmc: arm_pl180_mmci: Update to support CONFIG_BLK
Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci
to support this config.

This driver is used by STM32Fx and by Vexpress platforms.
Only STM32Fx are DM ready. No DM code is isolated and will be
removed easily when wexpress will be converted to DM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03 19:53:54 -04:00
Icenowy Zheng
42956f1b85 sunxi: add MMC support for H6
The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with
the MMC2 come with the capability to do crypto by EMCE.

Add MMC support for H6. EMCE support is not added yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30
Jon Nettleton
6c09eba507 mmc: break out get_op_cond code to its own function
This code is useful for testing the existance of devices that
do not have card detect capabilities.  This breaks out the core
functionality and leaves the actual init logic and error reporting
in mmc_start_init().

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-07-23 10:17:04 +02:00
Patrick Delaunay
7d118161bb mmc: stm32_sdmmc2: update pwron management
Correctly manage the SDMMC reset and card cycle power
to fully handle the power cycle added in the MMC uclass
and avoid issue with level-shifter with some uSDCARD.

3 states managed in driver:
  1/ reset: SDMMC disable, signal HiZ
  2/ power-cycle: SDMMC disable, signals drive to 0
  3/ power-on: SDMMC enabled

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-07-19 16:31:35 -04:00
Adam Sampson
979b239b4c dm: mmc: sunxi: Add A10/A20 compatible strings
Commit dd27918c22 ("dm: mmc: sunxi: Add support for driver model")
only added the allwinner,sun5i-a13-mmc compatible string for this
driver. The DM initialisation code here also works with (at least) A10
and A20, so add the appropriate compatible strings as per Linux 4.17's
driver.

Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC.
(A20 worked already, because sun7i-a20.dtsi specifies both the A13 and
A20 strings.)

Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2018-07-16 12:25:47 +05:30
Thomas Fitzsimmons
894c3ad27f board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-07-10 16:55:57 -04:00
Ley Foon Tan
2d4d693772 mmc: dwmmc: socfpga: Add reset ctrl to driver
Add code to reset all reset signals as in mmc DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:28:24 -04:00
Michal Simek
b6911780b5 mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()
Code around tuning_loop_counter variable expects to go below zero.
That's why this variable can't use unsigned type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:04 +02:00
Siva Durga Prasad Paladugu
1a7414f626 mmc: sdhci: Fix MMC HS200 tuning command failures
This patch fixes the mmc tuning command failures
when tuning pattern data needs to read back for
comparision against the expected bit pattern.

Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-15 08:54:04 +02:00
Tom Rini
040b2583c3 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-02 16:58:27 -04:00
Tom Rini
582d97b6d3 Xilinx changes for v2018.07 second pull
zynqmp:
 - Show reset reason
 - Remove emulation platform
 - Update pmufw version
 - Simplify mmc bootmode
 - Remove dc2 useless configuration file
 - Cleanup mini config
 - Defconfig syncup
 - zcu100, zcu104 and zcu111 dts fixes
 
 xilinx:
 - Use live-tree functions in some drivers
 - Add support for Avnet Minized and Antminer S9
 
 fpga:
 - Add secure bitstream loading support
 
 mmc:
 - Add hs200 mode support
 
 usb xhci:
 - Header fix
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlsRRy4ACgkQykllyylKDCEovgCdGWsr4XFQfDZxCEMmsg2vyJF2
 0egAnj6Td1k6yTzQPDXwCtExZJfS/vgl
 =QxUz
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.07-2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07 second pull

zynqmp:
- Show reset reason
- Remove emulation platform
- Update pmufw version
- Simplify mmc bootmode
- Remove dc2 useless configuration file
- Cleanup mini config
- Defconfig syncup
- zcu100, zcu104 and zcu111 dts fixes

xilinx:
- Use live-tree functions in some drivers
- Add support for Avnet Minized and Antminer S9

fpga:
- Add secure bitstream loading support

mmc:
- Add hs200 mode support

usb xhci:
- Header fix
2018-06-01 13:50:15 -04:00
Marek Vasut
d629152a9a mmc: renesas-sdhi: Add R8A77990 E3 compatible
Add new compatible to the Uniphier SD driver for R8A77990 E3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Siva Durga Prasad Paladugu
843337089e mmc: zynqmp: Add HS200 modes support for ZynqMP
This patch adds HS200 suuport for ZynqMP and enables
the same for ZC1751 DC1 board which has eMMC on it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Siva Durga Prasad Paladugu
434f9d454e mmc: sdhci: Update sdhci_send_command() to handle HS200
This patch updates sdhci_send_command() to handle MMC
HS200 tuning command.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
458e8d8071 mmc: zynq: Use live-tree functions
Use live-tree functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 13:50:39 +02:00
Rick Chen
cf3922dddc mmc: ftsdc010_mci: Sync compatible with DT mmc node
The compatible string of ftsdc010_mci.c is different from
the mmc driver in Linux Kernel. Modify it for consistency.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Patrice Chotard
635159a090 mmc: stm32_sdmmc2: Fix stm32_sdmmc2_start_cmd()
SDMMC_CMD_CPSMEN bit is wrongly check and set in
SDMMC_ARG register instead of SDMMC_CMD register.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:19 -04:00
Tom Rini
7049f62000 Patch queue for rpi - 2018-05-24
Some minor fixes for the Raspberry Pi:
 
   - Fix SD writes on new sdhost controller
   - Sanitize default load addresses, allowing for better payload placement
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJbBnlXAAoJECszeR4D/txghsYP/2n48vz7VwWI/gAGLvEzZl2T
 ZPVX/RKgMrWcGmEZiJVTE02OovbU9ybECOZXOAqLToQAXcGAl0OHNi+h2F/AH9+S
 WUZbv1wQeHD42Q3ivNjtNZY0U5D7rvVRL+33FmrHuBiLq1mUbq3uHBn7NTrCORX5
 byZvQXis4JeUNefIrAynrelI7uuyaQEtwcOWbEFlh9S1tnXjbJkkaleU5TQs3tpl
 yjlCrFthhi9uOW/cKoqWs0GxxNsWF9/RDapTXkLvfGOS+0noHKfeYypmDuD3q1CM
 FmicN0t459s3H5ft/ACSa/HyAuxzkP4Zqn8vDMG+MsxYLOiklwKDLzRNj1GcvmYd
 Z6UmnWPII4ZRyEC8xjyL5e7ovb/RW+9g4ZVVctP+PHJCHjIMxiAdxGQ+DjYRn2Q5
 T25HPXH1KTqxGwMI1LcEWfHaI7FoBSyTHy7CQrMvb7cuSDSg1lyTYSwdzsAmTX1J
 4++DLpTAqi2XSNNt+DIb938xKYXwbfhSCMH3Z9oTsOfxcqiWIudqbPyMwdxsOJ73
 tn6Ql2aivq9TyP5tByszQbf3Y8KoXoCtufWg8Lj2fCgsC0wAtDpEEhWI8QT2zY7q
 Rs+UX+eWRWKO5UOLqG1aAhJayoP2/12f9oTbo+Q1VmCgqG696J2UkezMmUjDNv/D
 IAXemClUO1MMY7yax8Ls
 =te7/
 -----END PGP SIGNATURE-----

Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-05-24

Some minor fixes for the Raspberry Pi:

  - Fix SD writes on new sdhost controller
  - Sanitize default load addresses, allowing for better payload placement
2018-05-24 09:54:14 -04:00
Alex Kiernan
5a7b11e65a Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig
Convert CONFIG_SUPPORT_EMMC_RPMB to Kconfig. Split the command handling
from the underlying support and expose this through CMD_MMC_RPMB.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-23 17:30:02 -04:00
Alexander Graf
79fd08f745 mmc: Unirqify bcm2835_sdhost and fix writes
The bcm2835 sdhost driver has a problem with "write multiple" commands.
It seems to boil down to the fact that the controller dislikes its FIFO
to get drained at the end of a block when a write multiple blocks command
is in flight.

The easy fix is to simply get rid of all the IRQ driven logic and make
the driver push as much data into the FIFO as it can. That way we never
drain and we never run into the problem.

Reported-by: Jan Leonhardt <jan@cyberdesigner.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-23 22:31:42 +02:00
Ramon Fried
b70fe965bb mmc: sdhci: Check that ops are defined
The check is necessary to avoid NULL pointer dereference.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-05-14 21:28:38 -04:00
Marek Vasut
62d77cea31 mmc: Improve tinification
Drop all the extra content from the MMC core, so that tiny MMC support
is really tiny, no fancy anything. That means the tiny MMC support does
only 1-bit transfers at default speed settings. Moreover, this patch
drops duplicate instance of struct mmc mmc_static, which wasted about
360 bytes. Furthermore, since MMC tiny supports only one controller
at all times, get rid of mallocating the ext csd backup and replace
it with static array. All in all, this patch saves ~4 kiB of bloat
from the MMC core, which on platforms with severe limitations can be
beneficial.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup checkpatch.pl style warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-13 07:57:32 -04:00
Siva Durga Prasad Paladugu
d1f4e39d58 mmc: zynq_sdhci: Add support for SD3.0
This patch adds support of SD3.0 for ZynqMP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 11:13:51 +02:00
Siva Durga Prasad Paladugu
b8e25ef16a mmc: sdhci: Read capabilities register1 and update host caps
This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads
for UHS capabilities inorder to support SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 10:22:26 +02:00
Siva Durga Prasad Paladugu
ca992e82e4 mmc: sdhci: Invoke platform specific tuning and delay routines
This patch adds support to invoke any platform specific tuning
and delay routines if available.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Siva Durga Prasad Paladugu
b88a7a4c56 mmc: sdhci: Handle execute tuning command in sdhci_send_command
This patch upadted sdhci_send_command to handle execute tuning
command.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Siva Durga Prasad Paladugu
2a2d7efe77 mmc: sdhci: Add support for disabling clock
This patch adds support to disable clock if clk_disable
was set and then enable or set clock if the clock was changed
or clock was disabled when clock needs to be enabled.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Vipul Kumar
36332b6e4b mmc: Changed the datatype of the variable to handle 64-bit arch
This patch changed the datatype of variable "start" from uint to ulong
to work properly on 64-bit machines as well. Also the return type of
get_timer() function is ulong.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:27 +02:00
Patrick Bruenn
55118ec90c dm: mmc: socfpga: call dwmci_probe()
On a socfpga_cyclone5 based board the SD card, was never powered up. For
other dw_mmc based SoCs dwmci_probe() is called in the platform specific
probe(). It seems this call is missing for socfpga_dw_mmc.

With this change DWMCI_PWREN is set by dmwci_init().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
72b5a0371d mmc: Kconfig: add the MMC_TRACE config in Kconfig
Add the MMC_TRACE config in Kconfig.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
d2faadb59c mmc: add the debug message in mmc_set_clock
Add the debug message for checking the mmc clock status.
It's helpful to debug the controlling clock.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Jaehoon Chung
6511718254 mmc: add the MMC_CLK_ENABLE/DISABLE macro in mmc.h
mmc_set_clock() function has the disable argument as bool type.
When mmc_set_clock is called, it might be passed to "true" or "false".
But it's too confusion whether clock is enabled or disabled with only
"true" and "false".
To prevent the confusion, replace to MMC_CLK_ENABLE/DISABLE macro from
true/false.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-05-08 13:12:33 +09:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Hannes Schmelzer
4781921630 mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is defined
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this
quirk is to tell the sdhci-driver that the IP-core doesn't have a "high-
speed-enable" bit in its registers.

With this commit we change this to the correct quirk:
SDHCI_QUIRK_BROKEN_HISPD_MODE

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Hannes Schmelzer
88a57125fa mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE
Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.

For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html

This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities

Upon this the layer above (mmc-driver) can setup the card correctly.

Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-05-02 10:57:43 +09:00
Peng Fan
0a4c2b099e mmc: fix return value check condition
sd_read_ssr returns 0, means no error.
Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-05-02 10:57:43 +09:00
Tom Rini
abeb9d7897 Merge git://git.denx.de/u-boot-sunxi 2018-04-30 06:52:32 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Philipp Tomsich
5ff8e54888 sunxi: improve throughput in the sunxi_mmc driver
Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.

This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired.  We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.

The observed speedup in testing on a A31 is greater than 10x (e.g. a
10MB write decreases from 9.302s to 0.884s).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-04-25 10:29:38 +05:30
Marek Vasut
ec360e6486 mmc: Staticize sd_select_bus_width
Staticize the function since it's only used in mmc.c .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
2018-04-23 16:07:46 -04:00
Tom Rini
3853c650e4 Merge git://git.denx.de/u-boot-uniphier 2018-04-23 12:21:20 -04:00
Masahiro Yamada
fc2d0302b6 mmc: uniphier-sd: skip clock set-up for SPL
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Masahiro Yamada
30b5d9aa9a mmc: tmio: move clk_enable() to each driver's probe function
I need to differentiate the clock handling for uniphier-sd.  Move it
to each driver's probe function from the tmio common code so that
renesas-sdhi will not be affected.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-24 00:35:34 +09:00
Heinrich Schuchardt
f6549c8541 mmc: avoid division by zero in meson_mmc_config_clock
The Odroid C2 fails to read from mmc with U-Boot v2018.03.
The change avoids a division by zero.

The fix was suggested by Jaehoon in
https://lists.denx.de/pipermail/u-boot/2018-January/318577.html

Reported-by: Vagrant Cascadian <vagrant@debian.org>
Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2018-04-23 10:49:58 -04:00
Stefan Mavrodiev
4744d81cc0 sunxi: mmc: Fix phase delays
U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where
PLL5 is used, with clock rates respectively 600MHz and 768MHz.
Thus there are different phase degree steps - 24 for the kernel and
30 for u-boot.

In the kernel driver the phase is set 90 deg for output and 120 for
sample. Dividing by 30 will result values 3 and 4. Those are the
values set in the u-boot driver.

However, the condition defining delays is wrong. MMC core driver
requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but
phase is set 30 deg for output and 120 deg for sample.

Apparently this works for most cards.
On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains
about it. Maybe there is other boards with similar problem?
So the fix is to match delays for both u-boot and kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-23 12:12:56 +05:30
Marek Vasut
f3dca4aac6 mmc: sh_mmcif: Add Kconfig entry
Add Kconfig entry for SH MMCIF driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:30 +02:00
Marek Vasut
48f54a2d74 mmc: sh_mmcif: Add DM and DT probing support
Add MMC DM and DT probing support into the SH MMCIF driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-04-21 18:33:19 +02:00
Matt Pelland
ca4e7d674e mmc: mv_sdhci: zero out sdhci_host structure
The mv_sdhci driver was not zeroing the sdhci_host structure it
allocates causing random access violations in parts of the mmc core
where the "ops" member pointers are checked and called if not NULL.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-04-17 10:39:30 +02:00
Marek Vasut
cb0b6b035a mmc: tmio: Rename Matsushita to TMIO
Synchronize the naming with Linux, call the common code TMIO.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-14 00:03:30 +02:00
Marek Vasut
cf39f3f304 mmc: renesas-sdhi: Wait after reconfiguring pins
The IP requires some time to recuperate after the IO pin
properties were changed. Add a delay to assure this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
5ee7c9dc77 mmc: matsushita-common: Add missing else
Fix minor rebase omission, the else was missing which triggered
two accesses to the register on 64bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
f23b208ebe mmc: matsushita-common: Wait for command completion
Make sure to wait for the command to complete altogether, including
the trailing 8 clock cycles. This prevents the driver for accidentally
writing the CMD register too fast before the previous command fully
completed.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
8dc9a10e49 mmc: matsushita-common: Correctly set mode in 16bit
The HOST_MODE register must be set to 0 when the IP is operated in 16bit
mode, otherwise 16bit access to the data FIFO may fail.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:12:00 +02:00
Marek Vasut
01c0151a36 mmc: matsushita-common: Special case only select registers in 16bit
There are only a few registerse used in the 16bit mode which are
32bit internally. Special-case only those in the IO accessors and
always write both halves. Any other register access is protected
from accidentally overwriting neighboring register.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
f63968ba26 mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
0e2bd5aa49 mmc: matsushita-common: Export register access functions
Export the matsu_sd_{read,write}l() common register access
functions, so that they can be used by other drivers sharing
the common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
e10422f108 mmc: matsushita-common: Properly handle pin voltage configuration
Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
58c35b17aa mmc: matsushita-common: Always check controller version
Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:59 +02:00
Marek Vasut
a7b7401c78 mmc: matsushita-common: Handle bus width 0
Handle bus width 0 as 1-bit bus to assure valid content of
MATSU_SD_OPTION register WIDTH field.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
635ae6fefa mmc: matsushita-common: Handle DMA completion flag differences
The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
78773f1467 mmc: matsushita-common: Handle Renesas div-by-1
On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
f98833dbe6 mmc: matsushita-common: Add Renesas RCar quirks
Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
147169d9c9 mmc: matsushita-common: Use mmc_of_parse()
Drop the ad-hoc DT caps parsing in favor of common framework function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:58 +02:00
Marek Vasut
7cf7ef81ed mmc: renesas-sdhi: Handle 16bit IP
The Renesas RCar Gen2 chips have a mix of 32bit and 16bit variants
of the IP. There is no DT property which allows discerning those,
so what Linux does is it checks the size of the register area and
if it is 0x100, the IP is 16bit, otherwise the IP is 32bit. Handle
the distinction the same way.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
c769e60990 mmc: uniphier: Allow passing quirks to the probe function
Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
db1266d696 mmc: uniphier: Add support for 16bit variant
Add support for 16bit mutation of the Matsushita SD IP. Since some
registers are internally 32bit, the matsu_sd_{read,write}l() has
to special-case this 16bit variant a bit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
620fd85c0b mmc: uniphier: Drop useless check
Drop useless check in matsu_sd_{read,write}q(), this is only ever
called to read the data from FIFO and only when 64bit variant of
the block is used anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:57 +02:00
Marek Vasut
12a510e23f mmc: uniphier: Factor out FIFO accessors
Add macros to generate the FIFO accessors, since the code is almost
the same with only minor differences. This is done in preparation
for adding 16bit variant of the IP.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
7dfddc099d mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
Add Kconfig entry for the Renesas SDHI variant of the controller
and split the Makefile entries accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Marek Vasut
e94cad93b7 mmc: uniphier: Split out SoC specific bits from the driver
Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-11 23:11:56 +02:00
Mario Six
07dea2e737 treewide: Migrate CONFIG_FSL_ESDHC to Kconfig
Migrate the CONFIG_FSL_ESDHC option to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-04-08 18:31:05 -04:00
Jonathan Gray
8ae1f82988 mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.

According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.

Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:

U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)

DRAM:  948 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e300000: 1
Loading Environment from FAT...

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 13:17:43 +02:00
Tom Rini
80a66a55fa Merge git://git.denx.de/u-boot-x86 2018-03-30 18:17:23 -04:00
Tom Rini
0ca0a546b1 Merge git://git.denx.de/u-boot-riscv 2018-03-30 18:16:56 -04:00
Bernhard Messerklinger
0851f344d7 x86: mmc: Fix mapping of BAR memory
Use dm_pci_map_bar function for BAR mapping. This has the advantage
of clearing BAR flags and and only accepting mapped memory.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30 16:05:08 +08:00
Rick Chen
bf9ba4dbb0 mmc: ftsdc010: Merge nds32_mmc to ftsdc010
nsd32_mmc was created to support ftsdc010 dm.
It is not necessary to separate both, so merge it
to ftsdc010.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
095c9f35d5 mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig
Convert CONFIG_FTSDC010_SDIO to Kconfig.
So CONFIG_FTSDC010_SDIO can also be
removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
cf52231a93 mmc: ftsdc010: Drop non-dm code
Only three defconfig(adp-ag101p_defconfig,
adp-ae3xx_defconfig, nx25-ae250_defconfig)
set CONFIG_FTSDC010=y. And they all also
enable CONFIG_DM_MMC. So the non-dm code
of ftsdc010 can be dropped now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-03-30 13:13:45 +08:00
Rick Chen
7459c887c5 mmc: ftsdc010: Support High-Speed mode
ftsdc010 dm driver has been disable High-Speed mode
as default to work around Andes AE3XX platform's problem,
because of it does not support High-Speed mode in
commit id 73cd56b2df.

But other platforms or SoCs maybe support this function.
So High-Speed mode can be enabled from dts with
cap-mmc-highspeed or cap-sd-highspeed property.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30 13:13:34 +08:00
Philipp Tomsich
6837c58666 rockchip: sdhci: support 8bit bus-width
The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.

This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:47:08 +02:00
Tom Rini
b75643ad0a Merge git://git.denx.de/u-boot-sunxi 2018-03-14 13:27:14 -04:00
Patrick Delaunay
167f2c90f6 mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckin
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Patrick Delaunay
a72dd8ed95 mmc: stm32: sdmmc2: add hardware flow control support
The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13 21:45:37 -04:00
Heinrich Schuchardt
8be4e61d01 mmc: sunxi: support cd-inverted
With CONFIG_DM_MMC the BananaPi does not detect SD cards.

The sunxi device trees use the cd-inverted property to indicate that
the card detect is inverted.

This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt
The property is not marked as deprecated.

A similar patch was posted by Tuomas but is in status "Changes Requested".
https://patchwork.ozlabs.org/patch/850377/

This patch is a stripped down version of his patch.

Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-13 20:12:31 +05:30
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Marek Vasut
d6eb25c2f1 mmc: uniphier-sd: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:59:37 +01:00
Vipul Kumar
3ccc207a30 mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
5dc5a53c5e mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Tom Rini
4bafceff0e Merge git://git.denx.de/u-boot-mmc 2018-02-25 22:28:59 -05:00
Jean-Jacques Hiblot
beac7d33d9 mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
27a4b3bc4c mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
c7d08d80c3 mmc: omap_hsmmc: compile out write support if not needed
This reduces the size of the binary by about 196 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
45530e3943 mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Alexander Kochetkov
76584e3398 mmc: fix off-by-one bug in mmc_startup_v4()
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23 15:57:41 +09:00
Faiz Abbas
8a856db238 mmc: Drop unnecessary case for mmc_probe()
Drop the unnecessary empty function case for mmc_probe().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23 15:56:33 +09:00
Marek Vasut
0b75cc3f13 mmc: uniphier-sd: Add compatible strings for RCar Gen2
Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-23 00:06:05 +01:00
Jaehoon Chung
1b313aa3e3 mmc: synchronize the sequence with enum bus_mode in mmc.h
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-21 18:04:25 +09:00
Alex Kiernan
4a41fec589 mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 17:00:33 +09:00
Jean-Jacques Hiblot
ace1bed327 mmc: fix bug in mmc_startup_v4()
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.

Fix this by adding the missing version in the correspondence table.

Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 16:59:33 +09:00
Jean-Jacques Hiblot
a0276f3eee mmc: Fix bug in sd_set_card_speed()
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.

This fixes a problem seen with QEmu emulating a vexpress-a15.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19 16:59:21 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
90321dce0d mmc: omap_hsmmc: allow mmc clock to be gated
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
42182c9b9c mmc: omap_hsmmc: implement send_init_stream callback
This callback is used to send the 74 clock cycles after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
3149c13ac3 mmc: omap_hsmmc: update mmc->clock with the actual bus speed
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
bcc6bd84d4 mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
33c1d77f4a mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d7482cf79 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
a4efd73773 mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
48a2f11443 mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Masahiro Yamada
d4d64889b0 mmc: use pr_* log functions
Use pr_* log functions from Linux.  They can be enabled/disabled
via CONFIG_LOGLEVEL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19 16:56:54 +09:00
Adam Ford
1811a928c6 Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options.  Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 19:09:03 -05:00
Adam Ford
99bec1aead Convert CONFIG_APBH_DMA et al to Kconfig
This converts the following to Kconfig:
   CONFIG_APBH_DMA
   CONFIG_APBH_DMA_BURST
   CONFIG_APBH_DMA_BURST8

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:11 -05:00
Peng Fan
51313b49f2 mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
 - Implement esdhc_change_pinstate to dynamically change pad settings
 - Implement esdhc_set_timing
 - Implement esdhc_set_voltage to switch voltage
 - Implement fsl_esdhc_execute_tuning to execute time process
 - Enlarge the cfg->f_max to 200MHz.
 - Parse fsl,tuning-step, fsl,tuning-start-tap and
   fsl,strobe-dll-delay-target from device tree.
 - Parse no-1-8-v property
 - Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
59d3782cda mmc: fsl_esdhc: add strobe and tuning entry
Add entries that will be used for tuning control.
The whole layout not changed, just expand reserved3[84] and
rename other reservedx in sequence.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
eec2d43795 mmc: fsl_esdhc: support i.MX8M
Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Alexander Graf
c8a73a26d6 mmc: Add bcm2835 sdhost controller
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.

This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Tom Rini
1d12a7c8cd Merge git://git.denx.de/u-boot-spi 2018-01-26 07:46:34 -05:00
Jun Nie
2f516e4aa2 mmc: Poll for broken card detection case
Poll for broken card detection case instead of return
no card detected.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24 16:12:03 +09:00
Jaehoon Chung
c0fafe64a5 mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.

Fixes: 9546eb92cb ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24 16:08:27 +09:00
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Benoît Thébaudeau
b9b4f146c9 mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.

Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22 14:17:13 +09:00
Jaehoon Chung
9546eb92cb mmc: fix the wrong disabling clock
When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Fixes: 2e7410d76a ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-22 14:15:34 +09:00
Masahiro Yamada
61f2e5ee12 mmc: sdhci: change data transfer failure into debug message
During the tuning, drivers repeat data transfer, changing timing
parameters in the controller hardware.  So, the tuning commands
(CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem
at all.

Showing "Error detected..." in normal operation just make users
upset.  This should not be shown.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
dd43e2a6bd mmc: sdhci-cadence: add HS200 support
Add HS200 timing setting and the MMC tuning callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4041bf7f8a mmc: sdhci-cadence: call mmc_of_parse()
This is needed to parse more capabilities such as mmc-hs200-1_8v.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
954a963146 mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux.  Follow the
clean-up I did in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
be165fbbf1 mmc: sdhci: do not overwrite host_caps in sdhci_setup_cfg()
This line overwrites host_cap that has been set by drivers and/or
helpers like mmc_of_parse().  Accumulate capabilities flags.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4b28f7bc93 mmc: let mmc_of_parse() fail for insane bus-width value
You must fix your DT if it specifies insane bus-width, for example,
  bus-width = <3>;

debug() is not displayed in usual configuration, so people will not
even notice weirdness.  Use dev_err() instead, then let it fail.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
c42ee367fd mmc: do not overwrite cfg->f_max if "max-frequency" if missing
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to
52MHz even if DT does not provide "max-frequency" at all.  This can
overwrite cfg->f_max that may have been set to a reasonable default.

As the DT binding says, "max-frequency" is an optional property.
Do nothing if DT does not specify it.  This is the behavior of
mmc_of_parse() in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Kishon Vijay Abraham I
29171dcfaa mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
866bb98468 mmc: omap_hsmmc: Enable Auto command (CMD12) enable
Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
f0d53e88a6 mmc: omap_hsmmc: Add support for DMA (ADMA2)
The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:17 -05:00
Jean-Jacques Hiblot
741726ae4c Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"
This reverts commit 46831c1a4c.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Peng Fan
db359efd59 mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-13 00:08:44 +09:00
Jean-Jacques Hiblot
b7a6e2c9c3 mmc: remove hc_wp_grp_size from struct mmc if not needed
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
173c06dfcc mmc: don't read the size of eMMC enhanced user data area in SPL
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
e6fa5a5461 mmc: compile out erase and write mmc commands if write operations are not enabled
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
5b2e72f327 mmc: read ssr only if MMC write support is enabled
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
d6400c3f85 mmc: add a Kconfig option to enable the support for MMC write operations
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
58a6fb7b04 mmc: reworked version lookup in mmc_startup_v4
Using a table versus a switch() structure saves a bit of space

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
baef2070a4 mmc: compile out more code if support for UHS and HS200 is not enabled
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
9b79dbd201 mmc: atmel: when sending a data command, use the provided block size
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
49f89252ed dm: mmc: sandbox: Update SD card emulation
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)

Update the SD simulator to handle those requests gracefully.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
cf17789e07 mmc: make optional the support for eMMC hardware partitioning
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f99c2efe56 mmc: make UHS and HS200 optional
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d8e3d42089 mmc: convert most of printf() to pr_err() and pr_warn()
This allows to compile out the log message by tweaking the LOGLEVEL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f7d5dffc65 mmc: don't use malloc_cache_aligned()
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.

Also make sure that the allocated buffer is freed in case of error.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1de06b9fa5 mmc: fix for old MMCs (below version 4)
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1da8eb598f mmc: all hosts support 1-bit bus width and legacy timings
Make sure that those basic capabilities are advertised by the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
00e446fa04 mmc: Fixed a problem with old sd or mmc that do not support High speed
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7abff2c3b3 dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
52d241dfba mmc: dump card and host capabilities if debug is enabled
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jaehoon Chung
ef1614acf8 mmc: meson_gx_mmc: fix the complie error
mmc_set_clock() is changed.
This patch is for fixing complie error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
9215ef5ed5 dm: mmc: Add a library function to parse generic dt binding
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
9815e3ba80 mmc: add a library function to send tuning command
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
bc1e3272ff mmc: use the right voltage level for MMC DDR and HS200 modes
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
83dc42271f mmc: Retry some MMC cmds on failure
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.

To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
01298da31d mmc: Change mode when switching to a boot partition
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00