Commit graph

4761 commits

Author SHA1 Message Date
Masahiro Yamada
11f3afeaa5 ARM: uniphier: drop ad-hoc early pin-muxing settings
As the UniPhier serial driver had already switched to Drive Model
and the pinctrl drivers are now enabled, these pin-muxing settings
are properly handled by the pinctrl drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Masahiro Yamada
b25c4ab5be ARM: dts: uniphier: prepare device trees to use pinctrl in SPL
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB
(spl/u-boot-spl.dtb).

The "soc" node (this is simple-bus node) also needs the property
to bind the pinctrl node located under it.

I am collecting this U-Boot specific hack to the bottom of board
DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI.
My goal is to sync DTSI with Linux for easier maintenance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-09-25 00:27:52 +09:00
Thierry Reding
8e1601d994 ARM: tegra114: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence"). The Tegra114 TRM doesn't contain this information, but
the programming of PLLC is the same on Tegra114 and Tegra124.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:11:31 -07:00
Thierry Reding
aba11d4476 ARM: tegra124: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence").

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:11:31 -07:00
Mirza Krak
20613c9231 ARM: tegra: Add Tegra20 SPI device nodes
Add the device tree node for the SPI controllers found on Tegra20 SOCs.

Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:23 -07:00
Thierry Reding
97c02d87f4 ARM: tegra: clk_m is the architected timer source clock
While clk_m and the oscillator run at the same frequencies on Tegra114
and Tegra124, clk_m is the proper source for the architected timer. On
more recent Tegra generations, Tegra210 and later, both the oscillator
and clk_m can run at different frequencies. clk_m will be divided down
from the oscillator.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Thierry Reding
c043c0259c ARM: tegra: Implement clk_m
On currently supported SoCs, clk_m always runs at the same frequency as
the oscillator input. However newer SoC generations such as Tegra210 no
longer have that restriction. Prepare for that by separating clk_m from
the oscillator clock and allow SoC code to override the clk_m rate.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Thierry Reding
70bcb43e7d armv8: Make COUNTER_FREQUENCY optional
Some platforms have the means to determine the counter frequency at
runtime, so give them an opportunity to do so.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
6c7dc6236a ARM: tegra: fix PLLP frequency calc on T210
AFAIK, for all PLLs on all Tegra SoCs, the primary PLL output frequency
is (input * m) / (n * p). However, PLLP's primary output (pllP_out0) on
T210 is the VCO output, and divp is not applied. pllP_out2 does have divp
applied. All other pllP_outN are divided down from pllP_out0. We only
support pllP_out0 in U-Boot at the time of writing.

Fix clock_get_rate() to handle this special case.

This corrects the returned rate for PLLP to be 408MHz rather than 204MHz.
In turn, this causes high enough dividers to be calculated for the various
peripheral clocks that feed off of PLLP. Without this, some peripherals
failed to operate correctly. For instance, one of my SD cards worked
perfectly but an older (presumably slower) card could not be read.

Note that prior to commit 722e000ccd "Tegra: PLL: use per-SoC pllinfo
table instead of PLL_DIVM/N/P, etc.", the calculated PLL frequency was
816MHz since the wrong values were being extracted from the PLLP divider
register. This caused overly large peripheral dividers to be calculated,
which while wrong, didn't cause any correctness issues; things simply ran
slower than they could.

Reported-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Axel Lin
a6b2daffde tegra: Remove tegra_spl_gpio_direction_output declaration from header file
This function is deleted by commit 2fccd2d96b
"tegra: Convert tegra GPIO driver to use driver model".

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
2573428140 ARM: tegra: Add p2371-2180 board
P2371-2180 is a P2180 CPU board married to a P2597 I/O board. The
combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB
micro-B port, Ethernet via USB3, USB3 host port, SATA, PCIe, and
two GPIO expansion headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stefan Roese
86dc8b14f9 arm: Remove unused reference to nomadik
Commit 0abdd9d0 "arm: Remove nhk8815 boards and nomadik arch" missed one
reference to this arch. Lets remove this as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2015-09-15 15:05:22 -04:00
Stefan Roese
68282f55b8 arm: Remove unused ST-Ericsson u8500 arch
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-15 15:05:21 -04:00
Tom Rini
850f788709 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2015-09-13 17:25:16 -04:00
Fabio Estevam
3a384b494c imx-common: cpu: Do not print on invalid temperature
It is not very useful to have the message below on every boot
(especially when we are using early silicon):

U-Boot 2015.10-rc2-23945-g37cf215 (Sep 08 2015 - 14:12:14 -0300)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C)CPU:   Thermal invalid data, fuse: 0x0
 - invalid sensor device

, so turn the error message into debug level.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-13 10:50:55 +02:00
Peng Fan
ada5771f09 imx: mx6 discard 'select CPU_V7' for different targets
Discard the 'select CPU_V7' from Kconfig in arch/arm/cpu/armv7/mx6
for different targets, because ARCH_MX6 selects CPU_V7.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-13 10:38:48 +02:00
Peng Fan
d9cbb264e8 imx: mx6ul: support mx6ul 9x9 evk board
This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk,
the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are:
1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC.
2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk
   supports 512MB DDR3
3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package.

This patch add the following:
1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size()
2. Introduce a macro is_mx6ul_9x9_evk using
   CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL
   part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work,
   so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with
   mx6ul_14x14_evk. And we have no way to dymaically checking this chip
   is 9x9 or 14x14.
3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations.
   POWER related configurations also effect for mx6ul_14x14_evk. But
   power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to
   do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk.
4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM
   configurations.
5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file
   according to board_rev and board_name.
6. Add TARGET_MX6UL_9X9_EVK Kconfig entry

Boot Log:
U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53)
reading u-boot.img
reading u-boot.img

U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 41C
Reset cause: POR
Board: MX6UL 9x9 EVK
I2C:   ready
DRAM:  256 MiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
Net:   FEC1
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-09-13 10:32:44 +02:00
Peng Fan
0eca9f6f0d Revert "imx: mx6: ddr correct tRFC and tXS"
This reverts commit 059323fb6a8f21637bb617919715c2427f24777c.

This commit 059323fb6a8f21637bb617919715c2427f24777c use JESD79-3E which
is not the newest spec. Should use JESD79-3F in which tRFC is 260ns for
4Gb chip.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
2015-09-13 10:26:45 +02:00
Adrian Alonso
1a8150d4b1 imx: mx7dsabresd: Add support for MX7D SABRESD board
* Add i.MX7D SABRESD target board support with enabled modules:
  UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX.

  Build target: mx7dsabresd_config

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
cd562c8d07 imx: imx7d: add imx-common cpu support for imx7d
Add imx-common cpu support for imx7d SoC
- Update reset_cause for imx7d
- Enable watchdog driver built for imx7d

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
648539c906 arm: imx-common: init: rework wdog settings for imx6/imx7
Rework imx_set_wdog_powerdown to be reused by imx6 and imx7

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
75a565f297 arm: imx-common: init: extend init_aips to support imx7
Extend init_aips to support imx7 SoC, use is_soc_type
and is_cpu_type to resolve at run time aips3 settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
c5752f73a5 imx: imx7d: Add SoC system support
Add imx7d basic SoC system support
Misc arch dependent functions for system bring up

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
7bebc4b04e imx: imx7d: clock control module support
* Add Clock control module (CCM) support
* iMX7D SoC introduces 3 main clock sysmtem abstraction for clock
  root frequency generation denominated clock slices.
  Core clock slice: hihg speed clock for ARM core
  Bus clock slice: for bus clocks
  IP clock slice: Peripheral clocks
* At system boot ROM enables PLL_ARM, PLL_DDR, PLL_SYS, PLL_ENET
  In u-boot, we have to:
  - Configure PFD3- PFD7 for freq we needed in u-boot
  - Set clock root for peripherals (ip channel)

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
b1d902a9f7 imx: imx7d: initial arch level support
* Add system arch level header files
  - imx-regs.h: iMX7D SoC system architecture registers
  - crm_regs.h: Clock control module registers
  - sys_proto.h: helper callback function for SoC setup

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
6953574188 imx: system counter driver for imx7d and mx6ul
Add system counter driver for imx7d and mx6ul
imx7 and imx6ul supports system counter timer as well as
GPT timer (arch/arm/imx-common/timer.c); The default for
imx7 is systemcounter timer.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
50a082a88c arm: imx: imx-common: init: move arch init common setup
Move common imx6 arch init setup, init.c can be extended
and reused to support imx7 SoC keeping init arch common
code.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
ab09e72866 arm: imx: common rework cache settings for imx6
Rework cache settings for imx6, move cache configuration
to imx-common/cache.c so it can be reused for newer SoC

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
1368f99346 thermal: imx_thermal: rework driver to be reused
Rework imx_thermal driver to be used across i.MX
processor that support thermal sensor

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
15c52b3ddd imx: arch-mx6: add is_soc_type helper macro
Add helper macro is_soc_type to identify iMX SoC family

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:52 +02:00
Sylvain Lemieux
89983478bd gpio: lpc32xx: fix issues with port3 gpio
The current simplify lpc32xx gpio driver implementation assume a
maximum of 32 GPIO per port; there are a total of 22 GPI, 24 GPO
and 6 GPIO to managed on port 3.

Update the driver to fix the following:
1) When requesting GPI_xx and GPO_xx on port 3 (xx is the same number)
   the second call to "gpio_request" will return -EBUSY.

2) The status of GPO_xx pin report the status of the
   corresponding GPI_xx pin when using the "gpio status" command.

3) The gpio driver may setup the direction register for the wrong
   gpio when calling "gpio_direction_input" (GPI_xx) or
   "gpio_direction_output" (GPO_xx) on port 3; the call to the
   direction is require to use the "gpio status" command.

The following change were done in the driver:
1) port3 GPI are cache in a separate 32 bits in the array.
2) port3 direction register written only for GPIO pins.
3) port3 GPO & GPIO (as output) are read using "p3_outp_state".
4) LPC32XX_GPI_P3_GRP updated to match the change.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
2015-09-11 17:15:34 -04:00
Heiko Schocher
92a3188d7d bitops: introduce BIT() definition
introduce BIT() definition, used in at91_udc gadget
driver.

Signed-off-by: Heiko Schocher <hs@denx.de>
[remove all other occurrences of BIT(x) definition]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2015-09-11 17:15:32 -04:00
Enric Balletbò i Serra
9d1b298799 board: Add Toby-Churchill SL50 board support.
Add support for Lightwriter SL50 series board, a small, robust and portable
Voice Output Communication Aids (VOCA) designed to meet the particular and
changing needs of people with speech loss resulting from a wide range of
acquired, progressive and congenital conditions.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2015-09-11 17:15:27 -04:00
Stefan Roese
da53ba0219 arm: spear: Add command to switch between 1-bit HW ECC and SW BCH4
This patch adds the "nandecc" command to switch between the SPEAr600 internal
1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND
chips with a stronger ECC than 1-bit, as on the x600. And to dynamically
switch between both ECC schemes for backwards compatibility.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-09-11 17:15:14 -04:00
Simon Glass
b9599dd857 arm: Remove tx25 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:15:12 -04:00
Simon Glass
ad4f54ea86 arm: Remove palmtreo680 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:44 -04:00
Simon Glass
1c87dd76c4 arm: Remove xaeniax board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:43 -04:00
Simon Glass
452ef83046 arm: Remove vpac270_nor_128 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:14:23 -04:00
Simon Glass
6e830dfc1a arm: Remove vl_ma2sc board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:12:57 -04:00
Simon Glass
bee2b99d06 arm: Remove vision2 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-09-11 16:05:03 -04:00
Simon Glass
b928e658f4 arm: Remove versatileab board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:01:25 -04:00
Simon Glass
0c81f37d9a arm: Remove tt01 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:52 -04:00
Simon Glass
f73db66d62 arm: Remove tk71 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:22 -04:00
Simon Glass
7650beb7ca arm: Remove scb9328 board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 15:00:03 -04:00
Simon Glass
47b87d2eed arm: Remove rd6281a board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:59:16 -04:00
Simon Glass
daf770864d arm: Remove qong board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:59:16 -04:00
Simon Glass
49d8899ba9 arm: Remove pxa255_idp, zipitz2 boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:58:48 -04:00
Simon Glass
79d19734a9 arm: Remove portuxg20, stamp9g20 boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:58:48 -04:00
Simon Glass
f6eac00aba arm: Remove polaris and trizepsiv boards
These boards have not been converted to generic board by the deadline.
Remove them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-09-11 14:58:47 -04:00
Simon Glass
8896325d73 arm: Remove palmtc board
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 14:57:41 -04:00