Commit graph

3 commits

Author SHA1 Message Date
Haiying Wang
4ca06607d6 Add ddr interleaving suppport for MPC8572DS board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.

* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
dfb49108e4 Pass dimm parameters to populate populate controller options
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.

* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:04 +02:00
Kumar Gala
129ba616b3 mpc85xx: Add support for the MPC8572DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00