Commit graph

2662 commits

Author SHA1 Message Date
Marek Vasut
8835103e24 net: eepro100: Split common parts of non-DM functions out
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
43b738350c net: eepro100: Drop bd_t pointer from read_hw_addr()
The pointer is unused, so drop it. Rename the function to start
with the eepro100_ prefix.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fb8307e52a net: eepro100: Add RX/TX rings into the private data
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
39daab2376 net: eepro100: Pass device private data into mdiobus
Instead of doing ethernet device lookup by name every time there
is an MDIO access, pass the driver private data via mdiobus priv
to the MDIO bus accessors.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
389da9743c net: eepro100: Pass device private data around
This patch replaces the various uses of struct eth_device for accessing
device private data with struct eepro100_priv, which is compatible both
with DM and non-DM operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
bd159c6185 net: eepro100: Introduce device private data
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
fa9e12102d net: eepro100: Pass PCI BDF into bus_to_phys()/phys_to_bus()
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling
that dev, we can substitute dev with udevice when DM support lands
and do minor adjustment to the macros to support both DM and non-DM
operation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
acdf5d8882 net: eepro100: Drop inline keyword
Drop the inline keyword from the static functions, the compiler has a
much better overview and can decide how to inline those functions much
better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
a6c06ec8f6 net: eepro100: Fix EE_*_CMD macros
Those macros depended on specific variable names to be declared
at their usage sites, fix this by adding an argument to those
macros and also protect the argument with braces.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
66fed7300d net: eepro100: Factor out MII registration
Pull the MII registration code into a separate function. Moreover,
properly free memory in case any of the registration or allocation
functions fail, so this fixes an existing memleak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
6c7d3f6b3f net: eepro100: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
3a15684dc6 net: eepro100: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
047a800dd6 net: eepro100: Reorder functions in the driver
Move the functions around in the driver to prepare it for DM conversion.
Drop forward declarations which are not necessary anymore. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
d47cf87db9 net: eepro100: Remove volatile misuse
Remove all the remaining use of the 'volatile' keyword, as this is
no longer required. All the accesses which might have needed this
use of 'volatile' have been repaired properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
5116aae111 net: eepro100: Add cache management
Add cache invalidation and flushes wherever the DMA descriptors are
written or read, otherwise this driver cannot work reliably on any
systems where caches are enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
95655b921b net: eepro100: Factor out tx_ring command issuing
This code is replicated in the driver thrice almost verbatim, factor
it out into a separate function and clean it up. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
46df32ef2f net: eepro100: Replace purge_tx_ring() with memset()
This function zeroes-out all the descriptors in the TX ring,
use memset() instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
81bdeea2fe net: eepro100: Use standard I/O accessors
The current eepro100 driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
f3878f5c28 net: eepro100: Fix camelcase
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
b013173079 net: eepro100: Fix remaining checkpatch issues
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl -f --fix --fix-inplace drivers/net/eepro100.c

This fixes all the remaining errors except a couple of comments which
are longer than 80 characters, all the volatile misuse and all the
camelcase, that needs a separate patch.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
614e95152d net: eepro100: Fix indented label
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
7a30873585 net: eepro100: Fix pointer location
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types POINTER_LOCATION -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
773af836da net: eepro100: Fix parenthesis alignment
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types PARENTHESIS_ALIGNMENT -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
9b12ff9911 net: eepro100: Fix braces
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types BRACES -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
db9f1818bf net: eepro100: Fix spacing
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types SPACING -f --fix --fix-inplace drivers/net/eepro100.c

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:40 +02:00
Marek Vasut
e5352c6bbe net: eepro100: Use plain debug()
Convert all the ifdef DEBUG to plain debug(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
aba283d838 net: eepro100: Clean up comments
Clean the comments up to they trigger fewer checkpatch warnings,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Marek Vasut
0a5be6c5fd net: eepro100: Remove EEPRO100_SROM_WRITE
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-06-18 19:34:39 +02:00
Tom Rini
83fdb43882 Merge tag 'ti-v2020.10-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- DM conversion for OMAP4, OMAP5 platforms.
- Other minor fixes for Nokia RX51, am33, am57, am654.
2020-06-18 10:07:49 -04:00
Tom Rini
eab48865f9 net: cpsw: Add __maybe_unused to generated inlines
We generate a number of helper inline functions to make accesses easier.
However not all permutations of each function will be used and clang
will warn about unused ones.  Decorate all of them with __maybe_unused
because of this.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-06-16 17:00:02 +05:30
Marek Vasut
46c8b18734 net: rtl8139: Add DM support
Add support for driver model to the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
d8afb8b28e net: rtl8139: Read HW address from EEPROM only on probe
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
2df3a51510 net: rtl8139: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
6a4a5c194d net: rtl8139: Split out common and non-DM functions
Split the driver into common and non-DM functionality, so that the
DM support can later re-use the common code, while we retain the
non-DM code until all the platforms are converted.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
26f59c28bd net: rtl8139: Pass private data into rtl8139_eeprom_delay()
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
3feb6f7ff6 net: rtl8139: Introduce device private data
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
8ff1d4a9c8 net: rtl8139: Clean up bus_to_phys()/phys_to_bus() macros
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
f4385539f1 net: rtl8139: Use dev->iobase instead of custom ioaddr
Replace the use of custom static ioaddr variable with common dev->iobase,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
1ba8d98445 net: rtl8139: Switch from malloc()+memset() to calloc()
Replace malloc()+memset() combination with calloc(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Marek Vasut
9962dd25b1 net: rtl8139: Factor out device name assignment
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
8882238cc4 net: phy: Add DP8382x phy registration to TI PHY init
Add the DP8382X generic PHY registration to the TI PHY init file.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Dan Murphy
bc0e578f90 net: phy: Add support for TI PHY init
ti_phy_init function was allocated to the DP83867 PHY.  This function
name is to generic for a specific PHY.  The function can be moved to a
TI specific file that can register all TI PHYs that are defined in the
defconfig.  The ti_phy_init file will contain all TI PHYs initialization
so that only phy_ti_init can be called from the framework.

In addition to the above the config flag for the DP83867 needs to be changed
in the Kconfig and dependent defconfig files. The config flag that was
used for the DP83867 was also generic in nature so a more specific
config flag for the DP83867 was created.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-06-12 13:17:23 -04:00
Florin Chiculita
9c6de508a6 net: phy: add phyid search in vendor specific space
There are devices accesible through mdio clause-45, such as
retimers, that do not have PMA or PCS blocks.
This patch adds MDIO_MMD_VEND1 on the list of device addresses
where phyid is searched. Previous order of devices was kept.

Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
2020-06-12 13:17:23 -04:00
Tom Warren
a7a435e7d4 net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot
This is a WAR for DHCP failure after rebooting from the L4T kernel. The
r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
which goes by FuncEvent and MISC in various driver source/datasheets.
That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
here at the end of probe to ensure that U-Boot can get an IP assigned
via DHCP.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-06-12 13:17:23 -04:00
Bryan O'Donoghue
baafd99d13 net: phy: micrel: ksz8061 implement errata 80000688A fix
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after
cable connect') implements a fix for the above errata.

This patch replicates that errata fix in an ksz8061 specific init routine.

Signed-off-by: Bryan O'Donoghue <bod@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-06-12 13:17:23 -04:00
Tom Rini
08649c3d50 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- DM_ETH support for P2041RDB, T1024RDB, P5040DS, P3041DS, P4080DS, bug
  fixes
- Add TBI PHY access through MII
- DDR: Rework errata workaround for A008109, A008378, 009942
2020-06-08 08:51:59 -04:00
Hou Zhiqiang
a0f47e012f net: tsec: Access TBI PHY through the corresponding MII
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.

Fixes: 9a1d6af55e ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Hou Zhiqiang
bf67eb325b net: tsec: Access eTSEC registers using virtual address
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:20 +05:30
Madalin Bucur
2932c5a802 net: tsec: fsl_mdio: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-04 18:53:14 +05:30
Madalin Bucur
94472223c6 drivers: net: e1000: with DM_ETH needs DM_PCI too
Compilation error occur when DM_ETH is enabled without DM_PCI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Samuel Holland
99ac86187d net: sun8i_emac: Add support for the H6 variant
The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:37 +05:30
Samuel Holland
abdbefba2a net: sun8i_emac: Use consistent clock bitfield definitions
While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.

This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 22:38:22 +05:30
Marek Vasut
df4c4834fc net: ks8851: Add Kconfig entries
Convert CONFIG_KS8851_MLL and CONFIG_KS8851_MLL_BASEADDR to Kconfig

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
1d476de7c8 net: ks8851: Add DM support
Add support for U-Boot DM and DT probing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
9c9f3fc162 net: ks8851: Receive one packet per recv call
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat. It is however necessary to cache RXFC value, because
reading that one out clears it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
f725912624 net: ks8851: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b7c6ae2e82 net: ks8851: Pass around driver private data
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8ec27b01bc net: ks8851: Checkpatch cleanup
Fix various checkpatch complaints.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
eb69d8bf3c net: ks8851: Clean up chip ID readout
There is only one chip ID in the table of chip IDs for this chip.
Read out the chip ID instead and mask off the last "revision" bit
to check the chip ID, this works for all chips in the family. Then
drop the chip ID passing around.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
63f22f5998 net: ks8851: Remove type_frame_head
The packet status and length information should be extracted from the
FIFO per-packet. Adjust the code such that it reads the packet meta
data and then the packet afterward, if applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
b043597673 net: ks8851: Trim down struct ks_net
Most of the entries in the structure are useless, remove them. Inline
the rest of uses where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
6a45731364 net: ks8851: Use 16bit RXQCR access
Per KS8851-16MLL, the RXQCR is a 16bit register. Use 16bit accessors
to it consistently and drop the ks_wrreg8() function altogether, as
it is not used anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
8b41a16711 net: ks8851: Remove RXQCR cache
The cached RXQCR value is never updated, remove the cache and just use
the bits in the cache directly in the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Marek Vasut
e3b54cda68 net: ks8851: Replace malloc()+memset() with calloc()
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced. Moreover, remove
printf() in the fail path, as it is useless, and return proper -ENOMEM
return code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-22 19:46:45 +02:00
Tom Rini
b0b13f4114 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
  platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-20 08:46:56 -04:00
Razvan Ionut Cirjan
d5b0af047a net: fsl-mc: fixup DPC: add /board/ports node if missing
The DPC fixup for MAC address and enet_if is not made if
/board/ports node is missing in DPC file.
Add /board/ports or /ports nodes if them are missing.

Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Ioana Ciornei <Ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:08 +05:30
Laurentiu Tudor
21a00d130e drivers: net: fsl-mc: fixup msi-map property
Similarly to iommu-map, the msi-map property must also be fixed up
in the device tree, in order for the icid -> streamid translation
be possible in the MSI case as well.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Diana Craciun <diana.craciun@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Madalin Bucur
9b2e892eb6 driver: net: fm: minor fix in DM ETH support
Bus callback functions for read/write/reset need to be set only for
DM_ETH, moving endif a bit lower.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:07 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
07e1114671 Fix some checkpatch warnings in calls to udelay()
Fix up some incorrect code style in calls to functions in the linux/time.h
header, mostly udelay().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
4d72caa5b9 common: Drop image.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
e6f6f9e648 common: Drop part.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Nicolas Saenz Julienne
57805f2270 net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII
As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
RGMII. Don't enable it for the rest of setups.

This has been seen to misconfigure RPi4's PHY when booting Linux.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 10:59:11 +02:00
Tom Rini
bb488ac34d Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot issues on Nokia RX-51
- Configure AM6 CPSW for 10Mbps in rgmii mode.
- Minor changes for J721e
2020-05-11 12:04:54 -04:00
Ye Li
580fab4a82 eQos: Implement the read_rom_hwaddr callback
Implement the read_rom_hwaddr callback to load MAC address from fuse
for imx8m platforms.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
9d4194f179 fec: Move imx_get_mac_from_fuse declare to imx file
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Fugang Duan
0e9d23945c net: eqos: implement callbaks to get interface and set txclk rate
Implement the callbacks to get phy mode interface and txclk
rate configuration.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Fugang Duan
3a97da12ee net: dwc_eth_qos: add dwc eqos for imx support
Add dwc eqos for imx support.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:10 +02:00
Fugang Duan
e32e4d0f58 net: phy: realtek: add rx delay support for RTL8211F
Add RX delay enable support for RTL8211F PHY.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:25:02 +02:00
Ye Li
6a895d039b net: Update eQos driver and FEC driver to use eth phy interfaces
Update eQoS and fec ethernet drivers to support shared MDIO framework

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:54 +02:00
Ye Li
5fe419ef2a net: Add eth phy generic driver for shared MDIO
For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.

To resolve this problem, introduce an eth phy generic driver and uclass.

After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.

When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:24:48 +02:00
Peng Fan
3b26d527d3 net: fec: add fuse check
Add fuse check for fec. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-10 13:21:34 +02:00
Murali Karicheri
39821d58c9 net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii mode
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is
configured for External Control ("in band") mode
CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1

Hence update am65_cpsw_update_link() to follow documentation.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-05-09 19:58:58 +05:30
Michael Walle
8737c65fe4 phy: atheros: consolidate {ar8031|ar8035}_config()
The two functions are now exactly the same, remove one of them.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
6333cbb381 phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.

If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:01 -04:00
Michael Walle
fe6293a809 phy: atheros: add device tree bindings and config
Add support for configuring the CLK_25M pin as well as the RGMII I/O
voltage by the device tree.

By default the AT803x PHYs outputs the 25MHz clock of the XTAL input.
But this output can also be changed by software to other frequencies.
This commit introduces a generic way to configure this output.

Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V.
An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V
option needs an external supply voltage. This commit adds support to
switch the internal LDO to 1.8V.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
2b7721552a phy: atheros: move delay config to common function
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f6ae47be1a phy: atheros: introduce debug read and write functions
Provide functions to read and write the Atheros debug registers.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
30e3193128 phy: atheros: use defines for PHY IDs
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Michael Walle
f4d48f43b2 phy: atheros: fix AR8021 PHY ID mask
The upper bits are all the OUI.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
4d4e4cf779 phy: atheros: Clarify the intention of ar8021_config
Debug register 5 contains TX_CLK DELAY at bit 8 and reserved values at
the other bit positions, just like the other PHYs in the family do.
Therefore, it is not necessary to hardcode the reserved values, but
instead simply follow the read-modify-write procedure from the common
function.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
13114f38e2 phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.

If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
a234ae863a phy: atheros: Clarify the configuration of the CLK_25M output pin
Also take the opportunity to use the phy_read_mmd and phy_write_mmd
convenience functions.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
29602f9c4b phy: atheros: Use common functions for RGMII internal delays
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Vladimir Oltean
4346df3392 phy: atheros: Make RGMII Tx delays actually configurable for AR8035
Delete the extraneous write to debug reg 5 that enables Tx delay

When the driver was originally introduced in commit "6027384a phylib:
Add Atheros AR8035 GETH PHY support", the Tx delay was being
unconditionally enabled.

Then during "2ec4d10b phy: atheros: add support for RGMII_ID, RGMII_TXID
and RGMII_RXID", the author did not notice that code for enabling Tx
delay code was already. Therefore, the if condition for Tx delay has
always been useless for this PHY since this commit introduced it.

Prior to this patch, every AR8035 PHY in U-boot had Tx delay enabled.
After this patch, only those who define the interface as RGMII_TXID or
RGMII_ID will. This is to be expected, but will nonetheless break the
setups of those who didn't know they rely on Tx delay implicitly.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-07 11:05:00 -04:00
Tom Rini
143414c03f i.MX for 2020.07
----------------
 
 - imxrt: fix LCD clock, fix doc
 - new board: Coral Dev
 - imx8: enable Cache in SPL. SNVS, update SCFW API
 - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
 - MX6ULL : is_imx6ull to include i.MX6ULZ
 - Net: add config to enable TXC delay
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
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Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04 09:29:42 -04:00
Daniel Schwierzeck
8510580f2e net: pcnet: fix I/O primitives for memory access
Commit 69529c9120 ("net: pcnet: Switch to PCI memory access")
switched from PCI IO access to PCI memory access without updating
the I/O primitives. Contrary to SH, the primitives for memory
access and IO access are implemented differently. Thus doing
memory access with IO port primitives breaks the driver on
MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-05-04 08:57:50 -04:00
Marek Vasut
8148693b98 net: smc911x: Add DM support
Add support for U-Boot DM and DT probing. Furthermore, build the
SMC911x standalone EEPROM example only for the non-DM case, as it
is not converted yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 15:37:48 +02:00
Philippe Schenker
a1a34faef2 net: fec: Add possibility to enable TXC delay
This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or
FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC
delay in the MAC.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-05-01 13:46:22 +02:00
Philippe Schenker
c51eef5924 net: phy: micrel: Add basic support for KSZ9131
This adds basic support for the new Micrel KSZ9131 phy.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01 13:46:22 +02:00
Philippe Schenker
0861aa8fed net: phy: micrel: Use defines for PHY_IDs and MASK
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01 13:46:22 +02:00
Marek Vasut
8eb4fef11b net: smc911x: Split non-DM specific bits from common code
Split network handling functions into non-DM specific parts and
common code in preparation for conversion to DM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
b11c8bbfaf net: smc911x: Clean up the status handling in smc911x_recv()
Invert the status handling logic in smc911x_recv(), to make the
function easier to read, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
3dbab92603 net: smc911x: Pass around driver private data
Introduce a private data structure for this driver with embedded
struct eth_device and pass it around. This prepares the driver to
work with both DM and non-DM systems.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
ba267c781d net: smc911x: Convert IO accessors to {read,write}{w,l}()
Convert the IO accessors to standard ones instead of using volatile
void pointers, as those do not cover all the bus access details.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f0d73f5cd0 net: smc911x: Drop weak alias from 32bit accessors
These accessors are not overridden by any board, and even if they were,
this is something which should be handled via DM now, so remove the
weak alias option. Moreover, drop the inline keyword, as the compiler
can decide better.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
eb46efa381 net: smc911x: Inline all functions from header file
Inline all the functions from the header file, as they are not used
outside of the driver or the standalone EEPROM example.

Note that this does introduce considerable amount of duplication in
the standalone EEPROM example, however that one has to be rewritten
anyway, roughly such that the SMC911x driver would expose DM EEPROM
interface and the standalone example would use that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f51a2f8496 net: smc911x: Pull MII registration into separate function
Pull the MII interface registration into separate function to avoid the
ifdeffery in smc911x_initialize(). Moreover, adjust the fail path such
that we use goto labels.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9741795408 net: smc911x: Fix potential memleak() in init fail path
Fix memleak in the init fail path, where if allocation or registration
of MDIO bus fails, then ethernet interface is not unregistered and the
private data are not freed, yet the probe function reports a failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
6f6cf0083f net: smc911x: Invert the logic in smc911x_miiphy_{read,write}()
Invert the logic in the aforementioned functions to reduce indent,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
49af0cb5a6 net: smc911x: Rename smc911x_rx() to smc911x_recv()
Rename the function to keep the naming scheme consistent,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
882d5f6983 net: smc911x: Replace malloc()+memset() with calloc()
Replace combination of malloc()+memset() with calloc() as the behavior
is exactly the same and the amount of code is reduced.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9c211e3b05 net: smc911x: Remove pkt_data_{push,pull}
These functions are never used and are likely a pre-DM remnant
from times long past, just remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
e7ab86d9b2 net: rtl8139: Fill in SPDX tag
The rtl8139 driver is derived from Etherboot driver, which is in
turn derived from Linux 8139too driver added in Linux 2.2.18pre14.
An undocumented change in Linux 2.4.10.2 added a new field to the
driver, MODULE_LICENSE("GPL"); . According to current Linux kernel
licensing rules, Documentation/process/license-rules.rst, quote:

	"GPL"	Module is licensed under GPL version 2. This
		does not express any distinction between
		GPL-2.0-only or GPL-2.0-or-later. The exact
		license information can only be determined
		via the license information in the
		corresponding source files.

And since the code does not contain any "future" clause, the tag
is therefore GPL-2.0 only.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
6ee6caaf03 net: rtl8139: Move functions around
Just move functions around in preparation for easy DM conversion,
rename rtl_bcast_addr() to rtl8139_bcast_addr(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
0e5a4117a5 net: rtl8139: Finish cleanup
Finish the checkpatch cleanup of the driver, fix the remaining issues
in probe and init function and in global variables, rename the probe
function to rtl8139_init(), no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
38b306db23 net: rtl8139: Factor out hardware reset
This hardware reset and reset-wait implementation was twice in the
driver, factor it out into a separate function. This really should
use wait_for_bit() eventually and return -ETIMEDOUT, but thus far,
handling of any of this is missing from the driver. This must be
added later. Thus far, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
661479ffc1 net: rtl8139: Minor cleanup of rtl_disable()
Rename the function to rtl8139_stop(), clean up checkpatch errors in
the stop polling function. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
468fd95562 net: rtl8139: Minor cleanup of rtl_poll()
Rename the function to rtl8139_recv(), clean up various checkpatch errors,
line-over-80 conditions, and malformed comments. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
67fdbc06be net: rtl8139: Minor cleanup of rtl_transmit()
Rename the function to rtl8139_send(), clean up the TX polling, the TX
OK condition at the end, overuse of typecasts, and various line-over-80
problems. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
c7a3e35d76 net: rtl8139: Minor cleanup of rtl_reset()
Rename the function to rtl8139_reset(), clean up the reset polling
and various line-over-80 problems. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
89f3facffb net: rtl8139: Minor cleanup of set_rx_mode()
Rename the function to rtl8139_set_rx_mode(), use unsigned variables
where applicable and inline mc_filter[] values. No functional chanage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
198e6b571b net: rtl8139: Consistently use rtl8139_rx_config
This string of macros is exactly the same thing as rtl8139_rx_config,
so just use rtl8139_rx_config. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
17dc95e527 net: rtl8139: Minor cleanup of read_eeprom()
Rename the function to rtl8139_read_eeprom() to keep the naming
consistent, keep the variables sorted in reverse xmas tree. No
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
f80f4e4d72 net: rtl8139: Rework eeprom_delay() macro
The macro assumes ee_addr variable to be present when it's being
used. Rework the macro into a function instead and pass it an
argument specifying the register base address, to make it future
proof for DM conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
a5e66e515b net: rtl8139: Register macro cleanup
Clean up the horrible register definitions in the RTL8139 driver.
This does create a couple of checkpatch errors, but the driver is
full of them anyway, and those will be cleaned up later.

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
24891dd8d4 net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptor
The DMA may attempt to write a DMA descriptor in the ring while it is
being updated. By writing the DMA descriptor buffer address to 0, it
is assured the DMA will not use such a buffer and the buffer can be
updated without any interference.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
a83ca0c280 net: dwc_eth_qos: Invalidate RX packet DMA buffer
This patch prevents an issue where the RX packet might have been
accessed by the CPU, which now has cached data from the packet in
the caches and possibly various write buffers, and these data may
be evicted from the caches into the DRAM while the buffer is also
written by the DMA.

By invalidating the buffer after the CPU accessed it and before the
DMA populates the buffer, it is assured that the buffer will not be
corrupted.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
738ee270fe net: dwc_eth_qos: Invalidate RX descriptor before reading
The current code polls the RX desciptor ring for new packets by reading
the RX descriptor status. This works by accident, as the RX descriptors
are often in non-cacheable memory. However, the driver does support use
of RX descriptors in cacheable memory.

This patch adds a missing RX descriptor invalidation, which assures the
CPU will read a fresh copy of the RX descriptor instead of a cached one.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
dd90c2e1ea net: dwc_eth_qos: Flush the RX descriptors on init
Currently the code only flushes the first RX descriptor, not every entry
in the RX descriptor ring. Fix this, to make sure the DMA engine can pick
the RX descriptors correctly.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
83858d8795 net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointer
This code programs the next descriptor in the TX descriptor ring into
the hardware as the last valid TX descriptor. The problem is that if
the currenty descriptor is the last one in the array, the code will
not wrap around correctly and use TX descriptor 0 again, but instead
will use TX descriptor at address right past the TX descriptor ring,
which is the first descriptor in the RX ring.

Fix this by adding the necessary wrap-around.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
4332d80617 net: dwc_eth_qos: Fully rewrite RX descriptor field 3
The RX descriptor field 3 should contain only OWN and BUF1V bits before
being used for receiving data by the DMA engine. However, right now, if
the descriptor was already used for receiving data and is being cleared,
the field 3 is only modified and the aforementioned two bits are ORRed
into the field. This could lead to a residual dirty bits being left in
the field 3 from previous transfer, and it generally does. Fully set the
field 3 instead to clear those residual dirty bits.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
c2abfca9be net: dc2114x: Switch DEBUG_SROM{,2} to debug_cond()
Replace the adhoc debugging ifdeffery with debug_cond() and an
internal SROM_DEBUG macro to select the debug level.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
dbe9c0c145 net: dc2114x: Reorganize driver
Move the functions in the driver around to better fit future DM
conversion, drop function forward declarations. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
3b7b9e2e71 net: dc2114x: Clean up INL/OUTL functions
Rename these functions to dc2114x_{inl,outl}(), use u32 values in
them instead of plain signed integers as all those values are in
fact register values and the driver code does bitwise operations
on them. No functional change intended.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
04da061209 net: dc2114x: Clean up DE4X5 macros
Replace these macros with static functions to permit the compiler to
do type checking on the functions. The INL()/OUTL() functions have to
be moved in this patch as well, as those DE4X5 macros are using them.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
eb216f1e00 net: dc2114x: Clean up remaining driver code
Clean up the remaining driver code, macro space alignment, function
declaration indent, replace __attribute__((aligned(32))) with plain
__aligned(32). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
2e5c2a103e net: dc2114x: Clean up SROM operations
Clean up the SROM accessors to bring them up to standards with
U-Boot coding style. Sort variable into reverse xmas tree. No
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
5a0c332a8a net: dc2114x: Clean up send_setup_frame()
Clean up the send_setup_frame() to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
5b4e7dfb87 net: dc2114x: Clean up dc21x4x_halt()
Clean up the driver halt code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
9308df81a2 net: dc2114x: Clean up dc21x4x_recv()
Clean up the driver recv code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
7c53e3364e net: dc2114x: Clean up dc21x4x_send()
Clean up the driver send code to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
ca5cb04b7f net: dc2114x: Clean up init code
Clean up the driver init code to bring it up to standards with
U-Boot coding style, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
69529c9120 net: pcnet: Switch to PCI memory access
Replace the PCI IO access with PCI memory access, the card
supports both, but the former does not work with QEMU SH4.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
3c0bcb97d6 net: pcnet: Replace mips-specific accessors
Replace mips-specific UNCACHED_SDRAM() macro with standard
map_physmem(), which permits the driver to work on other
systems than mips.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
171f5e580e net: tulip: Remove CONFIG_TULIP_*
These macros are not used by any board, remove them to simplify
the driver. The EEPROM accessors are still retained however, as
those might still be useful.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:21 +02:00
Marek Vasut
635a76b703 net: pcnet: Remove CONFIG_PCNET_79C97x
These macros guard one switch-case statement, which grows mips malta
by some 20 bytes if debug is enabled, and even less if it is not. To
make the code simpler, just support all the NICs and be done with it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-05-01 12:35:20 +02:00
Madalin Bucur
6eb32a03e0 driver: net: fm: add DM ETH support
Probe the FMan MACs based on the device tree while
retaining the legacy code/functionality.
One notable change introduced here is that, for DM_ETH,
the name of the interfaces is corrected to the fmX-macY
format, that avoids the referral to the MAC block names
which were incorrect for FMan v3 devices (i.e. DTSEC,
TGEC) and had weird formatting (i.e. FM1@DTSEC6, FM1@TGEC1).
The legacy code is left unchanged in this respect.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
20e0f62952 driver: net: fm: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
1c710187a5 driver: net: fm: separate receive buffer free code
Move the receive buffer free code in a separate function.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
8313cb0215 driver: net: fm: change init_phy() param
Change the init_phy() parameter to simplify the code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
988e33f8d4 drivers: net: fsl-mc: add support for CONFIG_DM_ETH
Make any adjustments necessary in order to support DPAA2 devices probed
using CONFIG_DM_ETH. While at it, fixup some styling issues aroung the
switch-case statement.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
267c5146d3 drivers: net: ldpaa: add DTS based probing support
When CONFIG_DM_ETH is enabled DPAA2 network interfaces will now probe
based on DTS nodes with the "fsl,qoriq-mc-dpmac" compatible.
In this case, transform the ldpaa_eth driver into a UCLASS_ETH driver
and reuse the _open()/_tx()/_stop() functions already inplemented.

For the moment, the ldpaa_eth driver will support both configurations:
with or without CONFIG_DM_ETH enabled. Any 'struct eth_device' occurrence
now has a matching 'struct udevice' made mutually exclusive based on the
state of CONFIG_DM_ETH.

Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:43 +05:30
Ioana Ciornei
52e16ec613 drivers: net: add Layerscape mEMAC MDIO driver
Add a driver for the MDIO interface integrated in the mEMAC (Multi-rate
Ethernet Media Access Controller) and the Fman 10G Ethernet MACs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 10:49:20 +05:30
Landen Chao
532de8d99c eth: mtk-eth: add mt7531 switch support in mediatek eth driver
mt7531 is a 7-ports switch with 5 embedded giga phys, and uses the same
MAC design of mt7530. The cpu port6 supports SGMII only. The cpu port5
supports RGMII or SGMII in different model.

mt7531 is connected to mt7622 via both RGMII and SGMII interfaces.
In this patch, mt7531 cpu port5 or port6 is configured to maximum
capability to align CPU MAC setting.

The dts has been committed in the commit 6efa450565 ("arm: dts:
mediatek: add ethernet and sgmii dts node for mt7622")

Signed-off-by: Landen Chao <landen.chao@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-04-24 10:09:59 -04:00
Francois Gervais
402ef4d244 net: fm: fix build error when not using nand
If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not
accessible.

This fix allows the build to succeed in this case.

Signed-off-by: Francois Gervais <fgervais@distech-controls.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-17 15:13:19 +05:30
Patrick Delaunay
4f60a51d07 net: dwc_eth_qos: implement phy reg and max-speed for stm32
Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Christophe Roullier
5177b31ba6 net: dwc_eth_qos: implement reset-gpios for stm32
Add management of property "reset-gpios" in the node identified by
"phy-handle" to configure any GPIO used to reset the PHY.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Michal Simek
25de8a8d0f net: zynq-gem: Setup and use mdio base separately
Not all IPs have private MDIO bus and MDIO bus should be shared between
several IPs. In past one patch tried to implement it
(https://lists.denx.de/pipermail/u-boot/2018-February/319285.html)
in pretty raw way but it is not the cleanest solution.
This patch is just taking the part of that solution to be able to handle it
over releases without conflicts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Ashok Reddy Soma
0f8defd891 net: zynq_gem: Add cache flush to zynq_gem_free_pkt
Add cache flush to zynq_gem_free_pkt. This is necessary
because some net routines would modify this buffer in place.
The cache_invalidate in the zynq_gem_recv function would cause
the modifications to the buffer to overwrite the DMA from the GEM,
if cache coherency is not enabled in the GEM, the next time the
buffer is in use.

Flushing the cache when the buffer is no longer in use by the
net functions ensures that the GEM DMA is going to take place
into a clean buffer.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Marek Vasut
b13da11255 net: sh_eth: Init the hardware before PHY access
To access the PHY, the MAC registers must be initialized. Call the init
function in probe() to make it so, otherwise the PHY ID readout returns
all zeroes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-04 15:06:37 +02:00
Michal Simek
7f6b0f3357 net: macb: Fix incorrect write function name when MACB_ZYNQ is enabled.
When MACB_ZYNQ is enabled there is compilation warnings
drivers/net/macb.c: In function ‘_macb_init’:
drivers/net/macb.h:675:33: error: ‘MACB_DMACFG’ undeclared (first use in this function);
 did you mean ‘MACB_MCF’?
  writel((value), (port)->regs + MACB_##reg)
                                 ^~~~~

It has been caused by changing macros name by commit below.

Fixes: 6c636514d4 ("net: macb: sync header definitions as taken from Linux")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-31 10:06:53 -04:00
Madalin Bucur
4fb2264b28 armv8/ls1046ardb: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1046ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.

Fixes: cc1aa218f5 ("armv8/ls1046a: RGMII PHY requires internal
	delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:06:52 +05:30
Madalin Bucur
00160cf32e armv8/ls1043ardb: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1043ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID. There is a pull-up that turns
on Rx internal delay by default and the u-boot does not
override that (yet) so in u-boot the interface is functional.
In Linux the PHY driver is clearing the Rx delay for the
"rgmii-txid" mode and the reception does not work.
Changing the RGMII mode to internal delay here ensures that
device tree fix-ups for the PHY connection type turn on both
Tx and Rx internal delay in Linux.

Fixes: 5a78a472f6 ("armv8/ls1043a: RGMII PHY requires internal
	delay on Tx")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:06:52 +05:30
Madalin Bucur
e219d7d0f1 net: fman: add support for all RGMII delay modes
The RGMII modes that include internal delay were not all
properly treated in the memac code. Add support for all
RGMII delay modes.

Fixes: 111fd19e3b ("fm/mEMAC: add mEMAC frame work")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:06:52 +05:30
Clemens Gruber
1c1f4f0a4b net: phy: marvell: Unify 88E151x series phy_driver
The PHY models of the Marvell 88E151x series are not reliably
distinguishable by their uid / PHY identifiers.
The 88E1510, 88E1512, 88E1514 and 88E1518 all have the same OUI and
model number and bits 3:0 in the PHY Identifier 2 (Page 0, Reg 3) are
described as HW revision number, but both 88E1510 and 88E1518 PHYs were
observed with the same HW rev number (1).

Before commit 83cfbeb0df ("net: phy: Fix mask so that we can identify
Marvell 88E1518"), the 88E151x were detected because the HW revision
bits were masked from the uid. After that change, 88E1510/12/18 were all
detected as 88E1518 and the 88E1510 specific code was no longer run.

I modified the mask to again ignore all four HW revision bits, removed
the 88E1510 specific code (board-specific LED/INTn setup), which was not
called since late 2016 anyway and renamed the config function and
phy_driver struct to the better fitting 88e151x.

The uid and mask bits 3:0 are now again the same as in the Linux kernel.

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
2020-03-09 18:11:25 -05:00
Michal Simek
a7844953ac net: phy: dp83867: Add SGMII mode type switching
This patch adds ability to switch beetween two PHY SGMII modes.
Some hardware, for example, FPGA IP designs may use 6-wire mode
which enables differential SGMII clock to MAC.

Patch description, dt flags have been done in mainline Linux by
commit a2111c460c0c ("net: phy: dp83867: Add documentation for SGMII mode type")
and by commit 507ddd5c0d47 ("net: phy: dp83867: Add SGMII mode type switching")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:25 -05:00
Andre Przywara
a44ee246c5 net: phy: Fix overlong PHY timeout
Commit 27c3f70f3b ("net: phy: Increase link up delay in
genphy_update_link()") increased the per-iteration waiting time from
1ms to 50ms, without adjusting the timeout counter. This lead to the
timeout increasing from the typical 4 seconds to over three minutes.

Adjust the timeout counter evaluation by that factor of 50 to bring the
timeout back to the intended value.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fixes: net: phy: Increase link up delay in genphy_update_link() ("27c3f70f3b50")
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:24 -05:00
Alex Marginean
2d5d5266e1 drivers: net: phy: aquantia: make it less verbose
The driver now unconditionally prints some information that's not
universally useful.  Replace printf with debug.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:24 -05:00
Alex Marginean
0d8b0c917a drivers: net: phy: aquantia: drop XGMII as a valid system interface proto
Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid
protocol configuration.  The PHY doesn't support it, it's just used as an
alias for one of the other two protocols.

Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:24 -05:00
Samuel Mendoza-Jonas
e2ffeaa162 phy: Include NC-SI in phy setup
Add NC-SI to the usual phy handling. This makes two notable changes:
- Somewhat similar to a fixed phy, phy_connect() will create an NC-SI
phy if CONFIG_PHY_NCSI is defined.
- An early return is added to phy_read() and phy_write() to handle a
case like the NC-SI phy which does not define a bus.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:23 -05:00
Samuel Mendoza-Jonas
f641a8ac93 phy: Add support for the NC-SI protocol
This introduces support for the NC-SI protocol, modelled as a phy driver
for other ethernet drivers to consume.

NC-SI (Network Controller Sideband Interface) is a protocol to manage a
sideband connection to a proper network interface, for example a BMC
(Baseboard Management Controller) sharing the NIC of the host system.
Probing and configuration occurs by communicating with the "remote" NIC
via NC-SI control frames (Ethernet header 0x88f8).

This implementation is roughly based on the upstream Linux
implementation[0], with a reduced feature set and an emphasis on getting
a link up as fast as possible rather than probing the full possible
topology of the bus.
The current phy model relies on the network being "up", sending NC-SI
command frames via net_send_packet() and receiving them from the
net_loop() loop (added in a following patch).

The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent
field definitions.

[0]: https://github.com/torvalds/linux/tree/master/net/ncsi
[1]: https://github.com/torvalds/linux/blob/master/net/ncsi/ncsi-pkt.h

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09 18:11:23 -05:00
Michal Simek
58ecd9ad0b net: zynq: Free allocated buffers in case of error
Driver probe function is called again and again in case of error.
Malloc space is getting full which is is reported by:
 Insufficient RAM for page table: 0x15000 > 0x14000.
 Please increase the size in get_page_table_size()
 ### ERROR ### Please RESET the board ###

The patch is freeing allocated buffers on error path to avoid panic.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:04:10 +01:00
Michal Simek
380376520f net: phy: dp83867: Clean force link good bit
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which
means FORCE_LINK_GOOD is already setup. Origin code was doing write but the
new code is doing read/modify/write and keep this bit untouched. That's why
ethernet stop to work.
The patch is cleaning this bit when PHYCR value is composed.

Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.

Fixes: 37d6265f2b ("net: phy: dp83867: refactor rgmii configuration")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-02-28 12:04:10 +01:00
T Karthik Reddy
b6779274f2 net: zynq_gem: Use ulong instead of u32 data type
flush_dcache_range() expects unsigned long in the arguments. Here u32
variable is unable to hold the higher address value when ddr mapped
to higher addresses & flushing lower address dchache range instead
which is unmapped causing to crash.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28 12:04:10 +01:00
Masahiro Yamada
9d86b89c59 dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.

Factor them out to <linux/dma-mapping.h>, and make all drivers to
include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>.

If we need to differentiate them for some architectures, we can
move the generic definitions to <asm-generic/dma-mapping.h>.

Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Masahiro Yamada
950c596867 dma-mapping: fix the prototype of dma_unmap_single()
dma_unmap_single() takes the dma address, not virtual address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Tom Rini
9a8942b53d sandbox conversion to SDL2
TPM TEE driver
 Various minor sandbox video enhancements
 New driver model core utility functions
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Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
2020-02-11 10:58:41 -05:00
Frank Wunderlich
47b1431d50 eth: mtk-eth: aarch64: fix build warnings on ethernet-driver
building mtk ethernet driver for aarch64 (mt7622) results
in warnings/errors

  "error: cast from pointer to integer of different size"

Fixes: 23f17164d9 ("ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-02-07 13:59:58 -05:00
MarkLee
e395717ca9 eth: mtk-eth: add mt7622 support in mediatek eth driver
This patch add mt7622 support in mediatek eth driver

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07 13:59:58 -05:00
MarkLee
b4ef49a905 eth: mtk-eth: add sgmii mode support in mediatek eth driver
This patch add sgmii init part for the mediatek SoC that
support sgmii mode. It is a must for mt7622.

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07 13:59:58 -05:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Tom Rini
c95215a6ca - DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
 - enable DFU for RPi4
 - Fix RPi4 memory map to include the genet device
 - add driver for the genet ethernet device
 - enable network support in RPi4 config
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Merge tag 'rpi-next-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

- DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
2020-02-05 07:18:12 -05:00
Flavio Suligoi
dad9af590a net: fix typo
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
2020-01-30 13:30:35 -05:00
Amit Singh Tomar
d53e3fa385 net: Add support for Broadcom GENETv5 Ethernet controller
The Broadcom GENET Ethernet MACs are used in several MIPS based SoCs
and in the Broadcom 2711/2838 SoC used on the Raspberry Pi 4.
There is no publicly available documentation, so this driver is based
on the Linux driver. Compared to that the queue management is
drastically simplified, also we only support version 5 of the IP and
RGMII connections between MAC and PHY, as used on the RPi4.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: heavy cleanup and a few fixes]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-01-29 18:30:33 +01:00
Tom Rini
40521a6c90 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a,
ls1088a platforms:
- lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes
2020-01-25 12:20:51 -05:00
Vignesh Raghavendra
5cde44e12a net: macb: Drop local cache flush
Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
While at that fix dma_unmap_single() call to match new prototype

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-01-25 12:04:36 -05:00
Alex Marginean
b8e4eec79c drivers: net: fsl_enetc: fix SXGMII MAC configuration
Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Michael Walle
42c66f057f drivers: net: fsl_enetc: add write_hwaddr() for LS1028A
The LS1028A SoC is special in the handling of the MAC addresses. We need
to write to the IERB version of the PSIPMAR0/1 register. This value will
be sampled into the corresponding port PSIPMAR0/1 register if the PCI
memory access is enabled.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Michael Walle
ee5c70b8f7 drivers: net: fsl_enetc: use write_hwaddr()
Intead of setting the MAC address in enetc_start() use the proper
write_hwaddr(). U-Boot takes care of the random MAC address, too.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
9c2aee1b19 drivers: net: fsl_enetc: Pass on primary MAC address to Linux
Passes on the primary address used by u-boot to Linux. The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB. The address
in IERB is restored on ENETC PCI functions at FLR.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00