Commit graph

8 commits

Author SHA1 Message Date
Sumit Garg
d382025dc5 net: dwc_eth_qos: Add Qcom ethernet driver glue layer
The Qualcom ETHQOS hardware supports an RGMII macro which needs to be
configured according to following link speeds:
- SPEED_1000
- SPEED_100
- SPEED_10

So add a corresponding glue driver to configure RGMII macro.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-02-10 12:50:00 -05:00
Sumit Garg
a962b7cff4 net: dwc_eth_qos: Allow platform to override tx/rx_fifo_sz
The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-02-10 12:50:00 -05:00
Marek Vasut
e9d3fc7e46 net: dwc_eth_qos: Add support for bulk RX descriptor cleaning
Add new desc_per_cacheline property which lets a platform run RX descriptor
cleanup after every power-of-2 - 1 received packets instead of every packet.
This is useful on platforms where (axi_bus_width EQOS_AXI_WIDTH_n * DMA DSL
inter-descriptor word skip count + DMA descriptor size) is less than cache
line size, which necessitates packing multiple DMA descriptors into single
cache line.

In case of TX descriptors, this is not a problem, since the driver always
does synchronous TX, i.e. the TX descriptor is always written, flushed and
polled for completion in eqos_send().

In case of RX descriptors, it is necessary to update their status in bulk,
i.e. after the entire cache line worth of RX descriptors has been used up
to receive data.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 10:25:17 -05:00
Marek Vasut
f94d008a9d net: dwc_eth_qos: Split TX and RX DMA rings
Separate TX and RX DMA rings to make their handling slightly clearer.
This is a preparatory patch for bulk RX descriptor flushing.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-11-28 10:25:17 -05:00
Peng Fan
a624251461 net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr
i.MX has specific hook to get MAC address, so introduce a hook and move
i.MX code to its own driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Ye Li
a6acf95508 net: eqos: add function to get phy node and address
Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
5fc783b5d9 net: dwc_eth_qos: move i.MX code out
Move i.MX code to a standalone file to make it easy for adding new
platform support

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00
Peng Fan
149e80f74b net: dwc_eth_qos: public some functions
Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:01 +02:00