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6 commits

Author SHA1 Message Date
Jagan Teki
b851c006a1 clk: rockchip: pll: Add pll_rk3588 type for rk3588 
Add RK3588 pll set and get rate clock support.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
 2023-02-28 18:07:27 +08:00
Michal Suchanek
aa36a74f0f rockchip: clk: pll: Fix constant typo 
Fixes: bbda2ed584 ("rockchip: clk: pll: add common pll setting funcs")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Link: https://lore.kernel.org/r/20220928104129.13240-1-msuchanek@suse.de
 2022-10-19 12:06:48 -04:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines 
Signed-off-by: Wolfgang Denk <wd@denx.de>
 2021-09-30 08:08:56 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header 
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header 
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2020-05-18 21:19:18 -04:00
Elaine Zhang
bbda2ed584 rockchip: clk: pll: add common pll setting funcs 
Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
 2019-11-17 17:22:53 +08:00