Commit graph

3 commits

Author SHA1 Message Date
Jonas Karlman
fd6e425be2 rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.

Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.

  => sf probe
  SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1492992 bytes read in 129 ms (11 MiB/s)

  => sf update $fileaddr 0 $filesize
  device 0 offset 0x0, size 0x16c800
  1300480 bytes written, 192512 bytes skipped in 11.103s, speed 137694 B/s

The BROM_BOOTSOURCE_ID value read back when booting from SPI flash does
not match the expected value of 3 (SPINOR) used by other SoCs. Instead a
value of 6 is read back, add a new enum value to handle this new
bootsource id.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-19 08:50:44 +08:00
Jonas Karlman
e259f39a12 rockchip: rk3588: Add boot device detection
Enable SPL on RK3588 to detect which device it was booted from.
Fixes use of same-as-spl in u-boot,spl-boot-order prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jagan Teki
f5bc9929a2 arm: rockchip: Add RK3588 arch core support
The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76
and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU,
Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2,
LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0,
PCIe 3.0, SATA 3, Ethernet, SDIO3.0 I2C, UART, SPI, GPIO and PWM.

Add arch core support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00