Commit graph

101 commits

Author SHA1 Message Date
Fabio Estevam
3a384b494c imx-common: cpu: Do not print on invalid temperature
It is not very useful to have the message below on every boot
(especially when we are using early silicon):

U-Boot 2015.10-rc2-23945-g37cf215 (Sep 08 2015 - 14:12:14 -0300)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C)CPU:   Thermal invalid data, fuse: 0x0
 - invalid sensor device

, so turn the error message into debug level.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-13 10:50:55 +02:00
Adrian Alonso
cd562c8d07 imx: imx7d: add imx-common cpu support for imx7d
Add imx-common cpu support for imx7d SoC
- Update reset_cause for imx7d
- Enable watchdog driver built for imx7d

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
648539c906 arm: imx-common: init: rework wdog settings for imx6/imx7
Rework imx_set_wdog_powerdown to be reused by imx6 and imx7

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
75a565f297 arm: imx-common: init: extend init_aips to support imx7
Extend init_aips to support imx7 SoC, use is_soc_type
and is_cpu_type to resolve at run time aips3 settings

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:54 +02:00
Adrian Alonso
6953574188 imx: system counter driver for imx7d and mx6ul
Add system counter driver for imx7d and mx6ul
imx7 and imx6ul supports system counter timer as well as
GPT timer (arch/arm/imx-common/timer.c); The default for
imx7 is systemcounter timer.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
50a082a88c arm: imx: imx-common: init: move arch init common setup
Move common imx6 arch init setup, init.c can be extended
and reused to support imx7 SoC keeping init arch common
code.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
ab09e72866 arm: imx: common rework cache settings for imx6
Rework cache settings for imx6, move cache configuration
to imx-common/cache.c so it can be reused for newer SoC

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
1368f99346 thermal: imx_thermal: rework driver to be reused
Rework imx_thermal driver to be used across i.MX
processor that support thermal sensor

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-09-13 10:11:53 +02:00
Adrian Alonso
03f0e4c7cd imx: iomux-v3: add imx7d support for iomuxc
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
  (0x302C0000) each conroller provides control and mux mode pad
  registers but shares iomuxc input select register with iomuxc-lpsr
  IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings
  for iomuxc-lpsr pads.
* Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3
  driver for these LPSR pins.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-09-02 15:31:33 +02:00
Peng Fan
35d5e54363 imx-common: timer: add i.MX6UL support
Add i.MX6UL GPT timer support.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:07 +02:00
Peng Fan
8631c06e9b imx: mx6ul: Add i.MX6UL CPU type
Add MXC_CPU_MX6UL for i.MX6UL CPU type which is got at runtime from
DIGPROG register. But the value has been occupied by MXC_CPU_MX6D which
is not real id from DIGPROG register, so change i.MX6D to value 0x67 which
was not occupied.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2015-08-02 11:05:06 +02:00
Peng Fan
d0acd99334 imx: add cpu type for i.MX6QP/DP
Add cpu type for i.MX6QP/DP.

This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP
and MXC_CPU_MX6DP, we should use:
(is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)).

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:42:48 +02:00
Peng Fan
b65d9d868e imx: mx6 correct is_soc_rev usage
is_soc_rev should return a bool value, so use "==", but not "-",
change (is_soc_rev(CHIP_REV_1_0) > 0) to (soc_rev() > CHIP_REV_1_0).
This patch also add space between "&" for cpu_type(rev) macro.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-06-27 18:16:31 +02:00
Stefano Babic
943a3f2ccb imx: drop warning: unused variable 'max_freq'
max_freq in print_cpuinfo is used only with
imx6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2015-06-08 08:55:08 +02:00
Bhuvanchandra DV
d348a943e7 dm: gpio: vf610: Add GPIO driver support
Add GPIO driver support to Freescale VF610

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
2015-06-08 08:41:54 +02:00
Stefano Babic
8649b405c5 Revert "imx: drop warning: unused variable 'max_freq'"
This reverts commit a0117a5e41.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2015-05-28 12:01:44 +02:00
Stefano Babic
a0117a5e41 imx: drop warning: unused variable 'max_freq'
max_freq in print_cpuinfo is used only with
imx6.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2015-05-27 11:10:15 +02:00
Heiko Schocher
21a26940f9 arm, imx6, i2c: add I2C4 for MX6DL
add I2C4 modul for MX6DL based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:16:54 +02:00
Tim Harvey
70caa8e21d imx: mx6: add display of CPU temperature grade in print_cpuinfo()
When CONFIG_IMX6_THERMAL is defined print the CPU temperature grade info
along with the current temperature.

Before:
 CPU:   Temperature 42 C

After:
 CPU:   Automotive temperature grade (-40C to 125C) at 42C
 CPU:   Industrial temperature grade (-40C to 105C) at 42C
 CPU:   Extended Commercial temperature grade (-20C to 105C) at 42C

Cc: Stefan Roese <sr@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Ye Li <b37916@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Peng Fan <b51431@freescale.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19 15:31:46 +02:00
Tim Harvey
b83ddac805 imx: mx6: display max cpu frequency in print_cpuinfo()
Display the max CPU frequency as well as the current running CPU frequency
if the max CPU frequency is available and differs from the current CPU
frequency.

Before:
CPU:   Freescale i.MX6Q rev1.2 at 792 MHz

After - using an 800MHz IMX6DL (running at its max)
CPU:   Freescale i.MX6DL rev1.1 at 792 MHz

After - using a 1GHz IMX6Q (not running at its max):
CPU:   Freescale i.MX6Q rev1.2 996 MHz (running at 792 MHz)

Cc: Stefan Roese <sr@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Ye Li <b37916@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Peng Fan <b51431@freescale.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19 15:31:31 +02:00
Prabhakar Kushwaha
28420e780a arm/imx-common: Fix warning 'get_reset_cause' defined but not used
Fix below warning
arch/arm/imx-common/cpu.c:29:14: warning: ‘get_reset_cause’ defined but
not used
 static char *get_reset_cause(void)

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-05-19 15:13:51 +02:00
Ulises Cardenas
98a49e5340 imx: dek_blob: Add explicit include for mapmem
Boards such as imx6q_sabresd might not have mapmem.h as part of
 their common library. This causes a build error if the DEK blob
 command is enabled.

 Fix: make explicit the include of mapmem.h

Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com>
Reviewed-by: Ruchika Gupta <Ruchika.gupta@freescale.com>
2015-05-15 19:20:48 +02:00
Peng Fan
71204e95ce i2c: mxc: refactor i2c driver and support dm
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
   used for non-DM and DM.
2. Remove `struct mxc_i2c_regs` structure, but use register offset to access
   registers based on `base` entry of `struct mxc_i2c_bus`.
3. Remove most `#ifdef I2C_QUIRK_REG`. Using driver_data to contain platform
   flags. A new flag is introduced, I2C_QUIRK_FLAG.
4. Most functions use `struct mxc_i2c_bus` as one of the parameters.
   Make most functions common to DM and non-DM, try to avoid duplicated code.
5. Support DM, but pinctrl is not included. Pinmux setting is still set
   by setup_i2c, but we do not need bus_i2c_init for DM.
6. struct i2c_parms and struct sram_data are removed.
7. Remove bus_i2c_read bus_i2c_write prototype in header file. The frist
   paramter of bus_i2c_init is modified to i2c index. Add new prototype
   i2c_idle_bus and force_bus_idle. Since bus_i2c_init is not good for
   DM I2C and pinctrl is missed, we use a weak function for i2c_idle_bus.
   Board file take the responsibility to implement this function, like this:
   "
   int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
   {
	   if (i2c_bus->index == 0)
		   force_bus_idle(i2c_pads_info0);
	   else if (i2c_bus->index == 1)
		   force_bus_idle(i2c_pads_info1);
	   else
		   xxxxxx
   }
   "
8. Introduce a weak function, enable_i2c_clk
9. Tested on an i.MX7 platform. Log info:
 => dm tree
 Class       Probed   Name
 ----------------------------------------
 root        [ + ]    root_driver
 simple_bus  [   ]    |-- soc
 simple_bus  [   ]    |   |-- aips-bus@30000000
 simple_bus  [   ]    |   |   |-- anatop@30360000
 simple_bus  [   ]    |   |   `-- snvs@30370000
 simple_bus  [   ]    |   |-- aips-bus@30400000
 simple_bus  [   ]    |   `-- aips-bus@30800000
 i2c         [   ]    |       |-- i2c@30a20000
 i2c         [   ]    |       `-- i2c@30a40000
 simple_bus  [   ]    `-- regulators
 => i2c dev 0
 Setting bus to 0
 => i2c probe
 Valid chip addresses: 08 50
 => i2c md 8 31
 0031: 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08 08

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-14 18:49:36 -06:00
Sanchayan Maity
c7ea243cc0 ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Boris BREZILLON
a05a6045d5 ARM: iMX: define an IMX_CONFIG Kconfig option
IMX_CONFIG is currently passed via the SYS_EXTRA_OPTIONS which is marked
as deprecated.

Add a new Kconfig file under arch/arm/imx-common and define the
IMX_CONFIG Kconfig in there.

Each board is supposed to provide a default value pointing to the
appropriate imximage.cfg file.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-23 13:19:17 +01:00
Raul Cardenas
0200020bc2 imx6: Added DEK blob generator command
Freescale's SEC block has built-in Data Encryption
Key(DEK) Blob Protocol which provides a method for
protecting a DEK for non-secure memory storage.
SEC block protects data in a data structure called
a Secret Key Blob, which provides both confidentiality
and integrity protection.
Every time the blob encapsulation is executed,
a AES-256 key is randomly generated to encrypt the DEK.
This key is encrypted with the OTP Secret key
from SoC. The resulting blob consists of the encrypted
AES-256 key, the encrypted DEK, and a 16-bit MAC.

During decapsulation, the reverse process is performed
to get back the original DEK. A caveat to the blob
decapsulation process,  is that the DEK is decrypted
in secure-memory and can only be read by FSL SEC HW.
The DEK is used to decrypt data during encrypted boot.

Commands added
--------------
  dek_blob - encapsulating DEK as a cryptgraphic blob

Commands Syntax
---------------
  dek_blob src dst len

    Encapsulate and create blob of a len-bits DEK at
    address src and store the result at address dst.

Signed-off-by: Raul Cardenas <Ulises.Cardenas@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>

Signed-off-by: Ulises Cardenas <ulises.cardenas@freescale.com>

Signed-off-by: Ulises Cardenas-B45798 <Ulises.Cardenas@freescale.com>
2015-03-02 09:57:06 +01:00
Eric Nelson
11c2e505c4 ARM: i.MX: provide access to reset cause through get_imx_reset_cause()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2015-02-17 10:42:54 +01:00
Marek Vasut
cd3c5896b6 imx: i2c: Zap unnecessary malloc() calls
The malloc() calls are unnecessary, just allocate the stuff on stack.
While at it, reorder the code a little, so that only one variable is
used for the text, use snprintf() instead of sprintf() and use %01d
as a formatting string to avoid any possible overflows.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-12-30 14:05:48 +01:00
Pierre Aubert
248802d401 imx SPL: enable boot from eMMC boot partitions.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
2014-12-30 14:05:36 +01:00
Soeren Moch
dd1c8f1b5f sata: fix reset_sata for dwc_ahsata
- fix crash when sata device is not initialized
- remove disable_sata_clock() since it is not clear which clock for which
  device should be disabled here
- call disable_sata_clock() for mx6 in preboot_os instead

Signed-off-by: Soeren Moch <smoch@web.de>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-12-01 10:20:19 +01:00
Nikita Kiryanov
44b9841d78 arm: imx: stop sata on boot
Ideally, the Linux kernel should get the hardware in its most
untouched state. For the most part, U-Boot does not reset the various
subsystems it touches before boot, and usually Linux deals with it, but
on some boards (cm_fx6) the Linux kernel fails to detect the ssd
correctly if sata is used by U-Boot.

Power off sata on OS boot so that Linux will have a clean state to work
with.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
2014-11-24 12:10:08 +01:00
Ye.Li
7a26416847 mx6: thermal: Check cpu temperature via thermal sensor
Add imx6 thermal device to mx6 soc file. Read the cpu temperature
using this device to access onchip thermal sensor.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-11-21 15:30:12 +01:00
Fabio Estevam
32c81ea65c imx: consolidate set_chipselect_size function
Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.

While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20 10:30:19 +01:00
Fabio Estevam
53b7f18044 mx6: Use a common SPL configuration file
Many boards use a minimal .cfg file in the SPL case.

Introduce spl_sd.cfg so that we can reuse it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-20 10:30:18 +01:00
Nikolay Dimitrov
11076f0cac mx6: video_skip: Fix crash on NULL pointer
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
Cc: Stefano Babic <sbabic@denx.de>
2014-11-13 17:56:15 +01:00
Nikita Kiryanov
f2863ff3f4 arm: imx: make bmode command work with SPL/U-Boot combo
The bmode command forces the SoC to use a specific boot device
by writing its boot mode into SRC_GPR9, and notifying the SoC of
the change using SRC_GPR10[28] bit: if the bit is on, bootROM
uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine
the boot device.

SPL on the other hand is oblivious to this distinction, so once
the bootROM loads SPL from the device configured in SRC_GPR10,
SPL will attempt to load U-Boot from the device configured in
SRC_SMBR1, which is not updated by the bootROM to the value in
SRC_GPR9.

The result is that the selected boot device is not used across all
the boot stages.

Update spl_boot_device() to look at gpr9 when necessary.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
2014-11-12 09:03:54 +01:00
Tom Rini
625509ab0e Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2014-11-05 12:48:09 -05:00
Ye.Li
8fe280f330 imx: mx6 sabreauto: Add board support for USB EHCI
On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the problem by adding the board support codes.

Since the power control uses the GPIO pin from port expander MAX7310,
the PCA953X driver is enabled for accessing the MAX7310.

The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting
its daisy chain. Add a new function "imx_iomux_set_gpr_register" to
handle GPR register setting.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-03 11:21:49 +01:00
Ye.Li
1a1f795078 imx: gpt: Add High frequency clock source support for GPT
Introduce a new configuration "CONFIG_MXC_GPT_HCLK". When it is set,
the GPT will select a high frequency clock as clock source.
Otherwise, the GPT will stay to use 32Khz OSC as clock source.

In the implementation, since only the GPT on i.MX6 series provide the
clock source option for 24Mhz OSC. For others (only i.MX5 and i.MX6
compile the driver), if the configuration is set, the perclk will be
selected as clock source.
MX6Q/D Rev 1.0 and MX6SL are special in the implementation, because they
don't have the 24Mhz OSC clock source option, so also select the perclk
for them. For MX6SL, we will set the OSC 24Mhz to perclk in CCM, so
eventually the clock comes from OSC 24Mhz.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-03 11:21:41 +01:00
Guillaume GARDET
205b4f33cf Rename some defines containing FAT in their name to be filesystem generic
Rename some defines containing FAT in their name to be filesystem generic:
MMCSD_MODE_FAT => MMCSD_MODE_FS
CONFIG_SPL_FAT_LOAD_ARGS_NAME => CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME => CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION => CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
2014-10-27 11:04:01 -04:00
Tom Rini
0ce4af99c0 Merge branch 'master' of git://git.denx.de/u-boot-imx 2014-10-27 09:08:42 -04:00
Jeroen Hofstee
5624c6bd4e imx: add missing includes
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-25 15:27:35 -04:00
Simon Glass
c6f3f32356 dm: imx: i2c: Use gpio_request() to request GPIOs
GPIOs should be requested before use. Without this, driver model will
not permit the GPIO to be used.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2014-10-22 10:36:55 -06:00
Simon Glass
edbf8b4f8c imx: Add error checking to setup_i2c()
Since this function can fail, check its return value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-10-22 10:36:55 -06:00
Eric Nelson
a5a9fba42b ARM: i.MX video: declare displays and display_count publicly
Declare displays[] and display_count in imx-common/video.h to
prevent "Should it be static?" messages when compiling board
files with "make C=1".

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-21 10:47:14 +02:00
Marek Vasut
fcfdfdd58c ARM: mx6: Prevent overflow in DRAM size detection
The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2014-08-20 12:21:57 +02:00
Fabio Estevam
0a11d6f29c mx6: Remove duplication of iomuxc structure
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.

The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.

So remove iomuxc_base_regs structure and use iomuxc instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-07-23 12:25:41 +02:00
Stefano Babic
dab5e3469d Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>

Conflicts:
	boards.cfg
2014-07-16 08:51:30 +02:00
Fabio Estevam
05d54b827f mx6: Add support for the mx6solox variant
mx6solox is the newest member of the mx6 family.

Some of the new features on this variants are:
- Cortex M4 microcontroller (besides the CortexA9)
- Dual Gigabit Ethernet

Add the initial support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10 15:29:16 +02:00
Albert ARIBAUD
d6694aff56 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2014-06-30 23:00:34 +02:00