Commit graph

10 commits

Author SHA1 Message Date
Tien Fong Chee
1085bb3cba spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
0a42a132a4 ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
c1cf539180 ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Tien Fong Chee
f4b53b24d0 ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
Ensure all the debug messages are always prefix with "FPGA: " and comment
beginning with uppercase letter.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:10 +02:00
Simon Goldschmidt
d5de3d4978 arm: socfpga: fpga: fix type of local variable
The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-31 01:41:10 +01:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Tien Fong Chee
4ae87a83a6 arm: socfpga: Fix with the correct polling on bit is set
Commit 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.

Fixes: 2baa997240 ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-04-27 01:04:08 +02:00
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Tien Fong Chee
2baa997240 arm: socfpga: Add FPGA driver support for Arria 10
Add FPGA driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-07-26 10:31:44 +02:00