Commit graph

29 commits

Author SHA1 Message Date
Fabio Estevam
05d4df1d8a mx6: Allow mx6 to access the IPUv3 registers
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10 11:35:38 +02:00
Fabio Estevam
fff6ef72b3 mx53: Allow IPUv3 driver to also work on mx53
Adjust the IPU base registers so that ipuv3 driver can work on both mx51 and
mx53 SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-25 10:36:29 +02:00
Stefano Babic
c4559daa91 MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:

"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"

The values are currently negated in code - fixed.

Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-05-15 08:31:35 +02:00
Fabio Estevam
54cd1dee8f mx53loco: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.

The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.

Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Fabio Estevam
1fc56f1cb0 mx53loco: Allow to print CPU information at a later stage
Print CPU information within board_late_init().

This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Fabio Estevam
70cc86a630 mx5: Add clock config interface
mx5: Add clock config interface

Add clock config interface support, so that we
can configure CPU or DDR clock in the later init

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Fabio Estevam
6a376046ef imx-common: Factor out get_ahb_clk()
get_ahb_clk() is a common function between mx5 and mx6.

Place it into imx-common directory.

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:32 +02:00
Stefano Babic
8c38b5d03d MX53: add function to set SATA clock to internal
The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.

As stated by Freescale's support:

Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
	SATA_ALT_REF_CLK[1:0] (offset 0x180C)

'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
d87c85ce43 MX5: Add definitions for SATA controller
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
2012-05-15 08:31:30 +02:00
Stefano Babic
4a9677e53f Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:30 +02:00
Vikram Narayanan
a9407f2bc5 imx: Remove unneeded/repititive definitions from imx headers
Remove gpio related unused/repititive definitions from imx headers.

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-04-16 14:53:59 +02:00
Eric Nelson
08c61a589b mxc_spi: move machine specifics into CPU headers
Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU

Introduce two new macros to control conditional setup
     MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x)
     MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x)

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Wolfgang Grandegger
5d2947a3fc USB: MX5: add helper functions to enable USB clocks
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>

V2: Fix spacing in crm_regs.h
2011-12-11 14:49:25 +01:00
Stefano Babic
40f6fffee5 MX: serial_mxc: cleanup removing nasty #ifdef
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port>
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Helmut Raiger <helmut.raiger@hale.at>
CC: John Rigby <jcrigby@gmail.com>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-12-06 23:59:40 +01:00
Fabio Estevam
77f11a99e1 imx: fix coding style
Fix checkpatch warning and errors in several i.MX related files.

While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c
regarding the usage of extern in a C file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-10-27 21:56:32 +02:00
Marek Vasut
bf2eaf5112 MX5: Modify the PLL decoding algorithm
The PLL decoding algorithm didn't take into account many configuration bits.
Adjust it according to Linux kernel. Also, add PLL4 for MX53.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Hui <jason.hui@linaro.org>
Tested-by: Jason Liu <Jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
8edcc6f221 FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.h
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-09-30 22:01:03 +02:00
Stefano Babic
7d8d0b1a4a MX5: make use of GPIO framework for MX5 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
David Jander
9db1bfa110 ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
2011-09-04 11:36:11 +02:00
Stefano Babic
0edf8b5b2f MX5: Update to autogenerated asm-offsets.h
On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Fabio Estevam
a6e961c292 MX5: Introduce a function for setting the chip select size
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
Fabio Estevam
a682b3f76b MX5: Add iomux structure
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
Fabio Estevam
ac4020e3c0 MX5: Make the weim structure complete
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
Stefano Babic
ac87c17d34 SPI: mxc_spi: replace fixed offsets with structures
This patch cleans driver code replacing all accesses
to registers with fixed offsets with a corresponding
structure.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:43 +01:00
Liu Hui-R64343
595f3e5645 MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor,

- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro

Signed-off-by: Jason Liu  <r64343@freescale.com>
2011-02-02 00:54:41 +01:00
Liu Hui-R64343
565e39c577 imx: Get fec mac address from fuse
The patch is to support getting FEC MAC address from fuse bank.

Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
2010-11-21 18:24:20 +01:00
Shawn Guo
1ab027cbf6 mx51evk: support new relocation scheme
This patch is to fix build breakage and support new relocation
scheme for mx51evk.

- Correct IRAM base address and add size definition

  The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
  0x1FFE8000 which is for older revision.

- Include imx-regs.h in mx51evk.h

  Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
  referred to.

- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE

  They are used to define init RAM layout.

- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
  buried by Wolfgang's commit below

  25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
2010-10-28 11:43:23 +02:00
Stefano Babic
575001e40c MX51: Add IPU driver for video support
The patch is a porting of the IPU Linux driver
developed by Freescale to have framebuffer
functionalities in u-boot. The port is based on
kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f,
as delivered by Freescale [i.MX BSP].
Most features are dropped from the original driver and
only LCD support is the goal of this porting.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-22 00:05:05 +02:00
Jason Liu
ff9f475d5d MX5: rename mx51 to mx5
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-18 10:43:19 +02:00