Commit graph

24 commits

Author SHA1 Message Date
Stefan Roese
5d1c883329 ppc4xx: Canyonlands/Glacier: Squeeze NAND image a bit to fit again
This patch removes some superfluous SDRAM init calls to fit the
NAND_SPL image into 4k again.

Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-03 11:29:07 +02:00
Wolfgang Denk
3b258e2e58 Fix build issues cause by LDFLAGS_FINAL changes
Commit 6dc1ece "Introduce a new linker flag LDFLAGS_FINAL" modified a
number of Makefiles in a way that broke out-of-tree builds.  The
problem was that $(nandobj) was used before it got defined.

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-03-31 23:38:16 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Haiying Wang
6dc1eceb9c Introduce a new linker flag LDFLAGS_FINAL
commit 8aba9dceeb
Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS

breaks the usage of --gc-section to build nand_spl. We still need linker option
--gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes
the --gc-sections to each uboot image.

To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace
PLATFORM_LDFLAGS in the Makefile of each nand_spl board.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2011-03-22 23:32:06 +01:00
Scott Wood
767589a7b2 powerpc/nand spl: link libgcc
Recent GCC (4.4+) performs out-of-line epilogues in some cases, when
optimizing for size.  It causes a link error for _restgpr_30_x (and similar)
if libgcc is not linked.

It actually increases size with very small binaries, due to the fixed size
of the out-of-line code, and not having any functions that actually need to
restore more than 2 or 3 registers.  But I don't see a way to turn it off,
other than asking GCC to optimize for speed -- which may also increase
size for some boards.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-12-16 14:54:03 -06:00
Wolfgang Denk
ee8028b7f1 ppc4xx: Cleanup for partial linking and --gc-sections
This commit adapts 4xx boards for partial linking with --gc-sections.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: David Updegraff <dave@cray.com>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Larry Johnson <lrj@acm.org>
Cc: Peter De Schrijver <p2@mind.be>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Daniel Poirot <dan.poirot@windriver.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-11-27 23:35:09 +01:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Stefan Roese
5e7abce991 ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.

This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
a47a12becf Move arch/ppc to arch/powerpc
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.

Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
2010-04-21 23:42:38 +02:00
Peter Tyser
8d1f268204 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:16 +02:00
Wolfgang Denk
1aada9cd64 Fix all linker scripts for older binutils versions (pre-2.16)
Commit f62fb99941 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME().  Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.

This patch makes it work again.  This is done by omitting the use of
these functions for such old tool chains.  This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.

As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.

Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
2009-08-21 23:13:34 +02:00
Stefan Roese
82a7edc7ea ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM's
Some Canyonlands boards are equipped with different SODIMM's. This is no
problem with the "normal" NOR booting Canyonlands U-Boot, since it
automatically detects the SODIMM's via SPD data and correctly configures
them. But the NAND booting version is different. Here we only have 4k
of image size to completely setup the hardware, including DDR2 setup.
So we need to use a fixed DDR2 setup here. This doesn't work for different
SODIMM's right now.

Currently only this Crucial SODIMM is support:
CT6464AC667.8FB (dual ranked)

Now some boards are shipped with this SODIMM:
CT6464AC667.4FE (single ranked)

This patch now supports both SODIMM's by configuring first for the dual
ranked DIMM. A quick shows, if this module is really installed. If this test
fails, the DDR2 controller is re-configured for the single
ranked SODIMM.

Tested with those SODIMM's:

CT6464AC667.8FB (dual ranked)
CT6464AC667.4FE (single ranked)

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
12582ac771 nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:02 -05:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Kenneth Johansson
2918eb9d42 Remove shell variable UNDEF_SYM.
UNDEF_SYM is a shell variable in the main Makefile used to force the
linker to add all u-boot commands to the final image. It has no use here.

Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
2008-06-03 20:36:18 +02:00
Stefan Roese
fdd1247a66 ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-14 12:26:16 +02:00
Stefan Roese
4f27098e5b ppc4xx: Adapt Canyonlands fixed DDR2 setup to new DIMM module
This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
used for NAND booting to match the values needed for the new 512MB
DIMM modules shipped with the productions boards:

Crucial: CT6464AC667.8FB

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30 14:51:36 +02:00
Stefan Roese
499e7831e1 ppc4xx: Change Canyonlands to support booting from 2k page NAND devices
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:49 +02:00
Stefan Roese
5e182dce04 ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:39 +02:00
Stefan Roese
71665ebf88 ppc4xx: Add Canyonlands NAND booting support
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.

This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.

Tested with 512 byte page NAND device (32MByte) on Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00