Commit graph

147 commits

Author SHA1 Message Date
Gabor Juhos
b2fe86f887 MIPS: start.S: save reused arguments earlier in relocate_code
Save the reused parameters at the beginning
of the 'relocate_code' function. This makes
the function a bit more readable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:59 +01:00
Gabor Juhos
f321b0f99f MIPS: start.S: set sp register directly
The current code uses two instructions to load
the stack pointer into the 'sp' register.

This results in the following assembly code:

    468:   3c088040        lui     t0,0x8040
    46c:   251d0000        addiu   sp,t0,0

The first instuction loads the stack pointer into
the 't0' register then the value of the 'sp' register
is computed by adding zero to the value of the 't0'
register. The same issue present on the 64-bit version
as well:

    56c:   3c0c8040        lui     t0,0x8040
    570:   659d0000        daddiu  sp,t0,0

Change the code to load the stack pointer directly
into the 'sp' register. The generated code is functionally
equivalent to the previous version but it is simpler.

  32-bit:
    468:   3c1d8040        lui     sp,0x8040

  64-bit:
    56c:   3c1d8040        lui     sp,0x8040

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:51 +01:00
Gabor Juhos
5b7dd8163d MIPS: start.S: fix boundary check in relocate_code
The loop code copies more data with one than
necessary due to the 'ble' instuction. Use the
'blt' instruction instead to fix that.

Due to the lack of suitable hardware the Xburst
specific code is compile tested only. However the
change is quite obvious.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-27 16:39:43 +01:00
Gabor Juhos
14fdd1a8bf MIPS: start{, 64}.S: fill branch delay slots with NOP instructions
The romReserved and romExcHandle handlers are
accessed by a branch instruction however the
delay slots of those instructions are not filled.

Because the start.S uses the 'noreorder' directive,
the assembler will not fill the delay slots either,
and leads to the following assembly code:

  0000056c <romReserved>:
   56c:   1000ffff        b       56c <romReserved>

  00000570 <romExcHandle>:
   570:   1000ffff        b       570 <romExcHandle>

In the resulting code, the second branch instruction
is placed into the delay slot of the first branch
instruction, which is not allowed on the MIPS
architecture.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-01-22 21:09:34 +01:00
Zhi-zhou Zhang
0d69d918ab MIPS: fix a latent bug on initialize $gp
If bal is 8 bytes aligned, the _gp will not be 8 bytes aligned.
then the following ld insntrustion generates a Adel exception.
So here make _gp be always aligned in 8 bytes.

Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-12-08 21:33:07 +01:00
Tom Rini
d41b3cc16f Merge branch 'master' of git://git.denx.de/u-boot-mips 2012-11-27 20:34:51 -07:00
Zhi-zhou Zhang
8ab36d2e54 MIPS: do not initialize timestamp variable before relocate_code
Because timestamp is declared as `static', we needn't initialize
it by writing it a zero. If we do it before relocate_code, we
will write into a flash address(0xffffffffbfc0xxxx).

Signed-off-by: Zhi-zhou Zhang <zhizhou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-11-25 21:50:43 +01:00
Ilya Yanok
c60795f41d usb: use linux/usb/ch9.h instead of usbdescriptors.h
Linux usb/ch9.h seems to have all the same information (and more)
as usbdescriptors.h so use the former instead of the later one.

As a consequense of this change USB_SPEED_* values don't correspond
directly to EHCI speed encoding anymore, I've added necessary
recoding in EHCI driver. Also there is no point to put speed into
pipe anymore so it's removed and a bunch of host drivers fixed to
look at usb_device->speed instead.

Old usbdescriptors.h included is not removed as it seems to be
used by old USB device code.

This makes usb.h and usbdevice.h incompatible. Fortunately the
only place that tries to include both are the old MUSB code and
it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute
on musb_regs structure but this attribute seems to be unneeded
(old MUSB code doesn't support any DMA at all).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-11-20 00:16:06 +01:00
Tom Rini
d1ff690612 Merge branch 'master' of git://git.denx.de/u-boot-mips 2012-10-17 08:57:13 -07:00
Pavel Herrmann
4d1361d867 split AU1X00 specific code from cmd_ide.c
move special case of ide_swap_read() for AU1X00 SoC into SoC-specific directory.

Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
2012-10-17 07:59:09 -07:00
Marek Vasut
ec3fd68952 serial: Use default_serial_puts() in drivers
Replace the in-place ad-hoc implementation of serial_puts() within
the drivers with default_serial_puts() call. This cuts down on the
code duplication quite a bit.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
2012-10-17 07:55:50 -07:00
Zhi-zhou Zhang
32afad783e MIPS: add board qemu-mips64 support
Both big-endian and little-endian are tested with below commands:
Rom version: (Default, Now we config it as rom version)
qemu-system-mips64el -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
qemu-system-mips64 -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic
Ram version:
qemu-system-mips64el -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic
qemu-system-mips64 -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-10-16 15:02:08 +02:00
Zhi-zhou Zhang
cb0a6a1ecc MIPS: don't use camel-case style
Replace camel-case style with upper-case style globally.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
2012-10-16 15:02:08 +02:00
Lucas Stach
c7e3b2b586 usb: lowlevel interface change to support multiple controllers
Carry an index in the lowlevel usb functions to make specify the
respective usb controller.

Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2012-10-15 11:54:00 -07:00
Marek Vasut
a382725060 serial: Remove CONFIG_SERIAL_MULTI from serial drivers
Remove the support for not-CONFIG_SERIAL_MULTI part from serial
port drivers and some board files. Since CONFIG_SERIAL_MULTI is
now enabled by default, that part is a dead code. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
2012-10-15 11:53:58 -07:00
Marek Vasut
6cb3273d11 serial: mips: Implement CONFIG_SERIAL_MULTI into JZ serial driver
Implement support for CONFIG_SERIAL_MULTI into JZ serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the JZ driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
0191142283 serial: mips: Implement CONFIG_SERIAL_MULTI into asc serial driver
Implement support for CONFIG_SERIAL_MULTI into asc serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the asc driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Marek Vasut
7b953c5165 serial: mips: Implement CONFIG_SERIAL_MULTI into au1x00 serial driver
Implement support for CONFIG_SERIAL_MULTI into au1x00 serial driver.
This driver was so far only usable directly, but this patch also adds
support for the multi method. This allows using more than one serial
driver alongside the au1x00 driver. Also, add a weak implementation
of default_serial_console() returning this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-10-15 11:53:51 -07:00
Daniel Schwierzeck
0efcdb15f9 MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefiles
Prepare for upcoming MIPS64 CPU support.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:47 +02:00
Daniel Schwierzeck
2c0e3de384 MIPS: factor out endianess flag handling to arch config.mk
This is CPU independent and should be configured architecture-wide.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:43 +02:00
Marek Vasut
8b82cefbfc dm: mips: Fix lb60 timer code
The timer code contains more halfword writes which trigger gcc errors.
The registers are again 32bit, yet written by 16bit writes, fix this:

timer.c: In function ‘reset_timer_masked’:
timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘get_timer_masked’:
timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c: In function ‘timer_init’:
timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2012-08-17 20:13:48 +02:00
Marek Vasut
36d0a42b68 dm: mips: Fix lb60 WDT control
Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2012-08-17 20:13:48 +02:00
Joe Hershberger
10cbe3b6a4 net: Fix remaining API interface breakage
These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm.  I have no compiler for them, but
the remaining issues should be far less than without this patch.

Any outstanding issues are left to the maintainers of boards that use
these drivers.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-05-23 14:19:21 -05:00
Daniel Schwierzeck
6cb461b4f1 MIPS: fix endianess handling
Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through
endianess options to LD.

Build tested with:
 - ELDK 4 mips_4KC- and mips4KCle
 - Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-04-02 15:54:53 +02:00
Daniel Schwierzeck
979cfeaf36 MIPS: fix inconsistency in config option for cache operation mode
Commit ab2a98b117 missed to
use the new config option in dcache_enable().

Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-04-02 15:54:53 +02:00
Mike Frysinger
5b84dd67cf usb: replace wait_ms() with mdelay()
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func.  This also fixes the build errors:

ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-03-19 00:08:16 +01:00
Anatolij Gustschin
c4c9fbebae consolidate mdelay by providing a common function for all users
There are several mdelay() definitions in the driver and
board code. Remove them all and provide a common mdelay()
in lib/time.c.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-22 01:16:08 +02:00
Xiangfu Liu
80421fcc3e MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator.  Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.

JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.

On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application.  NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.

For more info about Ingenic XBurst Jz4740:
  http://en.ingenic.cn/eng/
  http://www.linux-mips.org/wiki/Ingenic

This patch introduces XBurst CPU support in U-Boot.  It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-10 22:06:12 +09:00
Yao Cheng
dc344589de MIPS: mips32: fix wrong loop bound in flush_cache()
The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters
a wrong flushing loop.

Signed-off-by: Yao Cheng <saturdaycoder@gmail.com>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-09-03 10:43:45 +09:00
Daniel Schwierzeck
ab2a98b117 MIPS: make cache operation mode configurable
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Daniel Schwierzeck
7185adb48e MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Graeme Russ
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
Shinya Kuribayashi
68cebb8027 MIPS: Move timer code to arch/mips/cpu/$(CPU)/
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

With this change, each $(CPU)/ directory can have its own timer code.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-10 00:12:31 +09:00
Shinya Kuribayashi
7aa1f198c8 MIPS: Coding style cleanups on common assembly files
Fix style issues and alignments globally.  No logical changes.
- Replace C comments with AS line comments where possible
- Use ifndef where possible, rather than if !defined for simplicity
- An instruction executed in a delay slot is now indicated by a leading
  space, not by C comment

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Shinya Kuribayashi
522171a087 MIPS: Remove mips_cache_lock() feature
As requested in commit e1390801a3 ([MIPS]
Request for the 'mips_cache_lock()' removal), such feature is no longer
needed for current MIPS implementation of U-Boot, and no one in the tree
uses it for years.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-05-07 00:18:13 +09:00
Daniel Schwierzeck
ea2f0cb35c MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory
Au1x00 is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
6235df946e MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
IncaIP is a SoC and its specific code should reside in an own
SoC subdirectory. Also add -mtune=4kc flag for CPU optimization.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
04efda7afc MIPS: Optimize the setup of CPU optimization flags
The current MIPS CPU config.mk code always expects a MIPS 4kc
core. This is not appropiate for other CPUs and SoCs.

Replace the current MIPSFLAGS code by cc-option macro and use
-march=mips32r2 as default optimization level for all MIPS32 CPUs.

Note: Since commit f62fb99941 all
toolchains with binutils prior to v2.16 are not working anymore.
As agreed with Shinya Kuribayashi the support for those toolchains
will be dropped officially with this patch.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
91809608a4 MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
All current CPUs and SoCs are based on MIPS32 arch. The complete
code resides in the global arch/mips/cpu directory. This is not
suitable if other MIPS architectures like MIPS64 or Octeon should
be supported in the future.

To achieve this the current CPU code is moved to its own mips32
subdirectory. All MIPS32 boards have to use mips32 as config switch
in board.cfg.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Daniel Schwierzeck
b38a569901 MIPS: Purple: Remove Purple support
The Purple SoC and eval board are not actively maintained since years.
This patch removes the support completely as aggreed with Wolfgang Denk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-04-02 22:07:12 +09:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wolfgang Denk
25ddd1fb0a Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
being able to use "sizeof(struct global_data)" in assembler files.
Recent experience has shown that manual synchronization is not
reliable enough.  This patch renames CONFIG_SYS_GBL_DATA_SIZE into
GENERATED_GBL_DATA_SIZE which gets automatically generated by the
asm-offsets tool.  In the result, all definitions of this value can be
deleted from the board config files.  We have to make sure that all
files that reference such data include the new <asm-offsets.h> file.

No other changes have been done yet, but it is obvious that similar
changes / simplifications can be done for other, related macro
definitions as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:05:30 +02:00
Mike Frysinger
5700bb6352 miiphy: constify device name
The driver name does not need to be writable, so constify it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:29 -07:00
Wolfgang Denk
cdb749778a Rename getenv_r() into getenv_f()
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function.  This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).

Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.

To avoid confusion, rename into getenv_f() [as "running from flash"]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-08-04 00:45:36 +02:00
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Peter Tyser
1e3827d9cf mips: Move cpu/mips/* to arch/mips/cpu/*
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:25 +02:00