The "-ffixed-r15" option doesn't work well for gcc4. Since we
don't use gp for small data with option "-G0", we can use gp
as global data pointer. This allows compiler to use r15. It
is necessary for gcc4 to work properly.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds the driver of altera spi controller, which is
used as epcs/spi flash controller. It also works with mmc_spi
driver.
This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds gpio support of Altera PIO component to the
nios2-generic board. Though it drives only gpio_led at the
moment, it supports bidirectional port to control bit-banging
I2C, NAND flash busy status or button switches, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds a status led driver followed the GPIO access
conventions of Linux. The led mask is used to specify the gpio pin.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds driver for a trivial gpio core, which is described
in http://nioswiki.com/GPIO. It is used for gpio led and nand flash
interface in u-boot.
When CONFIG_SYS_GPIO_BASE is not defined, board may provide
its own driver.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds support for full MII interface on MCF5445x (in contrast
to RMII as used on the evaluation boards).
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
This patch adds the possibility to handle seperate PHYs to MCF5445x.
Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the
linux kernel.
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
create_pipe() can give wrong result if an expression is passed as the 'endpoint'
argument -- due to missing parentheses.
Thanks to Martin Mueller for finding the bug and providing the patch.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain. On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.
So wait for the buffer to drain once we're done writing to it.
Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about
wrong syntax in system includes.
In file included from /usr/include/stdio.h:444,
from ../source/u-boot/include/compiler.h:26,
from ../source/u-boot/lib/crc32.c:15:
/usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list
This can be fixed by reverting the workaround for prior OS X releases in
config.mk conditionally for OS X 10.6+.
Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem.
Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Fix the following compiler problems:
arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay':
/home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay'
lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here
lib/libgeneric.a(time.o): In function `udelay':
time.c:(.text+0x1c): undefined reference to `__udelay'
Signed-off-by: Wolfgang Denk <wd@denx.de>
call to reset PHY chip.
Current PHY Software Reset operation in guruplug does not
poll reset bit in control register to go to 0(auto clearing)
for making sure reset was successful.This patch uses standard
miiphy call miiphy_reset to make sure proper PHY reset operation.
Signed-off-by: Mahavir Jain <mjain@marvell.com>
commit c7190f028f "mpc83xx:
retain POR values of non-configured ACR, SPCR, SCCR, and LCRR
bitfields" incorrectly shifted <register>_<bitfield> (e.g.
ACR_PIPE_DEP) values that were preshifted by their
definition in mpc83xx.h.
this patch removes the unnecessary shifting for the newly
utilized mask values in cpu_init.c, and prevents seemingly
unrelated symptoms such as an mpc8379erdb board from
locking up whilst performing a networking operation,
e.g. a tftp.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
"down_write_trylock" needs to return 1 instead of 0 for success.
Otherwise copying a block with a read error (e.g. bit-flip on read)
won't work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
The current U-Boot UBI implementation is copied from Linux. In this
porting the UBI background thread was not handled correctly. Upon write
operations ubi_wl_flush() makes sure, that all queued operations, like
page-erase, are completed. But this is missing for read operations.
This patch now makes sure that such operations (like scrubbing upon
bit-flip errors) are not queued, but executed directly.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a
number of "passing argument 2 of 'out_be32' makes integer from pointer
without a cast" warnings; fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Modification of print_size to avoid use of divides and especially
long long divides. Keep the binary scale factor in terms of bit
shifts instead. This should be faster, since the previous code
gave the compiler no clues that the divides where always powers
of two, preventing optimisation.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Acked-by: Timur Tabi <timur@freescale.com>
This patch sets the SICRL_LBC bits in SICRL to change the function of the
associated pins to GPIO functionality.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
commit 167cdad137 "SERIAL: Enable
port-mapped access" inadvertently broke 83xx nand boards by
converting NS16550_init to use io accessors, which expanded
the size of the generated code.
this patch fixes the problem by removing icache functions from
the nand builds, which somewhat follows commit
1a2e203b31 "mpc83xx: turn on icache
in core initialization to improve u-boot boot time"
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch removes the checkboard function from the build of
the 4k bootstrap section for the SIMPC8313 as it is not needed
in the spl build. This will allow > 100 bytes of extra room
for other uses.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Due to some overlapping sections it's time to update TEXT_BASE
for this board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Fix MVBLM7 and MVSMR Makefiles for correct out-of-tree building
(create "bootscript.img" in build directory instead of source
directory) and cleanup (remove "bootscript.img" when cleaning up).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Commit 77c1458d caused the following compiler warnings:
fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type
fsl_esdhc.c: In function 'esdhc_setup_data':
fsl_esdhc.c:169: warning: unused variable 'wml_value'
fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:164: warning: control reaches end of non-void function
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dipen Dudhat <dipen.dudhat@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3.
The difference has ben examined and the code is compatible.
Speed bins is not verified on hardware for CL7 at this moment.
This patch also enables SPD Rev 1.x where x is up to "F". According to SPD
spec, the lower nibble is optionally used to determine which additinal bytes
or attribute bits have been defined. Software can safely use defaults. However,
the upper nibble should always be checked.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the MPC85xx platform if we have SATA its connected on SERDES.
Determing if SATA is enabled via sata_initialize should not be board
specific and thus we move it out of the MPC8536DS board code.
Additionally, now that we have is_serdes_configured() we can determine
if the given SATA port is enabled and error out if its not in the
driver.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The new is_serdes_configured covers a broader range of devices than the
PCI specific code. Use it instead as we convert away from the
is_fsl_pci_cfg() code.
Additionally move to setting LAWs for PCI based on if its configured.
Also updated PCI FDT fixup code to remove PCI controllers from dtb if
they are configured.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using PPC I/O accessor to DIU I/O space instead of directly
read/write. It will prevent the dozen of compiler order issue
and PPC hardware order issue for accessing I/O space.
Using the toolchain(tc-fsl-x86lnx-e500-dp-4.3.74-2.i386.rpm)
can show up the order issue of DIU driver.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MC13892 is a Power Controller used with processors
of the family MX.51. The file adds definitions to be used to setup
the internal registers via SPI.
Signed-off-by: Stefano Babic <sbabic@denx.de>
