Commit graph

44 commits

Author SHA1 Message Date
Marek Vasut
0a57a382af pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.1.7
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7796 to
PINCTRL_PFC_R8A77960 .

Also note that a new Kconfig option has been added to enable support
for R8A77961 M3-W+ , the Kconfig option name is PINCTRL_PFC_R8A77961 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-02 01:49:20 +01:00
Marek Vasut
9916e8bfc6 pinctrl: renesas: Synchronize R8A7795 H3 PFC tables with Linux 6.1.7
Synchronize R-Car R8A7795 H3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Note that the Kconfig option name has been updated to match the
Linux kernel Kconfig option name, from PINCTRL_PFC_R8A7795 to
PINCTRL_PFC_R8A77951 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-02 01:49:20 +01:00
Marek Vasut
3e81242160 pinctrl: renesas: Synchronize PFC core with Linux 6.1.7
Synchronize R-Car PFC core with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Parts picked from
pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.18.3
- Add pin groups for the green and high8 subsets of the Video IN pins
- Add MediaLB pins
- Add bias support for various SoCs
- Share more pin group data, to reduce size and ease review
- Miscellaneous cleanups, fixes and improvements.

This contains port of Linux kernel commit
6210905586ae ("pinctrl: renesas: Add shorthand for reserved register fields")
to handle negative entries in GROUP() macros correctly.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-02-02 01:49:20 +01:00
Marek Vasut
df8adad57d pinctrl: renesas: Import R8A779A0 V3U PFC tables
Import R8A779A0 V3U PFC tables from Linux 5.12, commit 9f4ad9e425a1
("Linux 5.12") . Add parts of PFC table integration from
pinctrl: renesas: Add R8A779A0 V3U PFC tables
by Hai Pham <hai.pham.ud@renesas.com>" .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24 20:22:17 +02:00
Marek Vasut
6fc323c1ae pinctrl: renesas: Implement unlock register masks
The V3U SoC has several unlock registers, one per register group. They
reside at offset zero in each 0x200 bytes-sized block.

To avoid adding yet another table to the PFC implementation, this
patch adds the option to specify an address mask instead of the fixed
address in sh_pfc_soc_info::unlock_reg.

This is a direct port of Linux 5.12 commit e127ef2ed0a6
("pinctrl: renesas: Implement unlock register masks") by
Ulrich Hecht <uli+renesas@fpond.eu>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-05-21 15:00:17 +02:00
Lad Prabhakar
220f308a5c pinctrl: renesas: Add support for R8A774C0
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.

This patch hooks R8A774C0 SoC with the pfc driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Lad Prabhakar
8096e2426d pinctrl: renesas: Implement get_pin_muxing() callback
Implement get_pin_muxing() callback so that pinmux status
command can be used on Renesas platforms.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Lad Prabhakar
cc6aa80dd1 pinctrl: renesas: Make sure the pin type is updated after setting the MUX
By default on startup all the pin types are configured to
PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the
pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated
when the pin is set as a function in sh_pfc_pinctrl_pin_set() or
sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if
the pin type is PINMUX_TYPE_NONE ie unused).

So with the current implementation pin functionality could be overwritten
silently, for example if the same pin is added for SPI and serial.

This patch makes sure of updating pin type after every successful call to
sh_pfc_config_mux() and thus fixing from pin functionality to be
overwritten. Also a warning message is printed if the current pin is being
overwritten before abort.

This also avoids pin re-muxing to same type that is for example from
command line device is asked to re-probe/select (mmc dev x) we return
early with success in this case as the pin is already muxed.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-01-18 13:29:12 +01:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Lad Prabhakar
46f3282b28 pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl
Drop unused members from struct sh_pfc_pinctrl.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
975154bc2c pinctrl: renesas: r8a77951: Add R8A774E1 PFC support
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
c5f3762588 pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Tom Rini
4e05c167a7 binman support for FIT
new UCLASS_SOC
 patman switch 'test' command
 minor fdt fixes
 patman usability improvements
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Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-27 11:15:37 -04:00
Masahiro Yamada
2548493ab4 treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-25 14:46:57 -06:00
Adam Ford
43ef80325b pinctrl: renesas: Enable R8A774A1 PFC tables
The PFC tables for the R8A774A1 are already available, but they
not enabled.

This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-07-25 11:16:39 +02:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Masahiro Yamada
60e7fa8b3b treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  expression dev;
  @@
  -devfdt_get_addr(dev)
  +dev_read_addr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-20 11:37:47 -06:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Marek Vasut
f497ec368e pinctrl: renesas: Add R8A77980 V3H PFC tables
Import R8A77980 V3H PFC tables from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
titron
b5f563e588 pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio -input' command
Fix GPIO bank 0 pin 0 request/release off by one error. Without this
patch, it is not possible to request/release GPIO bank 0 pin 0.

Signed-off-by: Tiezhuang Dong <tiezhuang.dong.yh@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-07-29 13:38:55 +02:00
Marek Vasut
5403bec1cb pinctrl: renesas: Remove sh_pfc_config_mux_for_gpio()
This function is now replaced by common pin controller GPIO configuration
functionality, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00
Marek Vasut
89ba7c5a8c pinctrl: renesas: Implement gpio_request_enable/gpio_disable_free
Implement the gpio_request_enable/gpio_disable_free callbacks to let
the GPIO driver call the pin control framework and let it reconfigure
pins as GPIOs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00
Marek Vasut
50e6901fec pinctrl: renesas: Set pin type in sh_pfc_config_mux_for_gpio
Add missing cfg->type = PINMUX_TYPE_GPIO upon successfully setting pin
as a GPIO to retain the pin configuration information.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
2019-05-04 19:26:49 +02:00
Marek Vasut
c6435c317a pinctrl: renesas: Add R8A77965 pin control tables
Add pin control tables for R8A77965 from Linux 5.0 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09 18:19:10 +02:00
Marek Vasut
0ff9e4800f pinctrl: renesas: Fix DRV register offset
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-11-02 15:57:13 +01:00
Marek Vasut
5af6541972 pinctrl: renesas: Fix register usage in sh_pfc_{read,write}
The sh_pfc_{read,write}() must operate on the register address directly
rather than on an offset, fix this to prevent illegal access.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
bf8d2dab38 pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
cb13e46aeb pinctrl: renesas: Initial R8A77990 PFC support
This patch adds initial pinctrl driver to support for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Marek Vasut
d1fe3182fa pinctrl: rmobile: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
34e93605ae pinctrl: rmobile: Import R8A7794 E2 PFC tables
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
ab2d09b4be pinctrl: rmobile: Import R8A7792 V2H PFC tables
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
427c75df5a pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
7547ad4ca0 pinctrl: rmobile: Import R8A7790 H2 PFC tables
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
a59e697618 pinctrl: rmobile: Add R8A77995 D3 PFC tables
Add PFC tables for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
c106bb53ea pinctrl: rmobile: Add R8A77970 V3M PFC tables
Add PFC tables for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09 13:36:26 +01:00
Marek Vasut
f6e545a73f pfc: rmobile: Add hook to configure pin as GPIO
Add hook into the PFC driver to allow the GPIO driver to toggle
GPSR registers into GPIO mode when GPIO is requested.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:21 +01:00
Marek Vasut
2489bb54a5 pinctrl: rmobile: Add support for setting single pins
Add code to handle single pins nodes from DT in addition to already
support groups handling.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:21 +01:00
Marek Vasut
d52132c320 pinctrl: rmobile: Add pinconf to Renesas RCar pincontrol driver
Add pinconf support to the PFC driver, so that it can handle DT
props bias-disable, bias-pull-up, bias-pull-down, drive-strength
and power-source.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-10-04 08:50:43 +09:00
Marek Vasut
910df4d07e pinctrl: rmobile: Add Renesas RCar pincontrol driver
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796
SoCs. This driver uses the PFC pin tables from Linux, thus letting us
share the occassional fixes to those tables. This driver also has a DT
support, so the pinmux is configured from DT instead of the ad-hoc setup
in board file.

This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-09-28 06:54:06 +09:00