Now that we support device tree GPIO bindings directly in the driver model
GPIO uclass we can remove these functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
For GPIOs and other functions we want to look up a phandle and then decode
a list of arguments for that phandle. Each phandle can have a different
number of arguments, specified by a property in the target node. This is
the "#gpio-cells" property for GPIOs.
Add a function to provide this feature, taken modified from Linux 3.18.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add this to the enum so that we can use the various fdtdec functions. A
later commit will move this driver to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 4d3b8a0d fixed a problem with lzma decompress where it would
run out of bytes to decompress. The algorithm needs to know how many
uncompressed bytes it is expected to produce.
However, the fix introduced a potential buffer overrun, and causes
the compression test to fail (test_compression command in sandbox).
The correct fix seems to be to use the minimum of the expected number
of uncompressed bytes and the amount of output space available. That
way things work normally when there is enough space, and return an
error (without overrunning available space) when there is not.
Signed-off-by: Antonios Vamporakis <ant@area128.com>
CC: Kees Cook <keescook@chromium.org>
CC: Simon Glass <sjg@chromium.org>
CC: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
CC: Luka Perkov <luka@openwrt.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This commit adds several APIs to decode PCI device node according to
the Open Firmware PCI bus bindings, including:
- fdtdec_get_pci_addr() for encoded pci address
- fdtdec_get_pci_vendev() for vendor id and device id
- fdtdec_get_pci_bdf() for pci device bdf triplet
- fdtdec_get_pci_bar32() for pci device register bar
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
Commit "initcall: Improve debugging support" makes sense and indeed
simplifies process of matching initcalls executed with static
disassembly.
Until you are debugging relocation functionality.
Existign output may make you think that at some point execution somehow
returned back to non-relocated area. And there're many reasons/problems
that may provoke this behavior.
In order to make things clear let's add explicit mention in case initall
was actually relocated like this:
--->---
initcall: 810015f8
Relocation Offset is: 0efcf000
Relocating to 8ffcf000, new gd at 8fdced3c, sp at 8fdced20
initcall: 810015b8
initcall: 8ffd093c
initcall: 8ffd0a14
initcall: 81001940 (relocated to 8ffd0940)
initcall: 81001958 (relocated to 8ffd0958)
--->---
Note "unexpected" jump from 0x8f... area to 0x81... area.
Without explanation this raises many questions: execution jumped in
relocated area right as expected and then for some reason returned back?
But I hope comment in brackets will save some time for those curious
developers who are careful enough to catch "unexpected jump to pre-reloc
area" or those unlucky ones who'll have to deal with relocation
debugging.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.
This is based on the Linux kernel driver, originally submitted upstream
by Mike Rapoport.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.
Tegra20 and Tegra30 also provide weak symbols for these functions so
that drivers can use the same API irrespective of which SoC they're
being built for.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The AS3722 provides a number of DC/DC converters and LDOs as well as 8
GPIOs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Move GD_BIST from lib/asm-offsets.c to arch/x86/lib/asm-offsets.c
as it is x86 arch specific stuff. Also remove GENERATED_GD_RELOC_OFF
which is not referenced anymore.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The functions error's numbers are standarized - but the error
messages are not.
The errors are often handled with unclear error messages,
so why not use an errno standarized messages.
Advantages:
- This could decrease the binary size.
- Appended with a detailed information,
the error message will be clear.
This commit introduces new function:
- const char *errno_to_str(int errno)
The functions returns a pointer to the errno corresponding text message:
- if errno is null or positive number - a pointer to "Success" message
- if errno is negative - a pointer to errno related message
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Tom Rini <trini@ti.com>
Move strlcpy() definition from drivers/usb/gadget/ether.c to
lib/string.c because it is a very useful function.
Let's add the prototype to include/linux/string.h too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
The fdt_path_offset() checks an alias too.
fdtdec_get_alias_node(blob, "foo") is equivalent to
fdt_path_offset(blob, "foo").
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a new modifier to vsprintf() to print phys_addr_t variables to
avoid having to cast or #ifdef when printing them out. The %pa modifier
is used for this purpose, so phys_addr_t variables need to be passed by
reference, like so:
phys_addr_t start = 0;
printf("start: %pa\n", &start);
Depending on the size of phys_addr_t this will print out the address
with 8 or 16 hexadecimal digits following a 0x prefix.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we scan from left to right looking for the first digit, "i2c0" returns
2 instead of 0 for the alias number. Adjust the code to scan from right to
left instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary blobs
everywhere: so far we have MRC, ME and microcode.
SDRAM init works by setting up various parameters and calling the MRC. This
in turn does some sort of magic to work out how much memory there is and
the timing parameters to use. It also sets up the DRAM controllers. When
the MRC returns, we use the information it provides to map out the
available memory in U-Boot.
U-Boot normally moves itself to the top of RAM. On x86 the RAM is not
generally contiguous, and anyway some RAM may be above 4GB which doesn't
work in 32-bit mode. So we relocate to the top of the largest block of
RAM we can find below 4GB. Memory above 4GB is accessible with special
functions (see physmem).
It would be possible to build U-Boot in 64-bit mode but this wouldn't
necessarily provide any more memory, since the largest block is often below
4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large
ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit
kernels directly so this does not pose a limitation in that area. Also there
are probably parts of U-Boot that will not work correctly in 64-bit mode.
The MRC is one.
There is some work remaining in this area. Since memory init is very slow
(over 500ms) it is possible to save the parameters in SPI flash to speed it
up next time. Suspend/resume support is not fully implemented, or at least
it is not efficient.
With this patch, link boots to a prompt.
Signed-off-by: Simon Glass <sjg@chromium.org>
The built in self test value is available in register eax on start-up. Save
it so that it can be accessed later. Unfortunately we must wait until the
global_data is available before we can do this, so there is a little bit of
shuffling to keep it around.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Permit decoding of a named memory region from the device tree. This allows
easy run-time configuration of the address of on-chip SRAM, SDRAM, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Flash regions can optionally be compressed or hashed. Add the ability to
read this information from the flashmap.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Use the correct FDT data types for this function. Also add more debugging.
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.
In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.
Moreover, we are suffering from too cluttered include/common.h.
This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.
Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible
and safer than DIV_ROUND.
For example,
foo = DIV_ROUND_CLOSEST(x, y++)
works expectedly, but
foo = DIV_ROUND(x, y++)
does not. (y is incremented twice.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Use inttypes.h and uint64_t to correct the code so that it will not issue
warnings on 64-bit machines where 'uint64_t' is 'unsigned long'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Unfortunately 'unsigned long long' and 'uint64_t' are not necessarily
compatible on 64-bit machines. Use the correct typedef instead of
writing the supposed type out in full.
Signed-off-by: Simon Glass <sjg@chromium.org>
The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.
Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).
This commit moves the definition and the document in README to
Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The fdtdec_pci_get_bdf() function returns the bus, device, function
triplet of a PCI device by parsing the "reg" property according to the
PCI device tree binding.
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
