Commit graph

225 commits

Author SHA1 Message Date
Simon Glass
843c9e8796 dm: Add spi.h header to a few files
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:47 -06:00
Simon Glass
110bdee00f sandbox: Convert SPI flash emulation to use sf_params
At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.

This enables us to expand the number of chips that sandbox supports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-26 15:00:36 -06:00
Stefan Roese
31969b8993 sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.

Tested on Marvell DB-78460-BP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:46:25 +05:30
Nikita Kiryanov
88e34e5ff7 spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*
Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in
SPL. These #defines do not allow the user to select SPI mode for the SPI flash
(there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in
spi_spl_load.c), and duplicate information already provided by
CONFIG_SF_DEFAULT_* #defines.

Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead.

Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Hannes Petermaier <hannes.petermaier@br-automation.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:40:10 +05:30
Nikita Kiryanov
01d2aaf61b mtd: spi: add support for M25PE16 and M25PX16
Add support for M25PE16 and M25PX16

Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:25:16 +05:30
Simon Glass
bf1a86fca0 sf: Add an empty entry to the parameter list
The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-23 12:44:30 -06:00
Stefano Babic
e82abaeb7f Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-08-11 10:21:03 +02:00
Marek Vasut
a52a178f0b sf: sf_ops: Stop leaking memory
It's usually a common pattern to free() the memory that we allocated.
Implement this here to stop leaking memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-06 00:18:01 +05:30
Heiko Schocher
562f8df18d spi: add config option to enable the WP pin function on st micron flashes
enable the W#/Vpp signal to disable writing to the status
register on ST MICRON flashes like the N25Q128 thorugh
the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-07-23 12:26:45 +02:00
Poddar, Sourav
1f436a6ddf sf: probe: Fix quad bit set path
Currently, flash quad bit is set in "spi_flash_validate_params" and later
at the end in the same api, we write 0 to status register for few flashes,
thereby overriding the quad bit set. This fix moves the quad bit setting
outside this api in "spi_flash_probe_slave"

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Siva Durga Prasad Paladugu
0472808608 sf: params: Added support for Spansion S25FL512S_512K
Added support for Spansion chip "S25FL512S_512K".

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Albert ARIBAUD
d2a3e91139 Merge branch 'u-boot/master'
Conflicts:
	drivers/net/Makefile

(trivial merge)
2014-05-09 11:50:14 +02:00
Prabhakar Kushwaha
1eaa742d85 driver: Add support of image load for MMC & SPI in SPL
Add support of loading image, binary for MMC and SPI during SPL boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:50 -07:00
Prabhakar Kushwaha
e278ddcd7f driver/mtd/spi:Read 8KB data chunk during u-boot load in SPL
SPI driver perform its operation(read/write) on 64KB buffer chunk for data
greater than 64KB. This buffer chunk is allocated from system heap.

During SPL boot, 768KB of data is read from SPI flash.
Here, heap size may not be sufficient enough to full-fill 64KB buffer
requirement of SPI driver. So break down u-boot read operation at 8KB of chunk.

Also, fix a warning i.e. "unused variable buf" during CONFIG_FSL_CORENET

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:50 -07:00
Tom Rini
fa1a73fa87 SPL:SPI: Add Falcon Mode support
Signed-off-by: Tom Rini <trini@ti.com>
2014-04-17 17:24:37 -04:00
Marek Vasut
bf64035a15 mtd: spi: Fix page size for S25FL032P,S25FL064P
The commit 6af8dc3ebc broke support for
S25FL032P and S25FL064P by carelessly removing the code handling special
page size for these two SPI NOR flashes and unifying the code under the
assumption that Extended JEDEC ID of 0x4d00 always implies 512b page size.

Add special case handling for these two SPI NOR flashes.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17 21:54:57 +05:30
Jagannadha Sutradharudu Teki
c6136aad91 sf: ops: Squash the malloc+memset combo
Squash the malloc()+memset() combo in favor of calloc().

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-03-17 21:54:57 +05:30
Marek Vasut
cc56f13392 sf: Squash the malloc+memset combo
Squash the malloc()+memset() combo in favor of calloc().

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17 21:54:56 +05:30
Marek Vasut
cfa90a636b sf: Add S25FL128S_256K IDs
Add IDs for this new chip.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17 21:54:56 +05:30
Marek Vasut
c1f9325965 sf: Fix entries for S25FL256S_256K and S25FL512S_256K
Both of these chips have 256kB big sectors, thus the _256K suffix,
compared to their _64K counterparts, which have 64kB sectors. Also,
they have four times less sectors than their _64K counterparts.

Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-03-17 21:54:56 +05:30
Siva Durga Prasad Paladugu
35a55fb57f sf: params: Removed flag SECT_4K for Micron N25Q128
Remove the flag SECT_4K for device N25Q128 as the 4K-byte
sub sector erase granularity is available only for top/bottom
8 sectors in some of the N25Q128 chips.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:40:23 +05:30
Jagannadha Sutradharudu Teki
b902e07cea sf: Add CONFIG_SF_DUAL_FLASH
This config will use for defining greater than single flash support.
currently - DUAL_STACKED and DUAL_PARALLEL.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:40:22 +05:30
Jagannadha Sutradharudu Teki
056fbc73d5 sf: Add dual memories support - DUAL_PARALLEL
This patch added support for accessing dual memories in
parallel connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:40:22 +05:30
Jagannadha Sutradharudu Teki
f77f469117 sf: Add dual memories support - DUAL_STACKED
This patch added support for accessing dual memories in
stacked connection with single chipselect line from controller.

For more info - see doc/SPI/README.dual-flash

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:40:11 +05:30
Jagannadha Sutradharudu Teki
ab92224f45 sf: ops: Unify read_ops bank configuration
Unified the bar code from read_ops into a spi_flash_bar()

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:38:33 +05:30
Jagannadha Sutradharudu Teki
2ba863fae6 sf: Code cleanups
- comment typo's
- func args have a proper names

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-12 21:38:21 +05:30
Jagannadha Sutradharudu Teki
9f4322fd22 sf: Divide flash register ops from QEB code
QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 16:51:41 +05:30
Jagannadha Sutradharudu Teki
5bb30f1a40 sf: probe: Enable macronix quad read/write cmds support
Added macronix flash quad read/write commands support and
it's up to the respective controller driver usecase to
configure the respective commands by defining SPI RX/TX
operation modes from include/spi.h on the driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 16:51:39 +05:30
Jagannadha Sutradharudu Teki
067951223e sf: Add macronix set QEB support
This patch adds set QEB support for macronix flash devices
which are trying to program/read quad operations.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 16:51:37 +05:30
Jagannadha Sutradharudu Teki
ff063ed480 sf: Discover read dummy_byte
Discovered the read dummy_byte based on the
configured read command.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 16:50:45 +05:30
Jagannadha Sutradharudu Teki
c4ba0d82d3 sf: Add QUAD_IO_FAST read support
This patch adds support QUAD_IO_FAST read command.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:27 +05:30
Jagannadha Sutradharudu Teki
33adfb5f9b sf: Separate the flash params table
Moved the flash params table from sf_probe.c and
placed on to sf_params.c, hence flash params file will
alter based on new addons.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:27 +05:30
Jagannadha Sutradharudu Teki
35ba667df4 sf: probe: Enable RD_FULL and WR_QPP
This patch enabled RD_FULL and WR_QPP for supported flashes
in micron, winbond and spansion.

Remaining parts will be add in future patches.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:26 +05:30
Jagannadha Sutradharudu Teki
d08a1baf61 sf: Set quad enable bit support
This patch provides support to set the quad enable bit on flash.

quad enable bit needs to set before performing any quad IO
operations on respective SPI flashes.

Currently added set  quad enable bit for winbond and spansion flash
devices. stmicro flash doesn't require to set as qeb is volatile.
remaining flash devices support will add in future patches.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:26 +05:30
Jagannadha Sutradharudu Teki
6cba6fdf96 sf: ops: Add configuration register writing support
This patch provides support to program a flash config register.

Configuration register contains the control bits used to configure
the different configurations and security features of a device.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:25 +05:30
Jagannadha Sutradharudu Teki
3163aaa63f sf: Add quad read/write commands support
This patch add quad commands support like
- QUAD_PAGE_PROGRAM => for write program
- QUAD_OUTPUT_FAST ->> for read program

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:13:11 +05:30
Jagannadha Sutradharudu Teki
4e09cc1e2c sf: Add extended read commands support
Current sf uses FAST_READ command, this patch adds support to
use the different/extended read command.

This implementation will determine the fastest command by taking
the supported commands from the flash and the controller, controller
is always been a priority.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-01-11 15:10:28 +05:30
Poddar, Sourav
ac5cce38de driver: mtd: sf_ops: claim bus while doing memcpy
claim spi bus while doing memory copy, this will set up
the spi controller device control register before doing
a memory read.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Yebio Mesfin <ymesfin@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-12-19 12:23:22 +05:30
Luka Perkov
57af475389 sf: probe: add support for MX25L2006E
Add support for Macronix MX25L2006E SPI flash.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-12-18 23:23:41 +05:30
Luka Perkov
28303f617a sf: probe: Hex values are in lower case
All other hex values in sf_probe.c are in lower case so we should
fix this one too.

Signed-off-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-12-18 23:23:41 +05:30
Tom Rini
65b7fe28a1 Merge branch 'spi' of git://git.denx.de/u-boot-x86 2013-12-10 09:36:23 -05:00
Mike Frysinger
ffdb20bea1 sandbox: spi: Add new SPI flash driver
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-12-09 12:22:39 -07:00
Simon Glass
0efc02499f spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT node
This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-12-09 12:22:12 -07:00
Priyanka Jain
7aa6c455c3 powerpc: spiflash:Add corenet devices support in eSPI SPL
Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-12-04 14:54:34 -08:00
Masahiro Yamada
2fc7ef6196 drivers: mtd: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:22:13 -04:00
Bo Shen
21497ded5d sf: probe: Add missing Atmel at25df321 flash
As the spi flash transfer to multiple parts, it is forgot to add
Atmel AT25DF321 spi flash support, which broken several Atmel EK
boards which this chip. So, add it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-16 00:14:03 +05:30
Jagannadha Sutradharudu Teki
0c88a84ac6 sf: Add GPL-2.0+ SPDX-License-Identifier for missing ones
Added GPL-2.0+ SPDX-License-Identifier for missed sf
source files.

Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-10-16 00:14:01 +05:30
Jagannadha Sutradharudu Teki
469146c097 sf: Minor cleanups.
- Add comments.
- Renamed few macros.
- Add tabs.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-10-16 00:14:00 +05:30
Jagannadha Sutradharudu Teki
6152dd1528 sf_ops: Unify bank_sel calculation code
Unified the bank_sel calculation code for erase and
write ops.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-16 00:14:00 +05:30
Jagannadha Sutradharudu Teki
adbb5860e5 sf: ramtron: Remove page_size print
There is no page_size for ramtron flashes,
so just print the detected flash and it's size.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:35:09 +05:30