Commit graph

47 commits

Author SHA1 Message Date
Tom Rini
93145335fb nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig
The way that we use this file currently means that we have to guard it
in every platform Kconfig.  But it is also required in all NXP
platforms, including non-reference platforms.  Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:03:02 -04:00
Ye Li
cda8f87349 caam: Fix crash in case caam_jr_probe failed
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-05-20 12:36:47 +02:00
Peng Fan
a38ed61643 imx: imx8mp_evk: enable pinctrl_wdog in SPL
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-05-20 09:30:29 +02:00
Peng Fan
ae188eb61c imx: imx8mp_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Gaurav Jain
2cddfcbc75 crypto/fsl: i.MX8M: Enable Job ring driver model.
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Simon Glass
5c86a8f7a1 imx: Don't define __ASSEMBLY__ in source files
This is supposed to be a build-system flag. Move it there so we can
define it before linux/kconfig.h is included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:58 -05:00
Ye Li
c852a2bf6f imx8mp_evk: Remove EQoS PHY reset codes
Since we uses the DTS and PHY reset gpio in EQoS driver to do the
reset, remove the duplicated codes from board file.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
Ye Li
e1260aef37 imx8mp_evk: Fix incorrect cascade for FEC and EQOS setup
The setup functions should be independent for two ethernet controllers

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
Teresa Remmet
42cef89e86 arm: dts: imx8mp: Generate single bootable binary
binman conversion made flashing flash.bin
and u-boot.itb necessary. Update binman config
to create a single flash.bin image again.

This updates imx8mp_evk and phyCORE-i.MX8MP as they share the
same binman config.

Updated also imx8mp_evk documentation.

Tested on phyCORE-i.MX8MP.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-10-07 16:53:50 +02:00
Simon Glass
9d8665b709 i2c: Convert CONFIG_POWER_I2C et al to Kconfig
This converts the following to Kconfig:
   CONFIG_POWER_I2C
   CONFIG_POWER_LEGACY

They are handled at the same time due to a dependency between them.
Update the Makefile rule to use legacy power only in U-Boot proper.
Unfortunately a separate rule is needed in SPL to be able to build
legacy power.  Add SPL related symbols for both, to allow for SPL-only
usage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: More SPL related cleanups, reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 12:26:02 -04:00
Simon Glass
29d7153ec3 power: Rename CONFIG_POWER to CONFIG_POWER_LEGACY
This option is used in pre-driver model code and much of it has never
been converted to driver model.

We want to add a new option to enable power support, so we can use a
simple rule in the Makefile. Rename this one, which is really about
a particular implementation of power.

Also update the pmic.h header file so it either includes the legacy
API or the driver model one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-09-04 12:26:02 -04:00
Tom Rini
148b8bb4b6 imx: Finish migration of IMX_CONFIG to Kconfig
- Provide a default Kconfig value of the default script
- Largely continue to define this via the board Kconfig file
- For the boards that select a script based on defconfig rather than
  TARGET, keep this within the defconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
Tom Rini
a1e95e3805 u-boot-imx-20210409
-------------------
 
 - Secure Boot :
 	- HAB for MX8M / MX7ULP
 	- CAAM fixes
 - Fixes for imxrt1020
 - Fixes for USDHC driver
 - Fixes for Toradex (Colibri / Apalis)
 - Switch to DM for several boards
 	- mx23 olinuxo
 	- usbarmory
 	- marsboard / riotboard
 	- Gateworks GW Ventana
 - NXP upstream patches (LPDDR / CAAM / HAB)
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCYHA8Xg8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76aVbQCfb0Z+N836ZSAodyLa0t6FSHgKqfYAnRdrWQAv
 MNlGOmmpfHENtE75eSnd
 =g48D
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210409
-------------------

- Secure Boot :
	- HAB for MX8M / MX7ULP
	- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
	- mx23 olinuxo
	- usbarmory
	- marsboard / riotboard
	- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-09 10:08:52 -04:00
Peng Fan
1e4ed2d69d imx8mp-evk: switch to use binman
Use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Ye Li
8f9f6ba855 imx8m: ddr: Disable CA VREF Training for LPDDR4
Users reported LPDDR4 MR12 value is set to 0 during PHY training,
not the value from FSP timing structure, which cause compliance test failed.
The root cause is the CATrainOpt[0] is set to 1 in 2D FSP timing
but not set in 1D.  According to PHY training application node,
to enable the feature both 1D and 2D need set this field to 1,
otherwise the training result will be incorrect.
The PHY training doc also recommends to set CATrainOpt[0] to 0 to use
MR12 value from message block (FSP structure). So update the LPDDR4
scripts of all mscale to clear CATrainOpt[0].

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
4eeb9fe847 power: pca9450: add a new parameter for power_pca9450_init
Currently PCA9450 might have address 0x25 or 0x35, so let user
choose the address.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-08 09:18:29 +02:00
Peng Fan
41037bc47c imx8mp_evk: Increase VDD_ARM to 0.95v Overdrive voltage
There is a frequency/timing limitation for SOC and ARM, if SOC is OD
voltage/OD freq, then ARM can't run at ND voltage/1.2Ghz, it may have
timing risk from SOC to ARM.

Current VDD_SOC is set to 0.95v OD voltage in SPL, and kernel will
increase bus clocks to OD frequency before it increases ARM voltage.
So to conform to the limitation, we'd better increases VDD_ARM to OD
voltage in SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
2212542f9b imx8mp_evk: spl: clean up including headers
Clean up the including headers

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
haidong.zheng
c994d3d203 imx8mp: refine power on imx8mp board
VDD SOC normal run changed to 0.85V
LPDDR4 freq0 change from 4000MTS to 2400MTS

Signed-off-by: haidong.zheng <haidong.zheng@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
d437230954 imx8mp_evk: Update LPDDR4 refresh time
Use more safer refresh time value for 6GB LPDDR4 on this EVK board.
Update the parameters for every frequency point.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
c0c78d24bd imx8mp_evk: Update LPDDR4 timing for new FW 202006
After switching to new LPDDR4 firmware 202006 version, have to
update the LPDDR4 timing accordingly from RPA tool.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Sherry Sun <sherry.sun@nxp.com>
Tested-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Sherry Sun
31c878f76e imx8mp: ddr: Add inline ECC feature support
Add inline ECC support for lpddr4 on imx8mp-evk. And add a config which
can enable/disable inline ECC feature for lpddr4 on imx8mp-evk board.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
15734d473f imx8mm/p: remove boot.cmd
These files should not be in U-Boot repo

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Alice Guo
10a394ba68 board: imx8mp: add boot.cmd for distro boot on iMX8MP
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg

The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
48b90f86c5 imx: imx8mp_evk: enable eth support
Add board code to configure the network interface
Add net defconfig

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
39d53414ad doc: board: Convert i.MX8MP EVK README to reST
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-11-01 15:37:19 +01:00
Peng Fan
aa5bbfd961 board: imx: address dd usage in README
When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)",
the last not 512bytes aligned data wat cut off and not burned into SD
card.

Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only
burned 1085440 bytes, the leaving 168 bytes were not burnned and cause
boot issue.

So update README dd command to add "conv=notrunc"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-11-01 15:37:19 +01:00
Sébastien Szymanski
eefd93e7f8 power: pmic_pca9450: fix PCA9450A I2C address
Quoting Ye Li from NXP:

    "We have confirmed with PMIC team, 0x35 is used only on early chips
    and not used any more. 0x25 is the final address."

Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-07-16 11:20:14 +02:00
Peng Fan
3c41728d80 imx8m: Refactor the OPTEE memory removal
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:48 +08:00
Jian Li
3f63d27c17 imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jian Li
5865d14dde imx8mp: DDR performance tunning
1. set SCHED.rdwr_idle_gap=0
2. set SCHED.pageclose=1

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Jian Li
dd2f41370d imx8mp: enable rd_port_urgent
Need to enable read urgent for NoC panic signal

Signed-off-by: Jian Li <jian.li@nxp.com
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14 15:23:46 +08:00
Peng Fan
0ec9d5bda9 imx8mp_evk: spl: no need the code since spl framework could do that
We no need invoke the code, since spl framework could help
us do that.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:42:39 +02:00
Peng Fan
bdada3b14d imx8mp_evk: spl: use spl_early_init
Use spl_early_init to replace spl_init, spl_init will be invoked
in board_init_r, we only need use spl_early_init to setup malloc
and scan early dt.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:42:35 +02:00
Peng Fan
ebdd07f5b2 imx8mp_evk: spl: drop timer_init
timer_init has been invoked in arch_cpu_init, no need to invoke
it again in board code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:42:30 +02:00
Peng Fan
87f6e2f51e imx8mp_evk: spl: drop useless code
Drop useless getting ccm device, there is no need to explicted do this
in board code, and we not enable SPL CLK currently.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:42:26 +02:00
Fabio Estevam
9ccd30df60 imx8mp_evk: Add a README file
Add a README file explaining the U-Boot build and SD card flash procedures.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-06-08 10:41:44 +02:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
4d72caa5b9 common: Drop image.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Fabio Estevam
d3855c802e imx8mp_evk: Remove unrelated comment
The comment does not relate to the setup_i2c() function, so just
remove it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-01 13:46:22 +02:00
Claudius Heine
b9bb1d06e2 imx: imx8m*: Remove do_reset from board files
Use the `do_reset` implementation of `arch/arm/lib/reset.c` in SPL
instead.  It is very close to what is done here, anyway, and plays
more nicely with the rest of U-Boot than adding a custom `do_reset`
implementation into board files.

`do_reset` from `arch/arm/lib/reset.c` calls `reset_cpu` with 0 as the
addr parameter while the boards are passing WDOG1_BASE_ADDR.  This is
ok because the `reset_cpu` implementation uses WDOG1_BASE_ADDR by
default if 0 is passed in.

Co-Authored-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01 13:46:22 +02:00
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Simon Glass
9a3b4ceb37 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:31 -05:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00