Commit graph

57 commits

Author SHA1 Message Date
Kever Yang
be3fcd0fe8 rockchip: evb_rk3399: init vdd_center regulator
Add vdd_center pwm regulator get_device to
enable this regulator.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:35:01 -06:00
Kever Yang
05c6e30c57 board: evb-rk3399: enable usb 2.0 host vbus power on board_init
rk3399 using one gpio control signal for two usb 2.0 host port,
it's better to enable the power in board file instead of in usb driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-22 07:56:51 -06:00
Kever Yang
ad0513828e rk3399: enable the pwm2/3 pinctrl in board init
There is no interrupt line for each PWM which used by pinctrl to get the
periph_id, so it's not able to enable the default pinctrl setting by pinctrl
framework, let's enable it at board_init().

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-22 07:32:22 -06:00
Kever Yang
bc2f8a5406 rockchip: rk3399: update MAINTAINER file
This patch add maintainer information for rk3399 evb.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2016-08-27 08:48:23 -06:00
Kever Yang
633fdab0cb rk3399: Reserve space for ARM Trust Firmware
RK3399 needs reserve 0x200000 at the beginning of DRAM, for ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Kever Yang
d26f375ae4 ARM64: evb-rk3399: add a README for this board setup
Add a README to guide people flash the ATF and U-Boot
with Rockchip tools to bring up to board.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:46 -06:00
Kever Yang
a381bcf529 ARM64: rockchip: add support for rk3399 SoC based evb
RK3399 is a SoC from Rockchip with dual-core Cortex-A72
and quad-core Cortex-A53 CPU. It supports two USB3.0
type-C ports and two USB2.0 EHCI ports. Other interfaces
are very much like RK3288, the DRAM are 32bit width address
and support address from 0 to 4GB-128MB range.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:45 -06:00