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Convert CONFIG_SYS_MEMTEST_START et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END This is removing unused defines and correcting the default value to be 0x0 as we are a hex symbol. Signed-off-by: Tom Rini <trini@konsulko.com>
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parent
82edd73762
commit
ff27af1244
7 changed files with 1 additions and 26 deletions
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@ -741,7 +741,7 @@ endif
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config SYS_MEMTEST_START
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hex "default start address for mtest"
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default 0
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default 0x0
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help
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This is the default start address for mtest for simple read/write
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test. If no arguments are given to mtest, default address is used
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@ -91,9 +91,6 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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/* Monitor Command Prompt */
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@ -28,9 +28,6 @@
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# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#endif /* CONFIG_SPL_BUILD */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 2) \
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@ -69,10 +66,6 @@
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#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END \
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(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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@ -116,10 +116,6 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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(PHYS_SDRAM_SIZE >> 1))
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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/* Monitor Command Prompt */
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@ -30,10 +30,6 @@
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/* early stack pointer */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
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/* memtest command */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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/* SMP */
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#define CPU_RELEASE_ADDR secondary_boot_addr
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@ -95,10 +95,6 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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(PHYS_SDRAM_SIZE >> 1))
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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/* Monitor Command Prompt */
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@ -41,9 +41,6 @@
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#define CONFIG_SYS_FLASH_BASE (0x08000000)
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#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (512 * 1024))
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_MAXARGS 128
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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