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drivers: i2c: mxc: Update support to 8 I2C controllers

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Existing driver supports upto 4 I2C controllers.
But some of future NXPs SoCs like lx2160a has
eight I2C controllers.

Update MXC driver to support upto 8 I2C controllers

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Sriram Dash 2018-02-06 11:26:31 +05:30 committed by Stefano Babic
parent 942ecc8bd8
commit fa452192cb
2 changed files with 136 additions and 0 deletions
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80
drivers/i2c/Kconfig
View file

@ -179,6 +179,30 @@ config SYS_I2C_MXC_I2C4
help
Add support for NXP MXC I2C Controller 4.
Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
config SYS_I2C_MXC_I2C5
bool "NXP MXC I2C5"
help
Add support for NXP MXC I2C Controller 5.
Required for SoCs which have I2C MXC controller 5 eg LX2160A
config SYS_I2C_MXC_I2C6
bool "NXP MXC I2C6"
help
Add support for NXP MXC I2C Controller 6.
Required for SoCs which have I2C MXC controller 6 eg LX2160A
config SYS_I2C_MXC_I2C7
bool "NXP MXC I2C7"
help
Add support for NXP MXC I2C Controller 7.
Required for SoCs which have I2C MXC controller 7 eg LX2160A
config SYS_I2C_MXC_I2C8
bool "NXP MXC I2C8"
help
Add support for NXP MXC I2C Controller 8.
Required for SoCs which have I2C MXC controller 8 eg LX2160A
endif
if SYS_I2C_MXC_I2C1
@ -239,6 +263,62 @@ config SYS_MXC_I2C4_SLAVE
MXC I2C4 Slave
endif
if SYS_I2C_MXC_I2C5
config SYS_MXC_I2C5_SPEED
int "I2C Channel 5 speed"
default 100000
help
MXC I2C Channel 5 speed
config SYS_MXC_I2C5_SLAVE
int "I2C5 Slave"
default 0
help
MXC I2C5 Slave
endif
if SYS_I2C_MXC_I2C6
config SYS_MXC_I2C6_SPEED
int "I2C Channel 6 speed"
default 100000
help
MXC I2C Channel 6 speed
config SYS_MXC_I2C6_SLAVE
int "I2C6 Slave"
default 0
help
MXC I2C6 Slave
endif
if SYS_I2C_MXC_I2C7
config SYS_MXC_I2C7_SPEED
int "I2C Channel 7 speed"
default 100000
help
MXC I2C Channel 7 speed
config SYS_MXC_I2C7_SLAVE
int "I2C7 Slave"
default 0
help
MXC I2C7 Slave
endif
if SYS_I2C_MXC_I2C8
config SYS_MXC_I2C8_SPEED
int "I2C Channel 8 speed"
default 100000
help
MXC I2C Channel 8 speed
config SYS_MXC_I2C8_SLAVE
int "I2C8 Slave"
default 0
help
MXC I2C8 Slave
endif
config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS

56
drivers/i2c/mxc_i2c.c
View file

@ -589,6 +589,22 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr,
#define I2C4_BASE_ADDR 0
#endif
#if !defined(I2C5_BASE_ADDR)
#define I2C5_BASE_ADDR 0
#endif
#if !defined(I2C6_BASE_ADDR)
#define I2C6_BASE_ADDR 0
#endif
#if !defined(I2C7_BASE_ADDR)
#define I2C7_BASE_ADDR 0
#endif
#if !defined(I2C8_BASE_ADDR)
#define I2C8_BASE_ADDR 0
#endif
static struct mxc_i2c_bus mxc_i2c_buses[] = {
#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \
defined(CONFIG_FSL_LAYERSCAPE)
@ -596,11 +612,19 @@ static struct mxc_i2c_bus mxc_i2c_buses[] = {
{ 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG },
{ 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG },
{ 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG },
{ 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG },
{ 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG },
{ 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG },
{ 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG },
#else
{ 0, I2C1_BASE_ADDR, 0 },
{ 1, I2C2_BASE_ADDR, 0 },
{ 2, I2C3_BASE_ADDR, 0 },
{ 3, I2C4_BASE_ADDR, 0 },
{ 4, I2C5_BASE_ADDR, 0 },
{ 5, I2C6_BASE_ADDR, 0 },
{ 6, I2C7_BASE_ADDR, 0 },
{ 7, I2C8_BASE_ADDR, 0 },
#endif
};
@ -738,6 +762,38 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
CONFIG_SYS_MXC_I2C4_SLAVE, 3)
#endif
#ifdef CONFIG_SYS_I2C_MXC_I2C5
U_BOOT_I2C_ADAP_COMPLETE(mxc4, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C5_SPEED,
CONFIG_SYS_MXC_I2C5_SLAVE, 4)
#endif
#ifdef CONFIG_SYS_I2C_MXC_I2C6
U_BOOT_I2C_ADAP_COMPLETE(mxc5, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C6_SPEED,
CONFIG_SYS_MXC_I2C6_SLAVE, 5)
#endif
#ifdef CONFIG_SYS_I2C_MXC_I2C7
U_BOOT_I2C_ADAP_COMPLETE(mxc6, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C7_SPEED,
CONFIG_SYS_MXC_I2C7_SLAVE, 6)
#endif
#ifdef CONFIG_SYS_I2C_MXC_I2C8
U_BOOT_I2C_ADAP_COMPLETE(mxc7, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C8_SPEED,
CONFIG_SYS_MXC_I2C8_SLAVE, 7)
#endif
#else
static int mxc_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)